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On Heuristic Solutions to the Simple Offset Assignment Problem in Address-Code Optimization

Published: 01 September 2012 Publication History

Abstract

The increasing demand for more functionality in embedded systems applications nowadays requires efficient generation of compact code for embedded DSP processors. Because such processors have highly irregular data-paths, compilers targeting those processors are challenged with the automatic generation of optimized code with competent quality comparable to hand-crafted code. A major issue in code-generation is to optimize the placement of program variables in ROM relative to each other so as to reduce the overhead instructions dedicated for address computations. Modern DSP processors are typically shipped with a feature called Address Generation Unit (AGU) that provides efficient address-generation instructions for accessing program variables. Compilers targeting those processors are expected to exploit the AGU to optimize variables assignment. This article focuses on one of the basic offset-assignment problems; the Simple Offset Assignment (SOA) problem, where the AGU has only one Address Register and no Modify Registers. The notion of Tie-Break Function, TBF, introduced by Leupers and Marwedel [1996], has been used to guide the placement of variables in memory.
In this article, we introduce a more effective form of the TBF; the Effective Tie-Breaking Function, ETBF, and show that the ETBF is better at guiding the variables placement process. Underpinning ETBF is the fact that program variables are placed in memory in sequence, with each variable having only two neighbors. We applied our technique to randomly generated graphs as well as to real-world code from the OffsetStone testbench [2010]).
In previous work [Ali et al. 2008], our technique showed up to 7% reduction in overhead when applied to randomly-generated problem instances. We report in this article on a further experiment of our technique on real-code from the Offsetstone testbench. Despite the substantial improvement our technique has achieved when applied to random problem instances, we found that it shows slight overhead reduction when applied to real-world instances in OffsetStone, which agrees with similar existing experiments. We analyze these results and show that the ETBF defaults to TBF.

References

[1]
Ali, H., El-Boghdadi, H. and Shaheen, S. 2008. A new heuristic for SOA problem based on effective tie break function. In Proceedings of the 11th International Workshop on Software & Compilers for Embedded Systems (SCOPES’’08).
[2]
Atri, S., Ramanujam, J., and Kandemir, M. 2001. Improving Offset Assignment for Embedded Processors. Springer, 158--172.
[3]
Bartley, D. 1992. Optimizing stack frame accesses for processors with restricted addressing modes. Softw. Pract. Exper. 22, 2, 101--110.
[4]
Choi, Y. and Kim, T. 2002. Address assignment combined with scheduling in DSP code generation. In Proceedings of the 39th Design Automation Conference.
[5]
Falk, H. and Marwedel, P. 2004. Source Code Optimization Techniques for Data Flow Dominated Embedded Software Source Level Optimizations. Springer.
[6]
Hong, J. 2002. Memory optimization techniques for embedded systems. Ph.D. thesis, LSU, Dept. of ECE.
[7]
Hong, J. and Ramanujam, J. 2007. Memory offset assignment for DSPs. In Proceedings of the 3rd International Conference on Embedded Software and Systems. Springer.
[8]
Leupers, R. 2000. Code Optimization Techniques for Embedded Processors: Methods, Algorithms, and Tools. Kluwer Academic Publisher.
[9]
Leupers, R. 2003. Offset assignment showdown: Evaluation of DSP address code optimization algorithms. In Proceedings of the 12th International Conference on Compiler Construction, Lecture Notes in Computer Science, vol. 2622. Springer.
[10]
Leupers, R. and Marwedel, P. 1996. Algorithms for address assignment in DSP code generation. In Proceedings of the IEEE/ACM International Conference on Computer-Aided Design. 109--112.
[11]
Liao, S. 1996. Code generation and optimization for embedded digital signal processors. Ph.D. thesis, MIT Department of EECS.
[12]
OffsetStone. 2010. Address code optimization benchmark. http://www.address-code-optimization.org.
[13]
Ramanujam, J., Hong, J., Kandemir, M., and Atri, S. 2001. Address register-oriented optimizations for embedded processors. In Proceedings of the 9th Workshop on Compilers for Parallel Computers. 281--290.
[14]
Rao, A. and Pande, S. 1999. Storage assignment optimizations to generate compact and efficient code on embedded DSPs. ACM SIGPLAN Not, 128--138.
[15]
Salamy, H. and Ramanujam, J. 2007. An effective heuristic for simple offset assignment with variable coalescing. In Proceedings of the 19th International Workshop on Languages and Compilers for Parallel Computing, Lecture Notes in Computer Science, vol. 4382, Springer.
[16]
Udayanar, S. and Chakrabarti, C. 2001. Address code generation for digital signal processors. In Proceedings of the 38th Annual Design Automation Conference. ACM.
[17]
Zivoinovic, V., Martinez, J., Schlager, C., and Meyr, H. 1994, DSPstone: A DSP-oriented benchmarking methodology. In Proceedings of the International Conference on Signal Processing Applications and Technology.

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  1. On Heuristic Solutions to the Simple Offset Assignment Problem in Address-Code Optimization

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    cover image ACM Transactions on Embedded Computing Systems
    ACM Transactions on Embedded Computing Systems  Volume 11, Issue 3
    September 2012
    274 pages
    ISSN:1539-9087
    EISSN:1558-3465
    DOI:10.1145/2345770
    Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 01 September 2012
    Accepted: 01 October 2010
    Revised: 01 October 2010
    Received: 01 June 2009
    Published in TECS Volume 11, Issue 3

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    Author Tags

    1. Code size
    2. compilation
    3. offset assignment

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