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POSE: power optimization and synthesis environment

Authors:

Sasan Iman,

Massoud PedramAuthors Info & Claims

DAC '96: Proceedings of the 33rd annual Design Automation Conference

Pages 21 - 26

https://doi.org/10.1145/240518.240522

Published: 01 June 1996 Publication History

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Cited By

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Tinmaung KHowland DTessier RDeHon AHutton M(2007)Power-aware FPGA logic synthesis using binary decision diagramsProceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays10.1145/1216919.1216945(148-155)Online publication date: 18-Feb-2007
https://dl.acm.org/doi/10.1145/1216919.1216945
Koranne S(2006)A distributed algorithm for the estimation of average switching activity in combinational circuitsHigh-Performance Computing and Networking10.1007/BFb0100680(1163-1166)Online publication date: 17-Nov-2006
https://doi.org/10.1007/BFb0100680
Voss NMertsching B(2004)A framework for low power audio design17th International Conference on VLSI Design. Proceedings.10.1109/ICVD.2004.1261068(1048-1053)Online publication date: 2004
https://doi.org/10.1109/ICVD.2004.1261068
Show More Cited By

Index Terms

POSE: power optimization and synthesis environment
1. Applied computing
  1. Physical sciences and engineering
2. Hardware
  1. Electronic design automation
    1. Physical design (EDA)

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Published In

DAC '96: Proceedings of the 33rd annual Design Automation Conference

June 1996

839 pages

ISBN:0897917790

DOI:10.1145/240518

Chairmen:
Thomas P. Pennino
Bell Labs, Holmdel, NJ
,
Ellen J. Yoffa
IBM Corp., Yorktown Heights, NY

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 01 June 1996

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DAC96: The 33rd Design Automation Conference

June 3 - 7, 1996

Nevada, Las Vegas, USA

Acceptance Rates

DAC '96 Paper Acceptance Rate 142 of 377 submissions, 38%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

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Tinmaung KHowland DTessier RDeHon AHutton M(2007)Power-aware FPGA logic synthesis using binary decision diagramsProceedings of the 2007 ACM/SIGDA 15th international symposium on Field programmable gate arrays10.1145/1216919.1216945(148-155)Online publication date: 18-Feb-2007
https://dl.acm.org/doi/10.1145/1216919.1216945
Koranne S(2006)A distributed algorithm for the estimation of average switching activity in combinational circuitsHigh-Performance Computing and Networking10.1007/BFb0100680(1163-1166)Online publication date: 17-Nov-2006
https://doi.org/10.1007/BFb0100680
Voss NMertsching B(2004)A framework for low power audio design17th International Conference on VLSI Design. Proceedings.10.1109/ICVD.2004.1261068(1048-1053)Online publication date: 2004
https://doi.org/10.1109/ICVD.2004.1261068
Aghaghiri YFallah FPedram MYasuura H(2003)BEAMProceedings of the 2003 Asia and South Pacific Design Automation Conference10.1145/1119772.1119774(3-8)Online publication date: 21-Jan-2003
https://dl.acm.org/doi/10.1145/1119772.1119774
Aghaghiri YFallah FPedram M(2003)BEAM: bus encoding based on instruction-set-aware memoriesProceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003.10.1109/ASPDAC.2003.1194985(3-8)Online publication date: 2003
https://doi.org/10.1109/ASPDAC.2003.1194985
Kim KKim THwang TKang SLiu C(2002)Logic transformation for low-power synthesisACM Transactions on Design Automation of Electronic Systems10.1145/544536.5445397:2(265-283)Online publication date: 1-Apr-2002
https://dl.acm.org/doi/10.1145/544536.544539
Frenkil J(2002)Tools and methodologies for power sensitive designConference Record of the Thirty-Sixth Asilomar Conference on Signals, Systems and Computers, 2002.10.1109/ACSSC.2002.1197149(57-61)Online publication date: 2002
https://doi.org/10.1109/ACSSC.2002.1197149
Benini LMicheli G(2002)Logic Synthesis for Low PowerLogic Synthesis and Verification10.1007/978-1-4615-0817-5_8(197-223)Online publication date: 2002
https://doi.org/10.1007/978-1-4615-0817-5_8
Frenkil J(2002)Tools and Methodologies for Power Sensitive DesignPower Aware Design Methodologies10.1007/0-306-48139-1_14(413-449)Online publication date: 2002
https://doi.org/10.1007/0-306-48139-1_14
Chang CHu BMarek-Sadowska M(2001)In-place delay constrained power optimization using functional symmetriesProceedings of the conference on Design, automation and test in Europe10.5555/367072.367275(377-382)Online publication date: 13-Mar-2001
https://dl.acm.org/doi/10.5555/367072.367275
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POSE: a parallel object-oriented synthesis environment

A Metaheuristic Bat-Inspired Algorithm for Full Body Human Pose Estimation

POSE: A mathematical and visual modelling tool to guide energy aware code optimisation

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