research-article

Smart hill climbing for agile dynamic mapping in many-core systems

Authors:

Mohammad Fattah,

Masoud Daneshtalab,

Pasi Liljeberg,

Juha PlosilaAuthors Info & Claims

DAC '13: Proceedings of the 50th Annual Design Automation Conference

Article No.: 39, Pages 1 - 6

https://doi.org/10.1145/2463209.2488782

Published: 29 May 2013 Publication History

Abstract

Stochastic hill climbing algorithm is adapted to rapidly find the appropriate start node in the application mapping of network-based many-core systems. Due to highly dynamic and unpredictable workload of such systems, an agile run-time task allocation scheme is required. The scheme is desired to map the tasks of an incoming application at run-time onto an optimum contiguous area of the available nodes. Contiguous and un-fragmented area mapping is to settle the communicating tasks in close proximity. Hence, the power dissipation, the congestion between different applications, and the latency of the system will be significantly reduced. To find an optimum region, we first propose an approximate model that quickly estimates the available area around a given node. Then the stochastic hill climbing algorithm is used as a search heuristic to find a node that has the required number of available nodes around it. Presented agile climber takes the steps using an adapted version of hill climbing algorithm named <u>S</u>mart <u>H</u>ill <u>C</u>limbing, SHiC, which takes the runtime status of the system into account. Finally, the application mapping is performed starting from the selected first node. Experiments show significant gain in the mapping contiguousness which results in better network latency and power dissipation, compared to state-of-the-art works.

References

[1]

W. J. Dally and B. Towles, "Route packets, not wires: on-chip interconnection networks," in Design Automation Conference, 2001. Proceedings, 2001, pp. 684--689.

Digital Library

[2]

E. Carvalho, N. Calazans, and F. Moraes, "Heuristics for Dynamic Task Mapping in NoC-based Heterogeneous MPSoCs," in 18th IEEE/IFIP International Workshop on Rapid System Prototyping, 2007. RSP 2007, 2007, pp. 34--40.

Digital Library

[3]

C.-L. Chou, U. Y. Ogras, and R. Marculescu, "Energy- and Performance-Aware Incremental Mapping for Networks on Chip With Multiple Voltage Levels," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 10, pp. 1866--1879, Oct. 2008.

Digital Library

[4]

M. Fattah, M. Ramirez, M. Daneshtalab, P. Liljeberg, and J. Plosila, "CoNA: Dynamic application mapping for congestion reduction in many-core systems," in 2012 IEEE 30th International Conference on Computer Design (ICCD), 2012, pp. 364--370.

Digital Library

[5]

D. P. Dobkin, H. Edelsbrunner, and M. H. Overmars, "Searching for empty convex polygons," in Proceedings of the fourth annual symposium on Computational geometry, New York, NY, USA, 1988, pp. 224--228.

Digital Library

[6]

S. Fortunato, "Community detection in graphs," arXiv:0906.0612, Jun. 2009.

[7]

E. L. d. S. Carvalho, N. L. Calazans, and F. G. Moraes, "Dynamic Task Mapping for MPSoCs," IEEE Design & Test of Computers, vol. 27, no. 5, pp. 26--35, Oct. 2010.

Digital Library

[8]

A. Weichslgartner, S. Wildermann, and J. Teich, "Dynamic decentralized mapping of tree-structured applications on NoC architectures," in 2011 Fifth IEEE/ACM International Symposium on Networks on Chip (NoCS), 2011, pp. 201--208.

Digital Library

[9]

S. Kobbe, et al., "DistRM: distributed resource management for on-chip many-core systems," in Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis, New York, NY, USA, 2011, pp. 119--128.

Digital Library

[10]

M. Hosseinabady and J. L. Nunez-Yanez, "Run-time stochastic task mapping on a large scale network-on-chip with dynamically reconfigurable tiles," IET Computers Digital Techniques, vol. 6, no. 1, pp. 1--11, Jan. 2012.

[11]

M. Asadinia, M. Modarressi, A. Tavakkol, and H. Sarbazi-Azad, "Supporting non-contiguous processor allocation in mesh-based CMPs using virtual point-to-point links," in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, 2011, pp. 1--6.

[12]

T. T. Ye, G. D. Micheli, and L. Benini, "Analysis of power consumption on switch fabrics in network routers," in Proceedings of the 39th annual Design Automation Conference, New York, NY, USA, 2002, pp. 524--529.

Digital Library

[13]

C.-L. Chou and R. Marculescu, "Contention-aware application mapping for Network-on-Chip communication architectures," in IEEE International Conference on Computer Design, 2008. ICCD 2008, 2008, pp. 164--169.

[14]

C.-Q. Yang and A. V. Reddy, "A taxonomy for congestion control algorithms in packet switching networks," IEEE Network, vol. 9, no. 4, pp. 34--45, Aug. 1995.

Digital Library

[15]

J. W. Brand, C. Ciordas, K. Goossens, and T. Basten, "Congestion-Controlled Best-Effort Communication for Networks-on-Chip," in Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07, 2007, pp. 1--6.

Digital Library

[16]

S. Ma, N. Enright Jerger, and Z. Wang, "DBAR: an efficient routing algorithm to support multiple concurrent applications in networks-on-chip," in Proceedings of the 38th annual international symposium on Computer architecture, New York, NY, USA, 2011, pp. 413--424.

Digital Library

[17]

M. Ebrahimi, et al., "HARAQ: Congestion-Aware Learning Model for Highly Adaptive Routing Algorithm in On-Chip Networks," in 2012 Sixth IEEE/ACM International Symposium on Networks on Chip (NoCS), 2012, pp. 19--26.

Digital Library

[18]

C. M. Bender, M. A. Bender, E. D. Demaine, and S. P. Fekete, "What is the optimal shape of a city?," J. Phys. A: Math. Gen., vol. 37, no. 1, p. 147, Jan. 2004.

[19]

S. Russell and P. Norvig, Artificial Intelligence: A Modern Approach, 3rd ed. Prentice Hall, 2009.

Digital Library

[20]

Task graph generator (TGG). {Online}. Available at: http://sourceforge.net/projects/taskgraphgen/.

[21]

Noxim: the NoC Simulator. {Online}. Available at: http://noxim.sourceforge.net/.

[22]

J. Howard, et al., "A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS," in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2010 IEEE International, 2010, pp. 108--109.

[23]

Tilera Corporation, "Tile-GX Processor Family," 2011.

Cited By

Reza M(2024)High-performance application mapping in network-on-chip-based multicore systemsThe Journal of Supercomputing10.1007/s11227-024-06184-980:13(18573-18599)Online publication date: 18-May-2024
https://doi.org/10.1007/s11227-024-06184-9
Reza M(2023)Machine Learning Enabled Solutions for Design and Optimization Challenges in Networks-on-Chip based Multi/Many-Core ArchitecturesACM Journal on Emerging Technologies in Computing Systems10.1145/359147019:3(1-26)Online publication date: 30-Jun-2023
https://dl.acm.org/doi/10.1145/3591470
Li XLi ZJu YZhang XWang RZhou W(2023)COP: A Combinational Optimization Power Budgeting Method for Manycore Systems in Dark SiliconIEEE Transactions on Computers10.1109/TC.2022.321141772:5(1356-1370)Online publication date: 1-May-2023
https://doi.org/10.1109/TC.2022.3211417
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Index Terms

Smart hill climbing for agile dynamic mapping in many-core systems
1. Computer systems organization
  1. Embedded and cyber-physical systems
    1. Embedded systems
2. Software and its engineering
  1. Software organization and properties
    1. Software system structures
      1. Embedded software
      2. Real-time systems software

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cover image ACM Conferences

DAC '13: Proceedings of the 50th Annual Design Automation Conference

May 2013

1285 pages

ISBN:9781450320719

DOI:10.1145/2463209

Copyright © 2013 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

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SIGBED: ACM Special Interest Group on Embedded Systems

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Association for Computing Machinery

New York, NY, United States

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Published: 29 May 2013

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DAC '13

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DAC '13: The 50th Annual Design Automation Conference 2013

May 29 - June 7, 2013

Texas, Austin

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Reza M(2024)High-performance application mapping in network-on-chip-based multicore systemsThe Journal of Supercomputing10.1007/s11227-024-06184-980:13(18573-18599)Online publication date: 18-May-2024
https://doi.org/10.1007/s11227-024-06184-9
Reza M(2023)Machine Learning Enabled Solutions for Design and Optimization Challenges in Networks-on-Chip based Multi/Many-Core ArchitecturesACM Journal on Emerging Technologies in Computing Systems10.1145/359147019:3(1-26)Online publication date: 30-Jun-2023
https://dl.acm.org/doi/10.1145/3591470
Li XLi ZJu YZhang XWang RZhou W(2023)COP: A Combinational Optimization Power Budgeting Method for Manycore Systems in Dark SiliconIEEE Transactions on Computers10.1109/TC.2022.321141772:5(1356-1370)Online publication date: 1-May-2023
https://doi.org/10.1109/TC.2022.3211417
Reza MMcCloud Z(2023)Heuristics-Enabled High-Performance Application Mapping in Network-on-Chip based Multicore Systems2023 IEEE International Conference on Omni-layer Intelligent Systems (COINS)10.1109/COINS57856.2023.10189228(1-6)Online publication date: 23-Jul-2023
https://doi.org/10.1109/COINS57856.2023.10189228
Wen SWang XSingh AJiang YYang M(2022)Performance Optimization of Many-Core Systems by Exploiting Task Migration and Dark Core AllocationIEEE Transactions on Computers10.1109/TC.2020.304266371:1(92-106)Online publication date: 1-Jan-2022
https://doi.org/10.1109/TC.2020.3042663
Li XLi ZJu YLin HZhou W(2021)Combinational Optimization Power (COP) - A Practical Power Budgeting Method for Many-coresIECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society10.1109/IECON48115.2021.9589269(1-6)Online publication date: 13-Oct-2021
https://doi.org/10.1109/IECON48115.2021.9589269
Wu QWang XChen J(2021)Defending against Thermal Covert Channel Attacks by Task Migration in Many-core System2021 IEEE 3rd International Conference on Circuits and Systems (ICCS)10.1109/ICCS52645.2021.9697251(111-120)Online publication date: 29-Oct-2021
https://doi.org/10.1109/ICCS52645.2021.9697251
Reza MZhao DBayoumi M(2021)Energy-efficient task-resource co-allocation and heterogeneous multi-core NoC design in dark silicon eraMicroprocessors & Microsystems10.1016/j.micpro.2021.10405586:COnline publication date: 1-Oct-2021
https://dl.acm.org/doi/10.1016/j.micpro.2021.104055
Gupta MBhargava LIndu S(2021)Mapping techniques in multicore processors: current and future trendsThe Journal of Supercomputing10.1007/s11227-021-03650-6Online publication date: 5-Feb-2021
https://doi.org/10.1007/s11227-021-03650-6
Khdr HShafique MPagani SHerkersdorf AHenkel J(2020)Combinatorial Auctions for Temperature-Constrained Resource Management in ManycoresIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2020.296552331:7(1605-1620)Online publication date: 1-Jul-2020
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