research-article

Accelerating frequent item counting with FPGA

Authors:

Yu Wang,

Huazhong YangAuthors Info & Claims

FPGA '14: Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays

Pages 109 - 112

https://doi.org/10.1145/2554688.2554766

Published: 26 February 2014 Publication History

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Abstract

Frequent item counting is one of the most important operations in time series data mining algorithms, and the space saving algorithm is a widely used approach to solving this problem. With the rapid rising of data input speeds, the most challenging problem in frequent item counting is to meet the requirement of wire-speed processing. In this paper, we propose a streaming oriented PE-ring framework on FPGA for counting frequent items. Compared with the best existing FPGA implementation, our basic PE-ring framework saves 50% lookup table resources cost and achieves the same throughput in a more scalable way. Furthermore, we adopt SIMD-like cascaded filter for further performance improvements, which outperforms the previous work by up to 3.24 times in some data distributions.

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Cited By

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Ebrahim A(2023)Finding the Top-K Heavy Hitters in Data Streams: A Reconfigurable Accelerator Based on an FPGA-Optimized AlgorithmElectronics10.3390/electronics1211237612:11(2376)Online publication date: 24-May-2023
https://doi.org/10.3390/electronics12112376
Ebrahim AKhalifat J(2023)Fast approximation of the top‐k items in data streams using FPGAsIET Computers & Digital Techniques10.1049/cdt2.1205317:2(60-73)Online publication date: 19-Feb-2023
https://doi.org/10.1049/cdt2.12053
Ebrahim A(2022)High-Level Design Optimizations for Implementing Data Stream Sketch Frequency Estimators on FPGAsElectronics10.3390/electronics1115239911:15(2399)Online publication date: 31-Jul-2022
https://doi.org/10.3390/electronics11152399
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Index Terms

Accelerating frequent item counting with FPGA
1. Hardware
  1. Very large scale integration design
    1. Application-specific VLSI designs
      1. Application specific processors
2. Information systems
  1. Information systems applications
    1. Data mining

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Published In

FPGA '14: Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays

February 2014

272 pages

ISBN:9781450326711

DOI:10.1145/2554688

General Chair:
Vaughn Betz
University of Toronto, Canada
,
Program Chair:
George A. Constantinides
Imperial College London, UK

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 26 February 2014

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FPGA'14

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SIGDA

FPGA'14: The 2014 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 26 - 28, 2014

California, Monterey, USA

Acceptance Rates

FPGA '14 Paper Acceptance Rate 30 of 110 submissions, 27%;

Overall Acceptance Rate 125 of 627 submissions, 20%

Upcoming Conference

FPGA '25

Sponsor:
sigda

The 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays

February 27 - March 1, 2025

Monterey , CA , USA

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Ebrahim A(2023)Finding the Top-K Heavy Hitters in Data Streams: A Reconfigurable Accelerator Based on an FPGA-Optimized AlgorithmElectronics10.3390/electronics1211237612:11(2376)Online publication date: 24-May-2023
https://doi.org/10.3390/electronics12112376
Ebrahim AKhalifat J(2023)Fast approximation of the top‐k items in data streams using FPGAsIET Computers & Digital Techniques10.1049/cdt2.1205317:2(60-73)Online publication date: 19-Feb-2023
https://doi.org/10.1049/cdt2.12053
Ebrahim A(2022)High-Level Design Optimizations for Implementing Data Stream Sketch Frequency Estimators on FPGAsElectronics10.3390/electronics1115239911:15(2399)Online publication date: 31-Jul-2022
https://doi.org/10.3390/electronics11152399
Bustio-Martínez LCumplido RLetras MHernández-León RFeregrino-Uribe CHernández-Palancar J(2021)FPGA/GPU-based Acceleration for Frequent Itemsets Mining: A Comprehensive ReviewACM Computing Surveys10.1145/347228954:9(1-35)Online publication date: 8-Oct-2021
https://dl.acm.org/doi/10.1145/3472289
Cai GYang SDu JWang ZHuang BGuan YSu SSu JSu S(2021)Convolution without multiplication: A general speed up strategy for CNNsScience China Technological Sciences10.1007/s11431-021-1936-2Online publication date: 11-Nov-2021
https://doi.org/10.1007/s11431-021-1936-2
Ebrahim AKhalifat J(2021)Fast Approximation of the Top-k Items in Data Streams Using a Reconfigurable AcceleratorApplied Reconfigurable Computing. Architectures, Tools, and Applications10.1007/978-3-030-79025-7_1(3-17)Online publication date: 23-Jun-2021
https://doi.org/10.1007/978-3-030-79025-7_1
Ebrahim AKhlaifat J(2020)An Efficient Hardware Architecture for Finding Frequent Items in Data Streams2020 IEEE 38th International Conference on Computer Design (ICCD)10.1109/ICCD50377.2020.00034(113-119)Online publication date: Oct-2020
https://doi.org/10.1109/ICCD50377.2020.00034
Skliarova ISklyarov VSkliarova ISklyarov V(2019)Hardware Accelerators for Data SearchFPGA-BASED Hardware Accelerators10.1007/978-3-030-20721-2_3(69-103)Online publication date: 31-May-2019
https://doi.org/10.1007/978-3-030-20721-2_3
István ZSidler DAlonso G(2017)CaribouProceedings of the VLDB Endowment10.14778/3137628.313763210:11(1202-1213)Online publication date: 1-Aug-2017
https://dl.acm.org/doi/10.14778/3137628.3137632
Bustio-Martínez LCumplido RHernández-León RBande-Serrano JFeregrino-Uribe C(2017)On the design of hardware-software architectures for frequent itemsets mining on data streamsJournal of Intelligent Information Systems10.1007/s10844-017-0461-850:3(415-440)Online publication date: 16-May-2017
https://doi.org/10.1007/s10844-017-0461-8
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Recommendations

Efficient and Versatile FPGA Acceleration of Support Counting for Stream Mining of Sequences and Frequent Itemsets

An FPGA implementation for neural networks with the FDFM processor core approach

Application-Specific FPGA using heterogeneous logic blocks

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