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Self-aligned double patterning aware pin access and standard cell layout co-optimization

Published: 30 March 2014 Publication History
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  • Abstract

    Self-Aligned Double Patterning (SADP) is being considered for use at the 10$nm$ technology node and below for routing layers with pitches down to ~50nm because it has better LER and overlay control compared to other multiple patterning candidates. To date, most of the SADP-related literature has focused on enabling SADP-legal routing in physical design tools while few attempts have been made to address the impact SADP routing has on local, standard cell (SC) I/O pin access. In this paper, we present the first study on SADP-aware pin access and layout optimization at the SC level. Accounting for SADP-specific design rules, we propose a coherent framework that uses Mixed Integer Linear Programming (MILP) and branch and bound method to simultaneously optimize SADP-based local pin access and within-cell connections. Our experimental results show that, compared with the conventional approach, our framework effectively improves pin access of the standard cells and maximizes the pin access flexibility for routing.

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    Cited By

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    • (2022)Standard Cell Full Abutment Check Method2022 IEEE 41st International Conference on Electronics and Nanotechnology (ELNANO)10.1109/ELNANO54667.2022.9926993(47-50)Online publication date: 10-Oct-2022
    • (2021)Pin Accessibility Prediction and Optimization With Deep-Learning-Based Pin Pattern RecognitionIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.304007840:11(2345-2356)Online publication date: Nov-2021
    • (2019)Pin Accessibility Prediction and Optimization with Deep Learning-based Pin Pattern RecognitionProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3317882(1-6)Online publication date: 2-Jun-2019
    • Show More Cited By

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    1. Self-aligned double patterning aware pin access and standard cell layout co-optimization

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      cover image ACM Conferences
      ISPD '14: Proceedings of the 2014 on International symposium on physical design
      March 2014
      180 pages
      ISBN:9781450325929
      DOI:10.1145/2560519
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 30 March 2014

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      Author Tags

      1. pin access
      2. self-aligned double patterning (sadp)
      3. standard cell layout

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      ISPD'14: International Symposium on Physical Design
      March 30 - April 2, 2014
      California, Petaluma, USA

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      ISPD '14 Paper Acceptance Rate 14 of 40 submissions, 35%;
      Overall Acceptance Rate 62 of 172 submissions, 36%

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      Cited By

      View all
      • (2022)Standard Cell Full Abutment Check Method2022 IEEE 41st International Conference on Electronics and Nanotechnology (ELNANO)10.1109/ELNANO54667.2022.9926993(47-50)Online publication date: 10-Oct-2022
      • (2021)Pin Accessibility Prediction and Optimization With Deep-Learning-Based Pin Pattern RecognitionIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.304007840:11(2345-2356)Online publication date: Nov-2021
      • (2019)Pin Accessibility Prediction and Optimization with Deep Learning-based Pin Pattern RecognitionProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3317882(1-6)Online publication date: 2-Jun-2019
      • (2019)Pin Access-Driven Design Rule Clean and DFM Optimized Routing of Standard Cells under Boolean ConstraintsProceedings of the 2019 International Symposium on Physical Design10.1145/3299902.3309744(41-47)Online publication date: 4-Apr-2019
      • (2018)Self-Aligned Double Patterning-Aware Detailed Routing With Double Via Insertion and Via Manufacturability ConsiderationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.271266037:3(657-668)Online publication date: Mar-2018
      • (2017)Toward Unidirectional Routing Closure in Advanced Technology NodesIPSJ Transactions on System LSI Design Methodology10.2197/ipsjtsldm.10.210(2-12)Online publication date: 2017
      • (2017)Pin Accessibility-Driven Detailed Placement RefinementProceedings of the 2017 ACM on International Symposium on Physical Design10.1145/3036669.3036679(133-140)Online publication date: 19-Mar-2017
      • (2017)Redundant Local-Loop Insertion for Unidirectional RoutingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.265181136:7(1113-1125)Online publication date: Jul-2017
      • (2017)Self-Aligned Double Patterning Lithography Aware Detailed Routing With Color PreassignmentIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2016.262262536:8(1381-1394)Online publication date: Aug-2017
      • (2017)On Benchmarking Pin Access for Nanotechnology Standard Cells2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2017.49(237-242)Online publication date: Jul-2017
      • Show More Cited By

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