research-article

Parallelizing Data Processing on FPGAs with Shifter Lists

Authors:

Gustavo Alonso,

Jens TeubnerAuthors Info & Claims

ACM Transactions on Reconfigurable Technology and Systems (TRETS), Volume 8, Issue 2

Article No.: 7, Pages 1 - 22

https://doi.org/10.1145/2629551

Published: 31 March 2015 Publication History

Abstract

Parallelism is currently seen as a mechanism to minimize the impact of the power and heat dissipation problems encountered in modern hardware. Data parallelism—based on partitioning the data—and pipeline parallelism—based on partitioning the computation—are the two main approaches to leverage parallelism on a wide range of hardware platforms.

Unfortunately, not all data processing problems are susceptible to either of those strategies. An example is the skyline operator [Börzsönyi et al. 2001], which computes the set of Pareto-optimal points within a multidimensional dataset. Existing approaches to parallelize the skyline operator are based on data parallelism. As a result, they suffer from a high overhead when merging intermediate results because of the lack of a global view of the problem inherent to partitioning the input data.

In this article, we show how to combine pipeline with data parallelism on a Field-Programmable Gate Array (FPGA) for a more efficient utilization of the available hardware parallelism. As we show in our experiments, skyline computation using our proposed technique scales linearly with the number of processing elements, and the performance we achieve on a rather small FPGA is comparable to that of a 64-core high-end server running a state-of-the-art data parallel implementation of skyline [Park et al. 2009].

The proposed approach to parallelize the skyline operator can be generalized to a wider range of data processing problems. We demonstrate this through a novel, highly parallel data structure, a shifter list, that can be efficiently implemented on an FPGA. The resulting template is easy to parametrize to implement a variety of computationally intensive operators such as frequent items, n-closest pairs, or K-means.

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Cited By

Iskandar VGhany MGöhringer D(2022)Near-memory Computing on FPGAs with 3D-stacked Memories: Applications, Architectures, and OptimizationsACM Transactions on Reconfigurable Technology and Systems10.1145/354765816:1(1-32)Online publication date: 22-Dec-2022
https://dl.acm.org/doi/10.1145/3547658
Sergiyenko AOrlova MMolchanov O(2020)Hardware-Software XML-Documents ProcessingÈlektronnoe modelirovanie10.15407/emodel.42.01.03342:1(33-50)Online publication date: 5-Feb-2020
https://doi.org/10.15407/emodel.42.01.033
Koizumi KEades PHiraki KInaba M(2018)BJR-tree: fast skyline computation algorithm using dominance relation-based tree structureInternational Journal of Data Science and Analytics10.1007/s41060-018-0098-x7:1(17-34)Online publication date: 31-Jan-2018
https://doi.org/10.1007/s41060-018-0098-x
Show More Cited By

Index Terms

Parallelizing Data Processing on FPGAs with Shifter Lists
1. Information systems
  1. Data management systems

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Published In

cover image ACM Transactions on Reconfigurable Technology and Systems

ACM Transactions on Reconfigurable Technology and Systems Volume 8, Issue 2

Special Section on FPL 2013

April 2015

129 pages

ISSN:1936-7406

EISSN:1936-7414

DOI:10.1145/2746532

Editor:
Steve Wilton
Department of Electrical and Computer Engineering/University of British Columbia/Kaiser 4112, 5500-2332 Main Mall/Vancouver, BC V6T 1Z4 Canada

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Copyright © 2015 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 31 March 2015

Accepted: 01 April 2014

Revised: 01 February 2014

Received: 01 September 2013

Published in TRETS Volume 8, Issue 2

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Deutsche Forschungsgemeinschaft (DFG) within the Collaborative Research Center SFB 876 “Providing Information by Resource-Constrained Analysis.”
Enterprise Computing Center (ECC) at ETH Zürich (http://www.ecc.ethz.ch)

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Cited By

Iskandar VGhany MGöhringer D(2022)Near-memory Computing on FPGAs with 3D-stacked Memories: Applications, Architectures, and OptimizationsACM Transactions on Reconfigurable Technology and Systems10.1145/354765816:1(1-32)Online publication date: 22-Dec-2022
https://dl.acm.org/doi/10.1145/3547658
Sergiyenko AOrlova MMolchanov O(2020)Hardware-Software XML-Documents ProcessingÈlektronnoe modelirovanie10.15407/emodel.42.01.03342:1(33-50)Online publication date: 5-Feb-2020
https://doi.org/10.15407/emodel.42.01.033
Koizumi KEades PHiraki KInaba M(2018)BJR-tree: fast skyline computation algorithm using dominance relation-based tree structureInternational Journal of Data Science and Analytics10.1007/s41060-018-0098-x7:1(17-34)Online publication date: 31-Jan-2018
https://doi.org/10.1007/s41060-018-0098-x
Kulkarni RMomin B(2018)Skyline Computation for Big DataData Science and Big Data Analytics10.1007/978-981-10-7641-1_23(267-276)Online publication date: 2-Aug-2018
https://doi.org/10.1007/978-981-10-7641-1_23
István ZSidler DAlonso G(2017)CaribouProceedings of the VLDB Endowment10.14778/3137628.313763210:11(1202-1213)Online publication date: 1-Aug-2017
https://dl.acm.org/doi/10.14778/3137628.3137632
Repetti TCerqueira JKim MSeok MHunter HMoreno JEmer JSanchez D(2017)Pipelining a triggered processing elementProceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3123939.3124551(96-108)Online publication date: 14-Oct-2017
https://dl.acm.org/doi/10.1145/3123939.3124551
Sun YWang LWang CWang Y(2017)Exploiting Stable Data Dependency in Stream Processing Acceleration on FPGAsACM Transactions on Embedded Computing Systems10.1145/309295016:4(1-26)Online publication date: 13-Jul-2017
https://dl.acm.org/doi/10.1145/3092950
Koizumi KEades PHiraki KInaba M(2017)BJR-Tree: Fast Skyline Computation Algorithm for Serendipitous Searching Problems2017 IEEE International Conference on Data Science and Advanced Analytics (DSAA)10.1109/DSAA.2017.15(272-282)Online publication date: Oct-2017
https://doi.org/10.1109/DSAA.2017.15
(2015)MEMOCODE 2015 design contestProceedings of the 2015 ACM/IEEE International Conference on Formal Methods and Models for Codesign10.1109/MEMCOD.2015.7340467(48-51)Online publication date: 1-Sep-2015
https://dl.acm.org/doi/10.1109/MEMCOD.2015.7340467

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