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An integrated design environment for performance and dependability analysis

Published: 13 June 1997 Publication History

Abstract

This paper presents an integrated design environment thatsupports the design and analysis of digital systems from initialconcept to the final implementation. The environment supports bothsystem level performance and dependability analysis from acommon modeling representation. A tool called ADEPT (AdvancedDesign Environment Prototype Tool) has been developed toimplement the environment. ADEPT is based on IEEE 1076 VHDLand uses commercial schematic capture systems as a front end viaan EDIF interface. Several examples are presented whichdemonstrate various aspects of the environment.

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  • (2002)A High-Level Petri Nets-Based Approach to Verifying Task StructuresIEEE Transactions on Knowledge and Data Engineering10.1109/69.99171914:2(316-335)Online publication date: 1-Mar-2002
  • (2002)High Performance Multiprocessor Architecture Design Methodology for Application-Specific Embedded SystemsHigh Performance Computing — HiPC 200210.1007/3-540-36265-7_10(102-111)Online publication date: 18-Dec-2002
  • (1999)A methodology for architecture exploration of heterogeneous signal processing systems1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)10.1109/SIPS.1999.822323(181-190)Online publication date: 1999
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cover image ACM Conferences
DAC '97: Proceedings of the 34th annual Design Automation Conference
June 1997
788 pages
ISBN:0897919203
DOI:10.1145/266021
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 13 June 1997

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DAC97: The 34th Design Automation Conference
June 9 - 13, 1997
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DAC '97 Paper Acceptance Rate 139 of 400 submissions, 35%;
Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (2002)A High-Level Petri Nets-Based Approach to Verifying Task StructuresIEEE Transactions on Knowledge and Data Engineering10.1109/69.99171914:2(316-335)Online publication date: 1-Mar-2002
  • (2002)High Performance Multiprocessor Architecture Design Methodology for Application-Specific Embedded SystemsHigh Performance Computing — HiPC 200210.1007/3-540-36265-7_10(102-111)Online publication date: 18-Dec-2002
  • (1999)A methodology for architecture exploration of heterogeneous signal processing systems1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)10.1109/SIPS.1999.822323(181-190)Online publication date: 1999
  • (1999)Evaluation of design space exploration strategiesProceedings 25th EUROMICRO Conference. Informatics: Theory and Practice for the New Millennium10.1109/EURMIC.1999.794512(472-476 vol.1)Online publication date: 1999
  • (1999)System Verification Using Multilevel Concurrent SimulationIEEE Micro10.1109/40.74879719:1(60-67)Online publication date: 1-Jan-1999
  • (1998)A top-down design environment for developing pipelined datapathsProceedings of the 35th annual Design Automation Conference10.1145/277044.277105(236-241)Online publication date: 1-May-1998

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