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Fast integrated tools for circuit design with FPGAs

Authors:

Stephan W. Gehring,

Stefan H.-M. LudwigAuthors Info & Claims

FPGA '98: Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays

Pages 133 - 139

https://doi.org/10.1145/275107.275133

Published: 01 March 1998 Publication History

Abstract

To implement high-density and high-speed FPGA circuits, designers need tight control over the circuit implementation process. However, current design tools are unsuited for this purpose as they lack fast turnaround times, interactiveness, and integration. We present a system for the Xilinx XC6200 FPGA, which addresses these issues. It consists of a suite of tightly integrated tools for the XC6200 architecture centered around an architecture-independent tool framework. The system lets the designer easily intervene at various stages of the design process and features design cycle times (from an HDL specification to a complete layout) in the order of seconds.

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Cited By

Mehta GPatel KPollard N(2014)On fast iterative mapping algorithms for stripe based coarse-grained reconfigurable architecturesInternational Journal of Electronics10.1080/00207217.2014.938310102:1(3-17)Online publication date: 24-Jul-2014
https://doi.org/10.1080/00207217.2014.938310
Mehta GCrawford CLuo XParde NPatel KRodgers BSistla AYadav AReisner M(2013)UNTANGLEDACM Transactions on Reconfigurable Technology and Systems10.1145/25173256:3(1-26)Online publication date: 1-Oct-2013
https://dl.acm.org/doi/10.1145/2517325
Mehta GPatel KParde NPollard N(2013)Data-Driven Mapping Using Local PatternsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2013.227254132:11(1668-1681)Online publication date: 1-Nov-2013
https://dl.acm.org/doi/10.1109/TCAD.2013.2272541
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Index Terms

Fast integrated tools for circuit design with FPGAs
1. Hardware

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Published In

cover image ACM Conferences

FPGA '98: Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays

March 1998

262 pages

ISBN:0897919785

DOI:10.1145/275107

Chairmen:
Jason Cong
Univ. of California, Los Angeles
,
Sinan Kaptanoglu
Actel Corp.

Copyright © 1998 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 March 1998

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FPGA98

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SIGDA

FPGA98: 1998 International Symposium on Field Programmable Gate Arrays

February 22 - 25, 1998

California, Monterey, USA

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

Mehta GPatel KPollard N(2014)On fast iterative mapping algorithms for stripe based coarse-grained reconfigurable architecturesInternational Journal of Electronics10.1080/00207217.2014.938310102:1(3-17)Online publication date: 24-Jul-2014
Mehta GCrawford CLuo XParde NPatel KRodgers BSistla AYadav AReisner M(2013)UNTANGLEDACM Transactions on Reconfigurable Technology and Systems10.1145/25173256:3(1-26)Online publication date: 1-Oct-2013
Mehta GPatel KParde NPollard N(2013)Data-Driven Mapping Using Local PatternsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2013.227254132:11(1668-1681)Online publication date: 1-Nov-2013
Hauck SDeHon A(2007)Reconfigurable ComputingundefinedOnline publication date: 2-Nov-2007
Zhong PMartonosi MAshar PMalik S(2006)Using configurable computing to accelerate Boolean satisfiabilityIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.76673318:6(861-868)Online publication date: 1-Nov-2006
DeHon AHuang RWawrzynek J(2006)Stochastic spatial routing for reconfigurable networksMicroprocessors and Microsystems10.1016/j.micpro.2006.02.00330:6(301-318)Online publication date: Sep-2006
DeHon A(2004)Unifying mesh- and tree-based programmable interconnectIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2004.83423712:10(1051-1065)Online publication date: 1-Oct-2004
Huang RWawrzynek JDeHon ATrimberger STessier R(2003)Stochastic, spatial routing for hypergraphs, trees, and meshesProceedings of the 2003 ACM/SIGDA eleventh international symposium on Field programmable gate arrays10.1145/611817.611830(78-87)Online publication date: 23-Feb-2003
Tessier R(2002)Fast placement approaches for FPGAsACM Transactions on Design Automation of Electronic Systems10.1145/544536.5445407:2(284-305)Online publication date: 1-Apr-2002
DeHon AHuang RWawrzynek J(2002)Hardware-assisted fast routingProceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines10.1109/FPGA.2002.1106675(205-215)Online publication date: 2002
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