Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
skip to main content
10.1145/2934583.2934607acmconferencesArticle/Chapter ViewAbstractPublication PagesislpedConference Proceedingsconference-collections
research-article

Exploiting Fully Integrated Inductive Voltage Regulators to Improve Side Channel Resistance of Encryption Engines

Published: 08 August 2016 Publication History

Abstract

This paper explores fully integrated inductive voltage regulators (FIVR) as a technique to improve the side channel resistance of encryption engines. We propose security aware design modes for low passive FIVR to improve robustness of an encryption-engine against statistical power attacks in time and frequency domain. A Correlation Power Analysis is used to attack a 128-bit AES engine synthesized in 130nm CMOS. The original design requires ~250 Measurements to Disclose (MTD) the 1st byte of key; but with security-aware FIVR, the CPA was unsuccessful even after 20,000 traces. We present a reversibility based threat model for the FIVR-based protection improvement and show the robustness of security aware FIVR against such threat.

References

[1]
P. Kocher et al, "Differential Power Analysis," Proc. Int'l Cryptology Conf. (CRYPTO), 1999.
[2]
E. Brier et al., "Correlation Power Analysis with a Leakage Model," CHES, 2004.
[3]
K. Tiri et al., "A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation," DATE, 2004.
[4]
M Rivain et al., "Provably Secure Higher-Order Masking of AES," CHES, 2010.
[5]
A. Shamir, "Protecting Smart Cards from Passive Power Analysis with Detached Power Supplies," CHES, 2000.
[6]
A. Gornik et al., "A Hardware-Based Countermeasure to Reduce Side-Channel Leakage: Design, Implementation, and Evaluation," in IEEE TCAD, Aug. 2015.
[7]
C. Tokunaga et al., "Secure AES engine with a local switched-capacitor current equalizer," IEEE ISSCC, 2009.
[8]
X. Wang et al., "Role of power grid in side channel attack and power-grid-aware secure design," DAC, 2013.
[9]
A. Singh et al., "Exploring power attack protection of resource constrained encryption engines using integrated low-drop-out regulators," IEEE/ACM ISLPED, 2015.
[10]
A. Uzun et al., "Converter-Gating: A Power Efficient and Secure On-Chip Power Delivery System," in IEEE JETCAS, June 2014.
[11]
W. Yu et al., "Leveraging on-chip voltage regulators as a countermeasure against side-channel attacks," DAC, 2014.
[12]
M. Kar et al., "Impact of inductive integrated voltage regulator on the power attack vulnerability of encryption engines: A simulation study," IEEE CICC, 2014.
[13]
E. A. Burton et al., "FIVR - Fully integrated voltage regulators on 4th generation Intel® Core™ SoCs," IEEE APEC 2014.
[14]
H. K. Krishnamurthy et al., "A 500 MHz, 68% efficient, fully on-die digitally controlled buck Voltage Regulator on 22nm Tri-Gate CMOS," in VLSIC 2014
[15]
A. M. Rahimi et al., "Compensator Design Procedure for Buck Converter with Voltage-Mode Error-Amplifier", IR App. Note.
[16]
O. Meynard et al., "Characterization of the Electromagnetic Side Channel in Frequency Domain," INSCRYPT, 2010,
[17]
M. Nassar et al., "RSM: a Small and Fast Countermeasure for AES, Secure against 1st and 2nd-order Zero-Offset SCAs" in DATE, 2012

Cited By

View all
  • (2024)A Methodology to Distribute On-Chip Voltage Regulators to Improve the Security of Hardware MaskingInformation10.3390/info1508048815:8(488)Online publication date: 16-Aug-2024
  • (2023)Securing AES Designs Against Power Analysis Attacks: A SurveyIEEE Internet of Things Journal10.1109/JIOT.2023.326568310:16(14332-14356)Online publication date: 15-Aug-2023
  • (2022)Exploiting On-Chip Voltage Regulators for Leakage Reduction in Hardware MaskingSensors10.3390/s2218702822:18(7028)Online publication date: 16-Sep-2022
  • Show More Cited By

Index Terms

  1. Exploiting Fully Integrated Inductive Voltage Regulators to Improve Side Channel Resistance of Encryption Engines

        Recommendations

        Comments

        Information & Contributors

        Information

        Published In

        cover image ACM Conferences
        ISLPED '16: Proceedings of the 2016 International Symposium on Low Power Electronics and Design
        August 2016
        392 pages
        ISBN:9781450341851
        DOI:10.1145/2934583
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

        Sponsors

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        Published: 08 August 2016

        Permissions

        Request permissions for this article.

        Check for updates

        Author Tags

        1. Countermeasures
        2. Integrated Voltage Regulators
        3. Side Channel Attacks

        Qualifiers

        • Research-article
        • Research
        • Refereed limited

        Conference

        ISLPED '16
        Sponsor:
        ISLPED '16: International Symposium on Low Power Electronics and Design
        August 8 - 10, 2016
        CA, San Francisco Airport, USA

        Acceptance Rates

        ISLPED '16 Paper Acceptance Rate 60 of 190 submissions, 32%;
        Overall Acceptance Rate 398 of 1,159 submissions, 34%

        Contributors

        Other Metrics

        Bibliometrics & Citations

        Bibliometrics

        Article Metrics

        • Downloads (Last 12 months)26
        • Downloads (Last 6 weeks)2
        Reflects downloads up to 30 Aug 2024

        Other Metrics

        Citations

        Cited By

        View all
        • (2024)A Methodology to Distribute On-Chip Voltage Regulators to Improve the Security of Hardware MaskingInformation10.3390/info1508048815:8(488)Online publication date: 16-Aug-2024
        • (2023)Securing AES Designs Against Power Analysis Attacks: A SurveyIEEE Internet of Things Journal10.1109/JIOT.2023.326568310:16(14332-14356)Online publication date: 15-Aug-2023
        • (2022)Exploiting On-Chip Voltage Regulators for Leakage Reduction in Hardware MaskingSensors10.3390/s2218702822:18(7028)Online publication date: 16-Sep-2022
        • (2021)Comprehensive Study of Side-Channel Attack on Emerging Non-Volatile MemoriesJournal of Low Power Electronics and Applications10.3390/jlpea1104003811:4(38)Online publication date: 28-Sep-2021
        • (2021)SecNVM: Power Side-Channel Elimination Using On-Chip Capacitors for Highly Secure Emerging NVMIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2021.308773429:8(1518-1528)Online publication date: Aug-2021
        • (2021)VDPred: Predicting Voltage Droop for Power-Effient 3D Multi-core Processor Design2021 13th International Conference on Computer and Automation Engineering (ICCAE)10.1109/ICCAE51876.2021.9426107(83-88)Online publication date: 20-Mar-2021
        • (2020)Enhanced Power and Electromagnetic SCA Resistance of Encryption Engines via a Security-Aware Integrated All-Digital LDOIEEE Journal of Solid-State Circuits10.1109/JSSC.2019.294594455:2(478-493)Online publication date: Feb-2020
        • (2019)Improved Power/EM Side-Channel Attack Resistance of 128-Bit AES Engines With Random Fast Voltage DitheringIEEE Journal of Solid-State Circuits10.1109/JSSC.2018.287511254:2(569-583)Online publication date: Feb-2019
        • (2018)Exploiting on-chip power management for side-channel security2018 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2018.8342043(401-406)Online publication date: Mar-2018
        • (2018)ASNI: Attenuated Signature Noise Injection for Low-Overhead Power Side-Channel Attack ImmunityIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2018.281949965:10(3300-3311)Online publication date: Oct-2018
        • Show More Cited By

        View Options

        Get Access

        Login options

        View options

        PDF

        View or Download as a PDF file.

        PDF

        eReader

        View online with eReader.

        eReader

        Media

        Figures

        Other

        Tables

        Share

        Share

        Share this Publication link

        Share on social media