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Cycle-Accurate Network on Chip Simulation with Noxim

Published: 16 August 2016 Publication History

Abstract

The on-chip communication in current Chip-MultiProcessors (CMP) and MultiProcessor-SoC (MPSoC) is mainly based on the Network-on-Chip (NoC) design paradigm. Unfortunately, it is foreseen that conventional NoC architectures cannot sustain the performance, power, and reliability requirements demanded by the next generation of manycore architectures. Recently, emerging on-chip communication technologies, like wireless Networks-on-Chip (WiNoCs), have been proposed as candidate solutions for addressing the scalability limitations of conventional multi-hop NoC architectures. In a WiNoC, a subset of network nodes are equipped with a wireless interface which allows them long-range communication in a single hop. Assessing the performance and power figures of NoC and WiNoC architectures requires the availability of simulation tools that are often limited on modeling specific network configurations. This article presents Noxim, an open, configurable, extendible, cycle-accurate NoC simulator developed in SystemC, which allows to analyze the performance and power figures of both conventional wired NoC and emerging WiNoC architectures.

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Published In

cover image ACM Transactions on Modeling and Computer Simulation
ACM Transactions on Modeling and Computer Simulation  Volume 27, Issue 1
January 2017
150 pages
ISSN:1049-3301
EISSN:1558-1195
DOI:10.1145/2982568
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 16 August 2016
Accepted: 01 June 2016
Revised: 01 May 2016
Received: 01 November 2015
Published in TOMACS Volume 27, Issue 1

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Author Tags

  1. Cycle-accurate simulator
  2. energy and power statistics
  3. networks-on-chip

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  • (2024)SCRIPT: A Multi-Objective Routing Framework for Securing Chiplet Systems against Distributed DoS AttacksProceedings of the Great Lakes Symposium on VLSI 202410.1145/3649476.3658763(78-85)Online publication date: 12-Jun-2024
  • (2024)MuchiSim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS61541.2024.00015(48-60)Online publication date: 5-May-2024
  • (2024)A survey on mapping and scheduling techniques for 3D Network-on-chipJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2024.103064147:COnline publication date: 17-Apr-2024
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  • (2023)Low-Power Bus Encoding by Ternary LWC and Quaternary Transition Signaling: From Initial Concept to Circuit DesignIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.333727732:4(682-694)Online publication date: 14-Dec-2023
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