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Monolayer Transistor SRAMs: Toward Low-Power, Denser Memory Systems

Authors:

Joydeep Rakshit,

Kartik Mohanram,

Jing GuoAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 13, Issue 2

Article No.: 18, Pages 1 - 28

https://doi.org/10.1145/2967613

Published: 02 March 2017 Publication History

Abstract

Monolayer heterojunction FETs based on vertical heterogeneous transition metal dichalcogenides (TMDCFETs) and planar black phosphorus FETs (BPFETs) have demonstrated excellent subthreshold swing, high I_ONI_OFF, and high scalability, making them attractive candidates for post-CMOS memory design. This article explores TMDCFET and BPFET SRAM design by combining atomistic self-consistent device modeling with SRAM circuit design and simulation. We perform detailed evaluations of the TMDCFET/BPFET SRAMs at a single bitcell and at SRAM array level. Our simulations show that at low operating voltages, TMDCFET/BPFET SRAMs exhibit significant advantages in static power, dynamic read/write noise margin, and read/write delay over nominal 16nm CMOS SRAMs at both bitcell and array-level implementations. We also analyze the effect of process variations on the performance of TMDCFET/BPFET SRAMs. Our simulations demonstrate that TMDCFET/BPFET SRAMs exhibit high tolerance to process variations, which is desirable for low operating voltages.

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Cited By

Duari CBirla SSingh A(2021)A 4 × 4 8T-SRAM array with single-ended read and differential write scheme for low voltage applicationsSemiconductor Science and Technology10.1088/1361-6641/abf7d336:6(065013)Online publication date: 7-May-2021
https://doi.org/10.1088/1361-6641/abf7d3

Index Terms

Monolayer Transistor SRAMs: Toward Low-Power, Denser Memory Systems
1. Hardware
  1. Emerging technologies
    1. Memory and dense storage
  2. Integrated circuits
    1. Semiconductor memory
      1. Static memory

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 13, Issue 2

Special Issue on Nanoelectronic Circuit and System Design Methods for the Mobile Computing Era and Regular Papers

April 2017

377 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/3014160

Editor:
Yuan Xie
University of California, Santa Barbara, USA

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Copyright © 2017 ACM.

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Association for Computing Machinery

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 02 March 2017

Accepted: 01 June 2016

Revised: 01 April 2016

Received: 01 October 2015

Published in JETC Volume 13, Issue 2

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Cited By

Duari CBirla SSingh A(2021)A 4 × 4 8T-SRAM array with single-ended read and differential write scheme for low voltage applicationsSemiconductor Science and Technology10.1088/1361-6641/abf7d336:6(065013)Online publication date: 7-May-2021
https://doi.org/10.1088/1361-6641/abf7d3

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