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Evaluating the feasibility of storage class memory as main memory

Authors:

Scott Lloyd,

Maya GokhaleAuthors Info & Claims

MEMSYS '16: Proceedings of the Second International Symposium on Memory Systems

Pages 437 - 441

https://doi.org/10.1145/2989081.2989118

Published: 03 October 2016 Publication History

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Abstract

Storage class memory offers the prospect of large capacity persistent memory with DRAM-like access latency. In this work, we evaluate the performance of a small set of benchmarks using SCM as main memory. We use an FPGA emulator to model a range of memory latencies spanning DRAM to latency projected for SCM and beyond. Our work highlights the performance impact of higher latency and identifies conditions by which SCM can effectively be used as main memory.

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Wang ZLiu XYang JMichailidis TSwanson SZhao J(2020)Characterizing and Modeling Non-Volatile Memory Systems2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO50266.2020.00049(496-508)Online publication date: Oct-2020
https://doi.org/10.1109/MICRO50266.2020.00049
Akram SSartor JMcKinley KEeckhout L(2019)Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS.2019.00017(93-105)Online publication date: Mar-2019
https://doi.org/10.1109/ISPASS.2019.00017
Jain ALloyd SGokhale M(2018)Microscope on Memory: MPSoC-Enabled Computer Memory System Assessments2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM.2018.00035(173-180)Online publication date: Apr-2018
https://doi.org/10.1109/FCCM.2018.00035

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MEMSYS '16: Proceedings of the Second International Symposium on Memory Systems

October 2016

463 pages

ISBN:9781450343053

DOI:10.1145/2989081

General Chair:
Bruce Jacob
University of Maryland

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Published: 03 October 2016

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MEMSYS '16: The Second International Symposium on Memory Systems

October 3 - 6, 2016

VA, Alexandria, USA

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Wang ZLiu XYang JMichailidis TSwanson SZhao J(2020)Characterizing and Modeling Non-Volatile Memory Systems2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO50266.2020.00049(496-508)Online publication date: Oct-2020
https://doi.org/10.1109/MICRO50266.2020.00049
Akram SSartor JMcKinley KEeckhout L(2019)Emulating and Evaluating Hybrid Memory for Managed Languages on NUMA Hardware2019 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS.2019.00017(93-105)Online publication date: Mar-2019
https://doi.org/10.1109/ISPASS.2019.00017
Jain ALloyd SGokhale M(2018)Microscope on Memory: MPSoC-Enabled Computer Memory System Assessments2018 IEEE 26th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM.2018.00035(173-180)Online publication date: Apr-2018
https://doi.org/10.1109/FCCM.2018.00035

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Near memory data structure rearrangement

Near memory key/value lookup acceleration

Design of heterogeneously-integrated memory system with storage class memories and NAND flash memories

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