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Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking

Published: 18 June 2017 Publication History

Abstract

Hardware has become an increasingly attractive target for attackers, yet we still largely lack tools that enable us to analyze large designs for security flaws. Information flow tracking (IFT) models provide an approach to verifying a hardware design's adherence to security properties related to isolation and reachability.
However, existing precise IFT models are usually too complex to actually use. Queries may fail to finish even for small designs when verifying relatively simple properties. It is possible to create less complex models, but these come at the cost of a severe loss of precision---they frequently indicate a property fails when in fact it passes, which means verification requires extensive additional manual investigation.
We present a new method to bridge the chasm between precision and complexity in a finer-grained, controlled, and disciplined manner. Our method allows using the most appropriate precision/complexity tradeoff for the design size and available computing resources, meaning it is now possible to create models that are not too complex to be usable, but which offer more precision (fewer false positives) than was previously possible.

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Cited By

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  • (2024)Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modelingRussian Technological Journal10.32362/2500-316X-2024-12-4-23-3912:4(23-39)Online publication date: 5-Aug-2024
  • (2021)IsadoraProceedings of the 5th Workshop on Attacks and Solutions in Hardware Security10.1145/3474376.3487286(5-15)Online publication date: 19-Nov-2021
  • (2021)Hardware Information Flow TrackingACM Computing Surveys10.1145/344786754:4(1-39)Online publication date: 3-May-2021
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cover image ACM Conferences
DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017
June 2017
533 pages
ISBN:9781450349277
DOI:10.1145/3061639
This work is licensed under a Creative Commons Attribution-ShareAlike International 4.0 License.

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Published: 18 June 2017

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View all
  • (2024)Identification of digital device hardware vulnerabilities based on scanning systems and semi-natural modelingRussian Technological Journal10.32362/2500-316X-2024-12-4-23-3912:4(23-39)Online publication date: 5-Aug-2024
  • (2021)IsadoraProceedings of the 5th Workshop on Attacks and Solutions in Hardware Security10.1145/3474376.3487286(5-15)Online publication date: 19-Nov-2021
  • (2021)Hardware Information Flow TrackingACM Computing Surveys10.1145/344786754:4(1-39)Online publication date: 3-May-2021
  • (2020)Transys: Leveraging Common Security Properties Across Hardware Designs2020 IEEE Symposium on Security and Privacy (SP)10.1109/SP40000.2020.00030(1713-1727)Online publication date: May-2020
  • (2018)TaintHLS: High-Level Synthesis For Dynamic Information Flow TrackingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.2834421(1-1)Online publication date: 2018

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