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Stealthy Dopant-Level Hardware Trojans

Published: 19 August 2013 Publication History

Abstract

In recent years, hardware Trojans have drawn the attention of governments and industry as well as the scientific community. One of the main concerns is that integrated circuits, e.g., for military or critical-infrastructure applications, could be maliciously manipulated during the manufacturing process, which often takes place abroad. However, since there have been no reported hardware Trojans in practice yet, little is known about how such a Trojan would look like, and how difficult it would be in practice to implement one.
In this paper we propose an extremely stealthy approach for implementing hardware Trojans below the gate level, and we evaluate their impact on the security of the target device. Instead of adding additional circuitry to the target design, we insert our hardware Trojans by changing the dopant polarity of existing transistors. Since the modified circuit appears legitimate on all wiring layers (including all metal and polysilicon), our family of Trojans is resistant to most detection techniques, including fine-grain optical inspection and checking against “golden chips”. We demonstrate the effectiveness of our approach by inserting Trojans into two designs — a digital post-processing derived from Intel’s cryptographically secure RNG design used in the Ivy Bridge processors and a side-channel resistant SBox implementation — and by exploring their detectability and their effects on security.

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Published In

cover image Guide Proceedings
Cryptographic Hardware and Embedded Systems - CHES 2013: 15th International Workshop, Santa Barbara, CA, USA, August 20-23, 2013. Proceedings
Aug 2013
488 pages
ISBN:978-3-642-40348-4
DOI:10.1007/978-3-642-40349-1
  • Editors:
  • Guido Bertoni,
  • Jean-Sébastien Coron

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Springer-Verlag

Berlin, Heidelberg

Publication History

Published: 19 August 2013

Author Tags

  1. Hardware Trojans
  2. malicious hardware
  3. layout modifications
  4. Trojan side-channel

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Cited By

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  • (2022)Side-Channel Analysis of the Random Number Generator in STM32 MCUsProceedings of the Great Lakes Symposium on VLSI 202210.1145/3526241.3530324(15-20)Online publication date: 6-Jun-2022
  • (2022)Obfuscating the Hierarchy of a Digital IPEmbedded Computer Systems: Architectures, Modeling, and Simulation10.1007/978-3-031-15074-6_19(303-314)Online publication date: 3-Jul-2022
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