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Toggle MUX: How X-Optimism Can Lead to Malicious Hardware

Published: 18 June 2017 Publication History
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  • Abstract

    To highlight a potential threat to hardware security, we propose a methodology to derive a trigger signal from the behavior of Verilog simulation models of field-programmable gate array (FPGA) primitives that behave X-optimistic. We demonstrate our methodology with an example trigger that is implemented using Xilinx 7 Series FPGAs. Experimental results show that it is easily possible to create a trigger signal that is '0' in simulation (pre- and post-synthesis), and '1' in hardware. We show that this kind of trigger is neither detectable by formal equivalence checks, nor by recent Trojan detection techniques. As a countermeasure, we propose to carefully reconsider the utilization of X-optimism in FPGA simulation models.

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    Cited By

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    • (2024)X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAsIEEE Access10.1109/ACCESS.2024.335313412(8983-9011)Online publication date: 2024
    • (2023)Assuring Netlist-to-Bitstream Equivalence using Physical Netlist Generation and Structural Comparison2023 International Conference on Field Programmable Technology (ICFPT)10.1109/ICFPT59805.2023.00021(142-151)Online publication date: 12-Dec-2023
    • (2023)Reflections on Trusting TrustHUB2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323782(1-9)Online publication date: 28-Oct-2023
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    cover image ACM Conferences
    DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017
    June 2017
    533 pages
    ISBN:9781450349277
    DOI:10.1145/3061639
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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    Published: 18 June 2017

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    View all
    • (2024)X-Attack 2.0: The Risk of Power Wasters and Satisfiability Don’t-Care Hardware Trojans to Shared Cloud FPGAsIEEE Access10.1109/ACCESS.2024.335313412(8983-9011)Online publication date: 2024
    • (2023)Assuring Netlist-to-Bitstream Equivalence using Physical Netlist Generation and Structural Comparison2023 International Conference on Field Programmable Technology (ICFPT)10.1109/ICFPT59805.2023.00021(142-151)Online publication date: 12-Dec-2023
    • (2023)Reflections on Trusting TrustHUB2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323782(1-9)Online publication date: 28-Oct-2023
    • (2021)Blinding HT: Hiding Hardware Trojan signals traced across multiple sequential levelsIET Circuits, Devices & Systems10.1049/cds2.1208816:1(105-115)Online publication date: 25-Jun-2021
    • (2020)X-Attack: Remote Activation of Satisfiability Don't-Care Hardware Trojans on Shared FPGAs2020 30th International Conference on Field-Programmable Logic and Applications (FPL)10.1109/FPL50879.2020.00039(185-192)Online publication date: Aug-2020
    • (2020)Ten years of hardware Trojans: a survey from the attacker's perspectiveIET Computers & Digital Techniques10.1049/iet-cdt.2020.0041Online publication date: 12-Aug-2020
    • (2019)Leveraging Unspecified Functionality in Obfuscated Hardware for Trojan and Fault Attacks2019 Asian Hardware Oriented Security and Trust Symposium (AsianHOST)10.1109/AsianHOST47458.2019.9006725(1-6)Online publication date: Dec-2019
    • (2018)Using Physical and Functional Comparisons to Assure 3rd-Party IP for Modern FPGAs2018 IEEE 3rd International Verification and Security Workshop (IVSW)10.1109/IVSW.2018.8494874(80-86)Online publication date: Jul-2018
    • (2018)FPGA Implementation of Traffic Light Controller and its Analysis in the Presence of Hardware Trojan2018 International Conference on Advances in Computing, Communications and Informatics (ICACCI)10.1109/ICACCI.2018.8554439(375-380)Online publication date: Sep-2018

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