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Analytical Performance Modeling and Validation of Intel's Xeon Phi Architecture

Published: 15 May 2017 Publication History

Abstract

Modeling the performance of scientific applications on emerging hardware plays a central role in achieving extreme-scale computing goals. Analytical models that capture the interaction between applications and hardware characteristics are attractive because even a reasonably accurate model can be useful for performance tuning before the hardware is made available. In this paper, we develop a hardware model for Intel's second-generation Xeon Phi architecture code-named Knights Landing (KNL) for the SKOPE framework. We validate the KNL hardware model by projecting the performance of minibenchmarks and application kernels. The results show that our KNL model can project the performance with prediction errors of 10% to 20%. The hardware model also provides informative recommendations for code transformations and tuning.

References

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J. Meng, X. Wu, V. Morozov, V. Vishwanath, K. Kumaran, and Valerie Taylor. 2014. SKOPE: A framework for modeling and exploring workload behavior. In 11th ACM Conference on Computing Frontiers.
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Jichi, Guo and Jiayuan, Meng and Qing, Yi and Vitali, Morozov and Kalyan, Kumaran. 2014. Analytically modeling application execution for software-hardware co-design. In IEEE 28th International Parallel & Distributed Processing Symposium.
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Darren J. Kerbyson, Henry J. Alme, Adolfy Hoisie, Fabrizio Petrini, Harvey J. Wasserman, and M. Gittings. 2001. Predictive performance and scalability modeling of a large-scale application. In SC.
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Meng, J. and Morozov, V. A. and Kumaran, K. and Vishwanath, V. and Uram, T. D. 2011. GROPHECY: GPU performance projection from CPU code skeletons. In SC.
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Cited By

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  • (2020)A Case Study on the HACCmk Routine in SYCL on Integrated Graphics2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)10.1109/IPDPSW50202.2020.00071(368-374)Online publication date: May-2020
  • (2019)Optimizing Xeon Phi for Interactive Data Analysis2019 IEEE High Performance Extreme Computing Conference (HPEC)10.1109/HPEC.2019.8916300(1-6)Online publication date: Sep-2019
  • (2018)Evaluating an OpenCL FPGA Platform for HPC: a Case Study with the HACCmk Kernel2018 IEEE High Performance extreme Computing Conference (HPEC)10.1109/HPEC.2018.8547586(1-6)Online publication date: Sep-2018
  1. Analytical Performance Modeling and Validation of Intel's Xeon Phi Architecture

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    cover image ACM Conferences
    CF'17: Proceedings of the Computing Frontiers Conference
    May 2017
    450 pages
    ISBN:9781450344876
    DOI:10.1145/3075564
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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    New York, NY, United States

    Publication History

    Published: 15 May 2017

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    Author Tags

    1. KNL
    2. analytical modeling
    3. benchmark
    4. performance
    5. projection

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    • Short-paper
    • Research
    • Refereed limited

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    CF '17
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    CF '17: Computing Frontiers Conference
    May 15 - 17, 2017
    Siena, Italy

    Acceptance Rates

    CF'17 Paper Acceptance Rate 43 of 87 submissions, 49%;
    Overall Acceptance Rate 273 of 785 submissions, 35%

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    Cited By

    View all
    • (2020)A Case Study on the HACCmk Routine in SYCL on Integrated Graphics2020 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)10.1109/IPDPSW50202.2020.00071(368-374)Online publication date: May-2020
    • (2019)Optimizing Xeon Phi for Interactive Data Analysis2019 IEEE High Performance Extreme Computing Conference (HPEC)10.1109/HPEC.2019.8916300(1-6)Online publication date: Sep-2019
    • (2018)Evaluating an OpenCL FPGA Platform for HPC: a Case Study with the HACCmk Kernel2018 IEEE High Performance extreme Computing Conference (HPEC)10.1109/HPEC.2018.8547586(1-6)Online publication date: Sep-2018

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