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Feed-Forward Routing for the Wormhole Switching Network-on-Chip of the Kalray MPPA2 Processor

Published: 14 October 2017 Publication History

Abstract

The Kalray MPPA2-256 Bostan processor network-on-chip (NoC) implements wormhole switching without virtual channels and with source routing. As shown in earlier work, this NoC can be configured for guaranteed services by solving a set of linear inequalities based on deterministic network calculus (DNC). However, DNC assumes that a unique route is assigned to each flow and requires that the set of flows be feed-forward. We show that ensuring the feed-forward flows property is equivalent to deterministic deadlock-free routing on a wormhole switching NoC. While routing each flow between its given endpoints, minimal path diversity occurs and the choice of a particular unique path for each flow has an impact on the NoC bandwidth exploitation. We cast this choice as a max-min fairness with unsplittable paths problem, whose instances are solved by enumeration and by an efficient heuristic.

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  • (2022)BiSuT: A NoC-Based Bit-Shuffling Technique for Multiple Permanent Faults MitigationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.310140641:7(2276-2289)Online publication date: Jul-2022
  • (2021)Effective On-Chip Communication for Message Passing Programs on Multi-Core ProcessorsElectronics10.3390/electronics1021268110:21(2681)Online publication date: 3-Nov-2021
  • (2021)A Qualitative Approach to Many‐core ArchitectureMulti‐Processor System‐on‐Chip 110.1002/9781119818298.ch2(27-51)Online publication date: 26-Mar-2021
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cover image ACM Conferences
NoCArc '17: Proceedings of the 10th International Workshop on Network on Chip Architectures
October 2017
63 pages
ISBN:9781450355421
DOI:10.1145/3139540
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 14 October 2017

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NoCArc '17 Paper Acceptance Rate 6 of 20 submissions, 30%;
Overall Acceptance Rate 46 of 122 submissions, 38%

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View all
  • (2022)BiSuT: A NoC-Based Bit-Shuffling Technique for Multiple Permanent Faults MitigationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.310140641:7(2276-2289)Online publication date: Jul-2022
  • (2021)Effective On-Chip Communication for Message Passing Programs on Multi-Core ProcessorsElectronics10.3390/electronics1021268110:21(2681)Online publication date: 3-Nov-2021
  • (2021)A Qualitative Approach to Many‐core ArchitectureMulti‐Processor System‐on‐Chip 110.1002/9781119818298.ch2(27-51)Online publication date: 26-Mar-2021
  • (2019)Consolidating High-Integrity, High-Performance, and Cyber-Security Functions on a Manycore ProcessorProceedings of the 56th Annual Design Automation Conference 201910.1145/3316781.3323473(1-4)Online publication date: 2-Jun-2019

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