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A Computational Temporal Logic for Superconducting Accelerators

Authors:

Georgios Tzimpragos,

Dilip Vasudevan,

Nestan Tsiskaridze,

George Michelogiannakis,

Advait Madhavan,

Timothy SherwoodAuthors Info & Claims

ASPLOS '20: Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems

Pages 435 - 448

https://doi.org/10.1145/3373376.3378517

Published: 13 March 2020 Publication History

Abstract

Superconducting logic offers the potential to perform computation at tremendous speeds and energy savings. However, a "semantic gap" lies between the level-driven logic that traditional hardware designs accept as a foundation and the pulse-driven logic that is naturally supported by the most compelling superconducting technologies. A pulse, unlike a level signal, will fire through a channel for only an instant. Arranging the network of superconducting components so that input pulses always arrive simultaneously to "logic gates'' to maintain the illusion of Boolean-only evaluation is a significant engineering hurdle. In this paper, we explore computing in a new and more native tongue for superconducting logic: time of arrival. Building on recent work in delay-based computations we show that superconducting logic can naturally compute directly over temporal relationships between pulse arrivals, that the computational relationships between those pulse arrivals can be formalized through a functional extension to a temporal predicate logic used in the verification community, and that the resulting architectures can operate asynchronously and describe real and useful computations. We verify our hypothesis through a combination of detailed analog circuit models, a formal analysis of our abstractions, and an evaluation in the context of several superconducting accelerators.

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Gonzalez-Guerrero PHuch KPatra NPopovici TMichelogiannakis G(2024)Toward Practical Superconducting Accelerators for Machine Learning Using U-SFQACM Journal on Emerging Technologies in Computing Systems10.1145/365307320:2(1-22)Online publication date: 9-Apr-2024
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A Computational Temporal Logic for Superconducting Accelerators

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cover image ACM Conferences

ASPLOS '20: Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems

March 2020

1412 pages

ISBN:9781450371025

DOI:10.1145/3373376

General Chair:
James Larus
EPFL
,
Program Chairs:
Luis Ceze
University of Washington
,
Karin Strauss
Microsoft

Copyright © 2020 ACM.

© 2020 Association for Computing Machinery. ACM acknowledges that this contribution was authored or co-authored by an employee, contractor or affiliate of the United States government. As such, the United States Government retains a nonexclusive, royalty-free right to publish or reproduce this article, or to allow others to do so, for Government purposes only.

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Published: 13 March 2020

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March 16 - 20, 2020

Lausanne, Switzerland

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Cited By

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https://doi.org/10.1007/978-3-031-73892-0_6
Gonzalez-Guerrero PHuch KPatra NPopovici TMichelogiannakis G(2024)Toward Practical Superconducting Accelerators for Machine Learning Using U-SFQACM Journal on Emerging Technologies in Computing Systems10.1145/365307320:2(1-22)Online publication date: 9-Apr-2024
https://dl.acm.org/doi/10.1145/3653073
Bairamkulov RYu MDe Micheli GDe V(2024)Unleashing the Power of T1-cells in SFQ Arithmetic CircuitsProceedings of the 61st ACM/IEEE Design Automation Conference10.1145/3649329.3658267(1-6)Online publication date: 23-Jun-2024
https://dl.acm.org/doi/10.1145/3649329.3658267
Yao ZLiu JChen XHan LSun H(2024)Efficient Verification of Multi-Agent Systems Through Parallel2024 IEEE 24th International Conference on Software Quality, Reliability and Security (QRS)10.1109/QRS62785.2024.00079(745-756)Online publication date: 1-Jul-2024
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Bairamkulov RDe Micheli G(2024)Superconductive Electronics: A 25-Year Review [Feature]IEEE Circuits and Systems Magazine10.1109/MCAS.2024.337649224:2(16-33)Online publication date: Oct-2025
https://doi.org/10.1109/MCAS.2024.3376492
Ueno YTomida YTanimoto TTanaka MTabuchi YInoue KNakamura H(2024)Inter-Temperature Bandwidth Reduction in Cryogenic QAOA MachinesIEEE Computer Architecture Letters10.1109/LCA.2023.332270023:1(9-12)Online publication date: Jan-2024
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Han ZLi ZYoshikawa NYamanashi Y(2024)High area efficiency binary neural processing elements with time-domain signals using SFQ circuitsSuperconductor Science and Technology10.1088/1361-6668/ad2fd937:4(045014)Online publication date: 14-Mar-2024
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Bautista MGonzalez-Guerrero PLyles DMichelogiannakis G(2023)Superconducting Shuttle-Flux Shift Register for Race Logic and Its ApplicationsIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2022.321002370:1(17-28)Online publication date: Jan-2023
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