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Optimizing software performance for IP frame reassembly in an integrated architecture

Published: 01 September 2000 Publication History
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References

[1]
Burger, D., and T. M. Austin. "The SimpleScalar tool set, version 2.0." Tech. Report 1342, Computer Sciences Department, University of Wisconsin-Madison, June 1997.
[2]
Cranor, C. D., R. Gopalakrishnan and P. Z. Onufryk, "Architecture Considerations for CPU and Network Interface Integration." IEEE Micro, 20(1):18-26, Jan. 2000.
[3]
Cuppu, V., et al. "A Performance Comparison of Contemporary DRAM Architectures." In Proc. of the 26th International Symposium on Computer Architecture, May 1999, pp. 222-233.
[4]
Elkateeb, A., and M. Elbeshti. "An evaluation of the AAL and ATM protocols processing requirements for the network interfaces design." In Proceedings of the 1999 Symposium on Performance Evaluation of Computer and Telecommunication Systems, Chicago, IL., July 1999, pp. 13-16.
[5]
L. Geppert. "The 100-million transistor IC." IEEE Spectrum, 36(7):23-24, July 1999.
[6]
R. J. Glaise, "A two-step Computation of Cyclic Redundancy Code CRC-32 For ATM Networks." IBM Journal of Research and Development, Vol. 41, No. 6, 1997.
[7]
R. F. Hobson and K. L. Cheung, "A High-Performance CMOS 32-Bit Parallel CRC Engine." IEEE Journal of Solid-State Circuits, Vol. 34, No.2, February 1999, pp. 233- 235.
[8]
R. Hobson and P. Wong. "A Parallel Embedded-Processor Architecture For ATM Reassembly." IEEE/ACM Transactions on Networking, Vol. 7, No. 1, February 1999, pp. 23-37.
[9]
IBM Corporation, "Synchronous DRAMS: The DRAM of the Future," IBM MicroNews, First Quarter 1996. http://www.chips.ibm.com.
[10]
N. Manjikian and P. R. McHardy. "An object-oriented framework for execution-driven architectural simulation." In Proceedings of the 1999 Symposium on Performance Evaluation of Computer and Telecommunication Systems, Chicago, IL., July 1999, pp. 227-231.
[11]
Motorola Corporation, "MPC7400 RISC Microprocessor Technical Summary," Document MPC7400TS/D, Rev. 0, August 1999. http://www.motorola.com/SPS/PowerPC/AltiVec
[12]
D. Patterson, T. Anderson, N. Cardwell, R. Fromm, K. Keeton, C. Kozyrakis, R. Thomas, and K. Yelick. "A case for intelligent RAM." IEEE Micro, 17(2):34-44, April 1996.
[13]
W. Stallings. Data and Computer Communication. Prentice- Hall, Upper Saddle River, NJ, 1997.

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  • (2003)Evolution and research applications of an objected-oriented framework for architectural simulation2003 IEEE Pacific Rim Conference on Communications Computers and Signal Processing (PACRIM 2003) (Cat. No.03CH37490)10.1109/PACRIM.2003.1235873(684-687)Online publication date: 2003

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cover image ACM Conferences
WOSP '00: Proceedings of the 2nd international workshop on Software and performance
September 2000
226 pages
ISBN:158113195X
DOI:10.1145/350391
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 September 2000

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Author Tags

  1. asynchronous transfer mode
  2. communication processors
  3. computer architecture
  4. event-driven simulation
  5. software performance

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WOSP '00 Paper Acceptance Rate 30 of 36 submissions, 83%;
Overall Acceptance Rate 149 of 241 submissions, 62%

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  • (2003)Evolution and research applications of an objected-oriented framework for architectural simulation2003 IEEE Pacific Rim Conference on Communications Computers and Signal Processing (PACRIM 2003) (Cat. No.03CH37490)10.1109/PACRIM.2003.1235873(684-687)Online publication date: 2003

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