research-article

A Segmented Adaptive Router for Near Energy-Proportional Networks-on-Chip

Authors:

Maxime France-Pillois,

Abdoulaye Gamatié,

Gilles SassatelliAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 21, Issue 4

Article No.: 40, Pages 1 - 27

https://doi.org/10.1145/3529106

Published: 23 August 2022 Publication History

Abstract

A Network-on-Chip (NoC) is an essential component of a chip multiprocessor (CMP) which however contributes to a large fraction of system energy. The unpredictability of traffic across a NoC frequently involves an expensive over-sizing of NoC resources which in turn leads to a significant contribution to the CMP power consumption. There exists a body of work addressing this issue, however so far solutions fall short when aiming for power reduction whilst maintaining high NoC performance. This paper proposes to combine router architecture optimizations with smart resource management to overcome this limitation. Based on a fully segmented architecture, we present an online adaptive router adjusting its active routing resources to meet the current traffic demand. This enhanced power-gating strategy significantly decreases both static and dynamic power consumption of the NoC, up to 70% for synthetic traffic patterns and up to 58% for real traffic workloads, while preserving NoC latency and throughput. Thanks to these adaptive power-saving mechanisms the proposed segmented NoC router provides near energy-proportional operation across the range of used benchmarks.

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Cited By

Jadhav SChaudhari B(2024)Embedded systems for low-power applicationsTinyML for Edge Intelligence in IoT and LPWAN Networks10.1016/B978-0-44-322202-3.00007-5(13-26)Online publication date: 2024
https://doi.org/10.1016/B978-0-44-322202-3.00007-5
Matin MMehranzadeh AChekin MMosleh M(2024)HTPA: a hybrid traffic pattern aware arbitration strategy for network on chip systemsCluster Computing10.1007/s10586-024-04568-3Online publication date: 27-May-2024
https://doi.org/10.1007/s10586-024-04568-3
Zhou WOuyang YXu DHuang ZLiang HWen X(2023)Energy-Efficient Multiple Network-on-Chip Architecture With Bandwidth ExpansionIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.324485931:4(442-455)Online publication date: 1-Apr-2023
https://dl.acm.org/doi/10.1109/TVLSI.2023.3244859

Index Terms

A Segmented Adaptive Router for Near Energy-Proportional Networks-on-Chip
1. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Interconnection architectures
  2. Real-time systems
    1. Real-time system architecture
2. Networks
  1. Network properties
    1. Network dynamics
  2. Network types
    1. Network on chip

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Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 21, Issue 4

July 2022

330 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/3551651

Editor:
Tulika Mitra
National University of Singapore, Singapore

Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Association for Computing Machinery

New York, NY, United States

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 23 August 2022

Online AM: 12 April 2022

Accepted: 01 March 2022

Revised: 01 February 2022

Received: 01 November 2021

Published in TECS Volume 21, Issue 4

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Cited By

Jadhav SChaudhari B(2024)Embedded systems for low-power applicationsTinyML for Edge Intelligence in IoT and LPWAN Networks10.1016/B978-0-44-322202-3.00007-5(13-26)Online publication date: 2024
https://doi.org/10.1016/B978-0-44-322202-3.00007-5
Matin MMehranzadeh AChekin MMosleh M(2024)HTPA: a hybrid traffic pattern aware arbitration strategy for network on chip systemsCluster Computing10.1007/s10586-024-04568-3Online publication date: 27-May-2024
https://doi.org/10.1007/s10586-024-04568-3
Zhou WOuyang YXu DHuang ZLiang HWen X(2023)Energy-Efficient Multiple Network-on-Chip Architecture With Bandwidth ExpansionIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.324485931:4(442-455)Online publication date: 1-Apr-2023
https://dl.acm.org/doi/10.1109/TVLSI.2023.3244859

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