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Introduction to Special Section on FPT’20

Published: 15 February 2023 Publication History

1 Introduction

FPT’20, the 19th International Conference on Field-Programmable Technology is widely considered the premier conference on reconfigurable technology in the Asia-Pacific region. Field-programmable devices promise the flexibility of software with the performance of hardware. The development and application of field-programmable technology have become important topics of research and development. Field-programmable technology is widely applied in high-performance computing systems, embedded and low-power control instruments, mobile communications, rapid prototyping, and product emulation, among other areas.
Following the success of FPT over the years, the technical program of FPT’20 was organized and managed similarly to previous years, however, with the significant difference that the Covid-19 pandemic forced a fully virtual conference. Despite the late change to a virtual conference, it received 85 paper submissions. After a thorough double-blind peer-review process with three or more reviewers per paper, the international program committee selected 21 full papers, 20 short papers, and 11 poster abstracts for the conference program. These papers cover a wide area of topics and were arranged in eight tracks:
Machine Learning, AI, and Neural Networks
Convolutional Neural Networks (CNN)
Placement and Routing
Security and Cryptography
FPGA Accelerators in Cloud or Network
FPGA Architectures, Technology, and Soft-core Processors
FPGA Design Techniques and Tools
High-throughput Data Processing and Embedded Platforms
Among the 21 full papers (25% acceptance rate), we invited the 9 most outstanding ones to submit an extended version of their manuscript for publication in this journal. The received submissions underwent the same rigorous peer-review process as is standard for ACM TRETS papers. Four papers were accepted for publication after this process and are presented in this special issue:
Jitter-based Adaptive True Random Number Generation Circuits for FPGAs in the Cloud – Track: Security and Cryptography. A True Random Number Generator (TRNG) is proposed that does not rely on conventionally used ring oscillators, but instead uses as its entropy source clock-jitter. This makes such a TRNG usable for FPGA cloud instances that disallow the use of ring oscillators.
Remarn: A Reconfigurable Multi-threaded Multi-core Accelerator for Recurrent Neural Networks – Track: Machine Learning, AI, and Neural Networks. Recurrent Neural Networks (RNN) are popular for many applications, but efficient acceleration for RNN inference is challenging due to its recurrent nature and data dependencies. This article proposes a multi-threaded neural processing unit (NPU) for RNN/LSTM inferences that is suited for cloud-based NPUs. Its efficiency gains stem from the use of logical and physical NPUs that improve resource utilisation.
A High-throughput, Resource-efficient Implementation of the RoCEv2 Remote DMA Protocol and its Application – Track: FPGA Accelerators in Cloud or Network. This article addresses the standalone use of FPGAs as Network Attached Accelerators (NAA). To this end, the authors propose a framework incorporating a network stack that implements RDMA over Converged Ethernet v2 (RoCEv2) by Infiniband and UDP/IP communication for high speed and low latency data transfer.
An Optimized GIB Routing Architecture with Bent Wires for FPGA – Track: FPGA Architectures, Technology, and Soft-core Processors. This article presents a unidirectional routing architecture that supports both straight and bent wire segments. Switch boxes and connection boxes are combined in one block, which is referred to as a General Interconnection Block (GIB). The article shows improved FPGA performance with the proposed architecture.
Before we leave you to enjoy reading these articles, we would like to thank all authors for their submissions of high-quality manuscripts and all reviewers for their excellent job in ensuring that first-class papers were selected and that they were further improved with their valuable comments. We would also like to thank the general chair Mingjie Lin for his support as well as the organizing committee and the steering committee and all who helped us organize such a strong and attractive program. Last, but not least, we would like to thank Deming Chen (ACM TRETS’ Editor-in-Chief) and his team at TRETS, in particular, Megan E. Shuler (ACM TRETS Editorial Associate), for their support in putting this special issue together. Enjoy the articles. We hope to see you soon in-person at the next FPT conference.
Oliver Sinnen
University of Auckland, New Zealand
FPT’20 Program Co-chair
Qiang Liu
Tianjin University, China
FPT’20 Program Co-chair
Azadeh Davoodi
University of Wisconsin-Madison, WI
ACM TRETS Guest Editors

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Published In

cover image ACM Transactions on Reconfigurable Technology and Systems
ACM Transactions on Reconfigurable Technology and Systems  Volume 16, Issue 1
March 2023
403 pages
ISSN:1936-7406
EISSN:1936-7414
DOI:10.1145/35733111
  • Editor:
  • Deming Chen
Issue’s Table of Contents

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 February 2023
Published in TRETS Volume 16, Issue 1

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