Article

Design technology productivity in the DSM era (invited talk)

Author:

Andrew B. KahngAuthors Info & Claims

ASP-DAC '01: Proceedings of the 2001 Asia and South Pacific Design Automation Conference

Pages 443 - 448

https://doi.org/10.1145/370155.370510

Published: 30 January 2001 Publication History

Abstract

Future requirements for design technology are always uncertain due to changes in process technology, system implementation platforms, and applications markets. To correctly identify the design technology need, and to deliver this technology at the right time, the design technology community - commercial vendors, captive CAD organizations, and academic researchers - must focus on improving design technology time-to-market and quality-of-result. Put another way, we must address the well-known Design Productivity Gap by addressing the Design Technology Productivity Gap. The future of design technology is most uncertain in the physical implementation space, where many complexities must be managed without sacrificing system value or turnaround time. This talk will begin with examples of changes in methodology and design tool infrastructure needed to support future physical implementation. Then, recent initiatives in the MARCO Gigascale Silicon Research Center (GSRC) are described which support the design technology and designer communities in creating the right design technology when it is needed.

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Cited By

Kahng ALuo MNam GNath SPan DRobins GMarculescu DLiu F(2015)Toward Metrics of Design Automation Research ImpactProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840857(263-270)Online publication date: 2-Nov-2015
https://dl.acm.org/doi/10.5555/2840819.2840857
Kahng ALuo MNam GNath SPan DRobins G(2015)Toward metrics of design automation research impact2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2015.7372579(263-270)Online publication date: Nov-2015
https://doi.org/10.1109/ICCAD.2015.7372579
Kundu SLerner SGupta RKundu SLerner SGupta R(2011)IntroductionHigh-Level Verification10.1007/978-1-4419-9359-5_1(1-9)Online publication date: 2-Apr-2011
https://doi.org/10.1007/978-1-4419-9359-5_1
Show More Cited By

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Design technology productivity in the DSM era (invited talk)

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cover image ACM Conferences

ASP-DAC '01: Proceedings of the 2001 Asia and South Pacific Design Automation Conference

January 2001

662 pages

ISBN:0780366344

DOI:10.1145/370155

Chairman:
Satoshi Goto
NEC Corp., Kawasaki, Japan

Copyright © 2001 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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IEICE: Inst of Electronics, Info & Communication Engineers
IPSJ: Information Processing Society of Japan
SIGDA: ACM Special Interest Group on Design Automation
IEEE HK CAS: IEEE HK CAS and Comm. Joint Chapter

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 30 January 2001

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ASP-DAC01: Asia and South Pacific Design Automation Conference 2001

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

Kahng ALuo MNam GNath SPan DRobins GMarculescu DLiu F(2015)Toward Metrics of Design Automation Research ImpactProceedings of the IEEE/ACM International Conference on Computer-Aided Design10.5555/2840819.2840857(263-270)Online publication date: 2-Nov-2015
https://dl.acm.org/doi/10.5555/2840819.2840857
Kahng ALuo MNam GNath SPan DRobins G(2015)Toward metrics of design automation research impact2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1109/ICCAD.2015.7372579(263-270)Online publication date: Nov-2015
https://doi.org/10.1109/ICCAD.2015.7372579
Kundu SLerner SGupta RKundu SLerner SGupta R(2011)IntroductionHigh-Level Verification10.1007/978-1-4419-9359-5_1(1-9)Online publication date: 2-Apr-2011
https://doi.org/10.1007/978-1-4419-9359-5_1
Kundu SLerner SGupta R(2009)High-Level VerificationIPSJ Transactions on System LSI Design Methodology10.2197/ipsjtsldm.2.1312(131-144)Online publication date: 2009
https://doi.org/10.2197/ipsjtsldm.2.131
Bazeghi CMesa-Martinez FRenau J(2009)System and Procesor Design Effort EstimationVLSI-SoC: Advanced Topics on Systems on a Chip10.1007/978-0-387-89558-1_14(1-21)Online publication date: 11-Feb-2009
https://doi.org/10.1007/978-0-387-89558-1_14
Biest ARichard AMilojevic DRobert F(2007)A framework introducing model reversibility in SoC design space explorationProceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation10.5555/1776200.1776230(211-221)Online publication date: 16-Jul-2007
https://dl.acm.org/doi/10.5555/1776200.1776230
Bazeghi CMesa-Martinez FGreskamp BTorrellas JRenau J(2007)Estimating design time for system circuits2007 IFIP International Conference on Very Large Scale Integration10.1109/VLSISOC.2007.4402473(60-65)Online publication date: Oct-2007
https://doi.org/10.1109/VLSISOC.2007.4402473
Hutton MYuan RSchleicher JBaeckler GCheung SChua KPhoo HGielen G(2006)A methodology for FPGA to structured-ASIC synthesis and verificationProceedings of the conference on Design, automation and test in Europe: Designers' forum10.5555/1131355.1131369(64-69)Online publication date: 6-Mar-2006
https://dl.acm.org/doi/10.5555/1131355.1131369
Sarkar SChandar G. SShinde S(2005)Effective IP reuse for high quality SOC design2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics10.1109/SOCC.2005.1554498(215-224)Online publication date: 2005
https://doi.org/10.1109/SOCC.2005.1554498

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