Article

A scheduling and resource allocation algorithm for hierarchical signal flow graphs

Authors:

M. Potkonjack,

J. RabaeyAuthors Info & Claims

DAC '89: Proceedings of the 26th ACM/IEEE Design Automation Conference

Pages 7 - 12

https://doi.org/10.1145/74382.74385

Published: 01 June 1989 Publication History

Abstract

The paper describes a new algorithm for the scheduling and resource allocation problem in high-level synthesis. The algorithm can not only efficiently treat flattened signal flow graphs, but also handles graphs with embedded control constructs such as conditional branches and loops. Based on simple and clear, but powerful principles, the algorithm simultaneously minimizes the number of execution units, the number of registers and the amount of interconnections. The algorithm has been implemented and we present the first results, which are very promising.

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Verhaegh WAarts Evan Gorp PLippens P(2006)A two-stage solution approach to multidimensional periodic schedulingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.95273620:10(1185-1199)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.952736
Lakshminarayana GJha N(2006)High-level synthesis of power-optimized and area-optimized circuits from hierarchical data-flow intensive behaviorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.74815718:3(265-281)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.748157
Diril ADhillon YKyu-won Choi Chatterjee A(2003)An O(N) supply voltage assignment algorithm for low-energy serially connected CMOS modules and a heuristic extension to acyclic data flow graphsIEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings.10.1109/ISVLSI.2003.1183443(173-179)Online publication date: 2003
https://doi.org/10.1109/ISVLSI.2003.1183443
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A scheduling and resource allocation algorithm for hierarchical signal flow graphs

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Published In

DAC '89: Proceedings of the 26th ACM/IEEE Design Automation Conference

June 1989

839 pages

ISBN:0897913108

DOI:10.1145/74382

Chairman:
Donald E. Thomas
Carnegie Mellon Univ., Pittsburgh, PA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 June 1989

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DAC89

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IEEE-CS\TCDA
SIGDA

DAC89: The 26th ACM/IEEE-CS Design Automation Conference

June 25 - 28, 1989

Nevada, Las Vegas, USA

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DAC '89 Paper Acceptance Rate 156 of 465 submissions, 34%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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DAC '25

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62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

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Cited By

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Verhaegh WAarts Evan Gorp PLippens P(2006)A two-stage solution approach to multidimensional periodic schedulingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.95273620:10(1185-1199)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.952736
Lakshminarayana GJha N(2006)High-level synthesis of power-optimized and area-optimized circuits from hierarchical data-flow intensive behaviorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.74815718:3(265-281)Online publication date: 1-Nov-2006
https://dl.acm.org/doi/10.1109/43.748157
Diril ADhillon YKyu-won Choi Chatterjee A(2003)An O(N) supply voltage assignment algorithm for low-energy serially connected CMOS modules and a heuristic extension to acyclic data flow graphsIEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings.10.1109/ISVLSI.2003.1183443(173-179)Online publication date: 2003
https://doi.org/10.1109/ISVLSI.2003.1183443
Hartenstein R(2001)A decade of reconfigurable computingProceedings of the conference on Design, automation and test in Europe10.5555/367072.367839(642-649)Online publication date: 13-Mar-2001
https://dl.acm.org/doi/10.5555/367072.367839
Hartenstein RGoto S(2001)Coarse grain reconfigurable architecture (embedded tutorial)Proceedings of the 2001 Asia and South Pacific Design Automation Conference10.1145/370155.370535(564-570)Online publication date: 30-Jan-2001
https://dl.acm.org/doi/10.1145/370155.370535
Hartenstein R(2001)A decade of reconfigurable computing: a visionary retrospectiveProceedings Design, Automation and Test in Europe. Conference and Exhibition 200110.1109/DATE.2001.915091(642-649)Online publication date: 2001
https://doi.org/10.1109/DATE.2001.915091
Hartenstein R(2001)Coarse grain reconfigurable architecturesProceedings of the ASP-DAC 2001. Asia and South Pacific Design Automation Conference 2001 (Cat. No.01EX455)10.1109/ASPDAC.2001.913368(564-569)Online publication date: 2001
https://doi.org/10.1109/ASPDAC.2001.913368
Kim HHa D(1999)A High-Level BIST Synthesis Method Based on a Region-wise Heuristic for an Integer Linear ProgrammingProceedings of the 1999 IEEE International Test Conference10.5555/518925.939443Online publication date: 28-Sep-1999
https://dl.acm.org/doi/10.5555/518925.939443
Kim HHa DTakahashi T(1999)On ILP formulations for built-in self-testable data path synthesisProceedings of the 36th annual ACM/IEEE Design Automation Conference10.1145/309847.310048(742-747)Online publication date: 1-Jun-1999
https://dl.acm.org/doi/10.1145/309847.310048
Kim HTakahashi THa D(1998)Test session oriented built-in self-testable data path synthesisProceedings of the 1998 IEEE International Test Conference10.5555/648020.745469(154-163)Online publication date: 18-Oct-1998
https://dl.acm.org/doi/10.5555/648020.745469
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A Memetic Algorithm for Resource Allocation Problem Based on Node-Weighted Graphs [Application Notes]

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A Memetic Algorithm for Resource Allocation Problem Based on Node-Weighted Graphs [Application Notes]

Scheduling conditional data-flow graphs with resource sharing

Resource Allocation Schemes for Gang Scheduling

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