Article

Exploiting task-level concurrency in a programmable network interface

Authors:

Hyong-youb Kim,

Vijay S. Pai, and

Scott RixnerAuthors Info & Claims

PPoPP '03: Proceedings of the ninth ACM SIGPLAN symposium on Principles and practice of parallel programming

June 2003

Pages 61 - 72

https://doi.org/10.1145/781498.781506

Published: 11 June 2003 Publication History

Abstract

Programmable network interfaces provide the potential to extend the functionality of network services but lead to instruction processing overheads when compared to application-specific network interfaces. This paper aims to offset those performance disadvantages by exploiting task-level concurrency in the workload to parallelize the network interface firmware for a programmable controller with two processors. By carefully partitioning the handler procedures that process various events related to the progress of a packet, the system can minimize sharing, achieve load balance, and efficiently utilize on-chip storage. Compared to the uniprocessor firmware released by the manufacturer, the parallelized network interface firmware increases throughput by 65% for bidirectional UDP traffic of maximum-sized packets, 157% for bidirectional UDP traffic of minimum-sized packets, and 32--107% for real network services. This parallelization results in performance within 10--20% of a modern ASIC-based network interface for real network services.

References

[1]

Alteon WebSystems. Gigabit Ethernet/PCI Network Interface Card: Host/NIC Software Interface Definition, July 1999. Revision 12.4.13.]]

[2]

M. Björkman and P. Gunningberg. Locking effects in multiprocessor implementations of protocols. In Proceedings of the ACM SIGCOMM '93 Conference, pages 74--83. ACM Press, 1993.]]

Digital Library

[3]

N. J. Boden, D. Cohen, R. E. Felderman, A. E. Kulawik, C. L. Seitz, J. N. Seizovic, and W.-K. Su. Myrinet: A Gigabit-per-Second Local Area Network. IEEE MICRO, 15(1):29--36, 1995.]]

Digital Library

[4]

P. Buonadonna and D. Culler. Queue Pair IP: A Hybrid Architecture for System Area Networks. In Proceedings of the 29th International Symposium on Computer Architecture, pages 247--256, May 2002.]]

Digital Library

[5]

A. Gallatin, J. Chase, and K. Yocum. Trapeze/IP: TCP/IP at Near-Gigabit Speeds. In Proceedings of the FREENIX Track: 1999 USENIX Annual Technical Conference, June 1999.]]

Digital Library

[6]

N. C. Hutchinson and L. L. Peterson. The x-Kernel: An Architecture for Implementing Network Protocols. IEEE Transactions on Software Engineering, 17(1):64--76, Jan. 1991.]]

Digital Library

[7]

H. Kim, V. S. Pai, and S. Rixner. Improving Web Server Throughput with Network Interface Data Caching. In Proceedings of the Tenth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 239--250, October 2002.]]

Digital Library

[8]

R. Morris, E. Kohler, J. Jannotti, and M. F. Kaashoek. The click modular router. ACM SIGOPS Operating Systems Review, 34(2):24--25, 2000.]]

Digital Library

[9]

T. Mudge. Power: A First-Class Architectural Design Constraint. Computer, 34(4):52--58, April 2001.]]

Digital Library

[10]

E. M. Nahum, D. J. Yates, J. F. Kurose, and D. F. Towsley. Performance Issues in Parallelized Network Protocols. In Proceedings of the Operating Systems Design and Implementation, pages 125--137, 1994.]]

Digital Library

[11]

J. Poskanzer. thttpd - tiny/turbo/throttling HTTP server. Acme Labs, Feb. 2000. Unix manual page.]]

[12]

I. Pratt and K. Fraser. Arsenic: A User-Accessible Gigabit Ethernet Interface. In Proceedings of IEEE INFOCOM '01, pages 67--76, 2001.]]

[13]

J. Satran, K. Meth, C. Sapuntzakis, M. Chadalapaka, and E. Zeidner. iSCSI. IETF Internet draft draft-ietf-ips-iscsi-14.txt, work in progress, July 2002.]]

[14]

P. Shivam, P. Wyckoff, and D. Panda. EMP: Zero-copy OS-bypass NIC-driven Gigabit Ethernet Message Passing. In Proceedings of the 2001 ACM/IEEE Conference on Supercomputing (SC2001), Nov. 2001.]]

Digital Library

[15]

P. Shivam, P. Wyckoff, and D. Panda. Can User-Level Protocols Take Advantage of Multi-CPU NICs? In Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS'02), pages 64--69, Apr. 2002.]]

Digital Library

Cited By

Wu QLi RBeard JJohn LRodríguez GSadayappan PSukumaran-Rajam A(2024)BLQ: Light-Weight Locality-Aware Runtime for Blocking-Less QueuingProceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction10.1145/3640537.3641568(100-112)Online publication date: 17-Feb-2024
https://dl.acm.org/doi/10.1145/3640537.3641568
Hoefler TDi Girolamo STaranov KGrant RBrightwell RMohr BRaghavan P(2017)sPINProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1145/3126908.3126970(1-16)Online publication date: 12-Nov-2017
https://dl.acm.org/doi/10.1145/3126908.3126970
Watkins LRobinson WBeyah R(2015)Using Network Traffic to Infer Hardware StateACM Transactions on Embedded Computing Systems10.1145/270009414:3(1-22)Online publication date: 30-Apr-2015
https://dl.acm.org/doi/10.1145/2700094
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Index Terms

Exploiting task-level concurrency in a programmable network interface
1. Computing methodologies
  1. Parallel computing methodologies
    1. Parallel programming languages
2. Software and its engineering
  1. Software notations and tools
    1. General programming languages
      1. Language types
        Parallel programming languages

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Published In

cover image ACM Conferences

PPoPP '03: Proceedings of the ninth ACM SIGPLAN symposium on Principles and practice of parallel programming

June 2003

250 pages

ISBN:1581135882

DOI:10.1145/781498

General Chair:
Rudolf Eigenmann
Purdue University
,
Program Chair:
Martin Rinard
MIT Laboratory for Computer Science

ACM SIGPLAN Notices Volume 38, Issue 10
Proceedings of the ACM SIGPLAN symposium on principles and practice of parallel programming (PPoPP 2003) and workshop on partial evaluation and semantics-based program manipulation (PEPM 2003)
October 2003
331 pages
ISSN:0362-1340
EISSN:1558-1160
DOI:10.1145/966049
Issue’s Table of Contents

Copyright © 2003 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 11 June 2003

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PPoPP03

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PPoPP03: ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming

June 11 - 13, 2003

California, San Diego, USA

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PPoPP '03 Paper Acceptance Rate 20 of 45 submissions, 44%;

Overall Acceptance Rate 230 of 1,014 submissions, 23%

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Cited By

Wu QLi RBeard JJohn LRodríguez GSadayappan PSukumaran-Rajam A(2024)BLQ: Light-Weight Locality-Aware Runtime for Blocking-Less QueuingProceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction10.1145/3640537.3641568(100-112)Online publication date: 17-Feb-2024
https://dl.acm.org/doi/10.1145/3640537.3641568
Hoefler TDi Girolamo STaranov KGrant RBrightwell RMohr BRaghavan P(2017)sPINProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1145/3126908.3126970(1-16)Online publication date: 12-Nov-2017
https://dl.acm.org/doi/10.1145/3126908.3126970
Watkins LRobinson WBeyah R(2015)Using Network Traffic to Infer Hardware StateACM Transactions on Embedded Computing Systems10.1145/270009414:3(1-22)Online publication date: 30-Apr-2015
https://dl.acm.org/doi/10.1145/2700094
Elbeshti MDixon MKoziniec T(2012)Cost effective RISC core supporting the large sending offload2012 International Symposium on Communications and Information Technologies (ISCIT)10.1109/ISCIT.2012.6381020(844-849)Online publication date: Oct-2012
https://doi.org/10.1109/ISCIT.2012.6381020
Elbeshti MDixon MKoziniec T(2012)Design a scalable ethernet Network Interface supporting the Large Receive Offload2012 International Symposium on Communications and Information Technologies (ISCIT)10.1109/ISCIT.2012.6380959(544-549)Online publication date: Oct-2012
https://doi.org/10.1109/ISCIT.2012.6380959
Elbeshti MDixon M(2011)A Study Using a Risc Core for 100 Gbps Ethernet Network InterfacesAdvanced Materials Research10.4028/www.scientific.net/AMR.403-408.522403-408(522-531)Online publication date: Nov-2011
https://doi.org/10.4028/www.scientific.net/AMR.403-408.522
Watkins LRobinson WBeyah R(2010)A Passive Solution to the Memory Resource Discovery Problem in Computational ClustersIEEE Transactions on Network and Service Management10.1109/TNSM.2010.1012.03267:4(218-230)Online publication date: Dec-2010
https://doi.org/10.1109/TNSM.2010.1012.0326
Ortiz AOrtega JDíaz APrieto A(2010)Network interfaces for programmable NICs and multicore platformsComputer Networks: The International Journal of Computer and Telecommunications Networking10.1016/j.comnet.2009.09.01154:3(357-376)Online publication date: 1-Feb-2010
https://dl.acm.org/doi/10.1016/j.comnet.2009.09.011
Ortiz AOrtega JDiaz APrieto A(2009)A New Offloaded/Onloaded Network Interface for High Performance CommunicationProceedings of the 2009 17th Euromicro International Conference on Parallel, Distributed and Network-based Processing10.1109/PDP.2009.29(143-150)Online publication date: 18-Feb-2009
https://dl.acm.org/doi/10.1109/PDP.2009.29
Watkins LBeyah RCorbett C(2008)Passive Identification of Under-Utilized CPUs in High Performance Cluster Grid Networks2008 IEEE International Conference on Communications10.1109/ICC.2008.82(408-413)Online publication date: May-2008
https://doi.org/10.1109/ICC.2008.82
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