2012 IEEE 62nd Electronic Components and Technology Conference, 2012
ABSTRACT The semiconductor industry has followed the Moore's Law for more than 40 years. ... more ABSTRACT The semiconductor industry has followed the Moore's Law for more than 40 years. The concept of scaling based on this law is now approaching the end and to maintain the same scaling concept new routes are being investigated. These new routes are commonly identified as 'More-than-Moore' technologies and the most important of them is 3D-IC integration. By 3D-IC Integration it is possible to put more transistors on the same footprint without the need to shrink transistor sizes. However, as for any new technology, there are many challenges and issues that need to be addressed before moving to high volume manufacturing [1]. In this work we present the challenges and required improvements identified for 3D stacking in case of ultra thin devices with TSVs (Thru Silicon Vias). In particular, the challenges related to wafer thinning, flip chip bumping, 3D stacking and packaging.
2014 IEEE 18th Workshop on Signal and Power Integrity (SPI), 2014
ABSTRACT A test system for memory-logic communications in silicon interposer is introduced as wel... more ABSTRACT A test system for memory-logic communications in silicon interposer is introduced as well as a performance analysis methodology including a fitted model based on eye diagram measurements. First results of the test system with 9 and 18 mm-long interconnects and a 5 channel bus of micro-strip lines with 2-2 and 5-5 μm width and spacing (W-S), targeting Wide-IO communication standard are presented. Measured eye diagrams allow us to compare the performance of the different test systems in combination with a fitted model. All considered systems show operation frequencies higher than 200 MHz for an eye height of at least 35 %. It is demonstrated that the communication system performance is mainly dominated due to weak driver strength (RS > 250 Ω) and secondly by the interconnection dimensions. Design considerations are proposed from the observed results.
2012 IEEE 62nd Electronic Components and Technology Conference, 2012
ABSTRACT The semiconductor industry has followed the Moore's Law for more than 40 years. ... more ABSTRACT The semiconductor industry has followed the Moore's Law for more than 40 years. The concept of scaling based on this law is now approaching the end and to maintain the same scaling concept new routes are being investigated. These new routes are commonly identified as 'More-than-Moore' technologies and the most important of them is 3D-IC integration. By 3D-IC Integration it is possible to put more transistors on the same footprint without the need to shrink transistor sizes. However, as for any new technology, there are many challenges and issues that need to be addressed before moving to high volume manufacturing [1]. In this work we present the challenges and required improvements identified for 3D stacking in case of ultra thin devices with TSVs (Thru Silicon Vias). In particular, the challenges related to wafer thinning, flip chip bumping, 3D stacking and packaging.
Anodization is a low cost, low temperature, technology compatible with post foundry integration, ... more Anodization is a low cost, low temperature, technology compatible with post foundry integration, suitable for 3D high aspect ratio deposition. Anodic tantalum pentoxide is used at IMEC as dielectric for integrated high density 3D Metal-Insulator-Metal capacitors. To ...
Thin films of the solid solution lead magnesium niobate with lead titanate (PMNT) have been succe... more Thin films of the solid solution lead magnesium niobate with lead titanate (PMNT) have been successfully grown using r.f. magnetron sputtering onto Si/SiO2 and SrTiO3 (STO) substrates and their structural, electrical and piezoelectric properties have been evaluated. In order to increase the piezoelectric properties PMNT thin films, our objective was to obtain highly textured films; even epitaxial films. To obtain
ABSTRACT 0.7Pb(Mg1/3Nb2/3)O3–0.3PbTiO3 (PMN–PT) ferroelectric thin films with thickness ranging f... more ABSTRACT 0.7Pb(Mg1/3Nb2/3)O3–0.3PbTiO3 (PMN–PT) ferroelectric thin films with thickness ranging from 28 to 110 nm were sputter deposited onto LaNiO3/SiO2/Si substrates. Optical properties were determined by spectroscopic ellipsometry. We found B = 4.6 and λ0 = 209 nm, which is consistent for all PMN–PT samples with previous results shown in the literature. Nanoscale electromechanical activity was probed by using piezoresponse force microscopy in imaging and spectroscopic modes. Both piezoresponse images and local piezoloops recorded on each film highlighted an enhancement of piezoelectric vibration amplitude when the film thickness increased from 28 to 62 nm (∼1.06 to ∼1.34 mV), then saturation was observed for thicker films. This specific evolution was explained taking into account the low-permittivity interfacial Pb2Nb2O7 layer existing between bottom electrode and PMN-PT layer. Higher leakage current when thickness is decreasing was shown, which could also explain the particular behavior of the local electromechanical properties.
For some microelectromechanical system (MEMS) applications, the conditions of operation, high tem... more For some microelectromechanical system (MEMS) applications, the conditions of operation, high temperature, high stress, etc., can be very severe. Under these conditions the piezoelectric performance of polar material can decrease due to a partial (or a total) depoling induced by external excitations. So, it is important to have a piezoelectric active material that presents a good stability versus external parameters
The authors have investigated the temperature dependence of the ferroelectric, dielectric, and st... more The authors have investigated the temperature dependence of the ferroelectric, dielectric, and structural properties of 70%Pb(Mg1∕3Nb2∕3)O3–30%PbTiO3 thin films. Two critical temperatures were evidenced. The first one occurring around 410 K corresponds to the bulk paraelectric-ferroelectric phase transition and the second one around 200 K is rather related to a self-arrangement of small domains into macrodomains in order to minimize elastic
2012 IEEE 62nd Electronic Components and Technology Conference, 2012
ABSTRACT The semiconductor industry has followed the Moore's Law for more than 40 years. ... more ABSTRACT The semiconductor industry has followed the Moore's Law for more than 40 years. The concept of scaling based on this law is now approaching the end and to maintain the same scaling concept new routes are being investigated. These new routes are commonly identified as 'More-than-Moore' technologies and the most important of them is 3D-IC integration. By 3D-IC Integration it is possible to put more transistors on the same footprint without the need to shrink transistor sizes. However, as for any new technology, there are many challenges and issues that need to be addressed before moving to high volume manufacturing [1]. In this work we present the challenges and required improvements identified for 3D stacking in case of ultra thin devices with TSVs (Thru Silicon Vias). In particular, the challenges related to wafer thinning, flip chip bumping, 3D stacking and packaging.
2014 IEEE 18th Workshop on Signal and Power Integrity (SPI), 2014
ABSTRACT A test system for memory-logic communications in silicon interposer is introduced as wel... more ABSTRACT A test system for memory-logic communications in silicon interposer is introduced as well as a performance analysis methodology including a fitted model based on eye diagram measurements. First results of the test system with 9 and 18 mm-long interconnects and a 5 channel bus of micro-strip lines with 2-2 and 5-5 μm width and spacing (W-S), targeting Wide-IO communication standard are presented. Measured eye diagrams allow us to compare the performance of the different test systems in combination with a fitted model. All considered systems show operation frequencies higher than 200 MHz for an eye height of at least 35 %. It is demonstrated that the communication system performance is mainly dominated due to weak driver strength (RS > 250 Ω) and secondly by the interconnection dimensions. Design considerations are proposed from the observed results.
2012 IEEE 62nd Electronic Components and Technology Conference, 2012
ABSTRACT The semiconductor industry has followed the Moore's Law for more than 40 years. ... more ABSTRACT The semiconductor industry has followed the Moore's Law for more than 40 years. The concept of scaling based on this law is now approaching the end and to maintain the same scaling concept new routes are being investigated. These new routes are commonly identified as 'More-than-Moore' technologies and the most important of them is 3D-IC integration. By 3D-IC Integration it is possible to put more transistors on the same footprint without the need to shrink transistor sizes. However, as for any new technology, there are many challenges and issues that need to be addressed before moving to high volume manufacturing [1]. In this work we present the challenges and required improvements identified for 3D stacking in case of ultra thin devices with TSVs (Thru Silicon Vias). In particular, the challenges related to wafer thinning, flip chip bumping, 3D stacking and packaging.
Anodization is a low cost, low temperature, technology compatible with post foundry integration, ... more Anodization is a low cost, low temperature, technology compatible with post foundry integration, suitable for 3D high aspect ratio deposition. Anodic tantalum pentoxide is used at IMEC as dielectric for integrated high density 3D Metal-Insulator-Metal capacitors. To ...
Thin films of the solid solution lead magnesium niobate with lead titanate (PMNT) have been succe... more Thin films of the solid solution lead magnesium niobate with lead titanate (PMNT) have been successfully grown using r.f. magnetron sputtering onto Si/SiO2 and SrTiO3 (STO) substrates and their structural, electrical and piezoelectric properties have been evaluated. In order to increase the piezoelectric properties PMNT thin films, our objective was to obtain highly textured films; even epitaxial films. To obtain
ABSTRACT 0.7Pb(Mg1/3Nb2/3)O3–0.3PbTiO3 (PMN–PT) ferroelectric thin films with thickness ranging f... more ABSTRACT 0.7Pb(Mg1/3Nb2/3)O3–0.3PbTiO3 (PMN–PT) ferroelectric thin films with thickness ranging from 28 to 110 nm were sputter deposited onto LaNiO3/SiO2/Si substrates. Optical properties were determined by spectroscopic ellipsometry. We found B = 4.6 and λ0 = 209 nm, which is consistent for all PMN–PT samples with previous results shown in the literature. Nanoscale electromechanical activity was probed by using piezoresponse force microscopy in imaging and spectroscopic modes. Both piezoresponse images and local piezoloops recorded on each film highlighted an enhancement of piezoelectric vibration amplitude when the film thickness increased from 28 to 62 nm (∼1.06 to ∼1.34 mV), then saturation was observed for thicker films. This specific evolution was explained taking into account the low-permittivity interfacial Pb2Nb2O7 layer existing between bottom electrode and PMN-PT layer. Higher leakage current when thickness is decreasing was shown, which could also explain the particular behavior of the local electromechanical properties.
For some microelectromechanical system (MEMS) applications, the conditions of operation, high tem... more For some microelectromechanical system (MEMS) applications, the conditions of operation, high temperature, high stress, etc., can be very severe. Under these conditions the piezoelectric performance of polar material can decrease due to a partial (or a total) depoling induced by external excitations. So, it is important to have a piezoelectric active material that presents a good stability versus external parameters
The authors have investigated the temperature dependence of the ferroelectric, dielectric, and st... more The authors have investigated the temperature dependence of the ferroelectric, dielectric, and structural properties of 70%Pb(Mg1∕3Nb2∕3)O3–30%PbTiO3 thin films. Two critical temperatures were evidenced. The first one occurring around 410 K corresponds to the bulk paraelectric-ferroelectric phase transition and the second one around 200 K is rather related to a self-arrangement of small domains into macrodomains in order to minimize elastic
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Papers by M. Detalle