Research Interests:
Research Interests:
Research Interests:
Research Interests:
Research Interests:
The conventional method to evaluate switching loss of power MOSFETs is commonly based on the existence of the plateau gate-voltage region in the gate-charge plot. However, a very different behavior of the MOSFET with disappearance of the... more
The conventional method to evaluate switching loss of power MOSFETs is commonly based on the existence of the plateau gate-voltage region in the gate-charge plot. However, a very different behavior of the MOSFET with disappearance of the plateau region is observed under significant current diversion between channel and parasitic capacitances when a large gate drive current is applied to turn off the MOSFET. As the modern power converter is pursuing higher switching frequency, the gate drive current becomes larger accordingly to turn on and off the power MOSFET faster. Hence, this paper proposes an analytical model to predict the timing pattern and the switching loss more precisely in such conditions. Simulation and measurement have been conducted to validate this model, showing an accurate estimate of the switching loss at fast switching transition and a good match with the conventional model at slow switching transition. Moreover, non-linearity of the MOSFET's output capacitance is considered in this model, suggesting a handy graphical method to determine the timing pattern and the switching loss properly in practice.
Research Interests:
DC-to-DC power supplies for CPUs or GPUs are critical components on the motherboard of modern computer systems. Converting an intermediate bus voltage (e.g. 12 V) to the core voltage (∼0.9 V) of CPUs or GPUs must be efficient, compact and... more
DC-to-DC power supplies for CPUs or GPUs are critical components on the motherboard of modern computer systems. Converting an intermediate bus voltage (e.g. 12 V) to the core voltage (∼0.9 V) of CPUs or GPUs must be efficient, compact and cost effective. This paper proposes an active-clamp forward converter (ACFC) power block to supply core voltage on a motherboard. The ACFC power block can be individually tested prior to assembly and vertically soldered onto the motherboard to save motherboard area. A low loss, compact planar transformer is designed into the ACFC power block PCB. A custom, standing slab inductor not only provides high inductance and high saturation current but also helps to mechanically support the power block. A one-piece copper winding connects the transformer to the inductor, thereby reducing the DC loss in the current path. Experimental results show a peak efficiency of 90.4% with a 12 V input and 0.9 V output for an output current of 25 A.
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This paper presents an integrated programmable gate timing control and primary gate driver chip for an active-clamp forward converter (ACFC) Power Block for data center applications. The ACFC Power Block converts 48 V intermediate bus... more
This paper presents an integrated programmable gate timing control and primary gate driver chip for an active-clamp forward converter (ACFC) Power Block for data center applications. The ACFC Power Block converts 48 V intermediate bus voltage to processor core voltage on a motherboard with high power density. To improve the overall efficiency and reduce the system form factor, the gate timing control function and gate driver with a high voltage level shifter are integrated on a gate driver chip. These features in the gate driver chip enable the Power Block to optimize the timing of switching transistors and therefore achieve optimum efficiency. The silicon chip is fabricated in a 0.13 μm BCD process. Initial hardware operates at 48 V input and 0.75 V output voltages. Full gate timing control functions have been verified by measurement. An electrical model of this converter shows over 90% efficiency at 130 A.
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The IBM Power Block is a high power density, low cost 48 V input DC-DC converter, designed to source up to 107 A of continuous output current to processors in high performance computing (HPC) and datacenter servers. Peak efficiency for a... more
The IBM Power Block is a high power density, low cost 48 V input DC-DC converter, designed to source up to 107 A of continuous output current to processors in high performance computing (HPC) and datacenter servers. Peak efficiency for a 0.75 V output is 90.6% at 45 A and 85.1% at 107 A. An active clamp forward converter (ACFC) architecture uses a pair of primary FETs and a pair of secondary FETs, separated by a planar transformer. A custom timing chip provides four gate timing signals, whose delays can be stored in internal fuses or set through a serial interface. Transformer and inductor magnetics are integrated into a single ferrite structure that allows induced electro motive forces (EMFs) to cancel, thereby providing near zero output current ripple at 0.75 V and low ripple 0.5 V to 1.0 V. Designed for 1 U servers, the Power Block has a 13 mm x 16 mm footprint and a 19 mm height. The electrical output contact’s flat top permits mounting a heat sink or cold plate.
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Research Interests:
This thesis describes the design and construction of a 250 W, 35-60 Vin, 5 Vout dc-dc power converter with a switching frequency of 500 kHz. The converter uses square wave switching and is composed of two power processing stages in... more
This thesis describes the design and construction of a 250 W, 35-60 Vin, 5 Vout dc-dc power converter with a switching frequency of 500 kHz. The converter uses square wave switching and is composed of two power processing stages in series. The first stage, a boost converter, regulates the output voltage of the converter. The second stage, a push-pull converter operating at 100% duty-cycle, provides isolation and steps the bus voltage created by the first stage down to the load voltage. The converter was fabricated using a copper thick film process with commercially available surface mount components. This fabrication method minimizes parasitic inductances and allows the designer to reduce the coupling of the noise generated in the power section into the control section. The converter had an efficiency of 82% at full power and achieved an unpackaged power density of 80 W fin3• During a 15 A transient in the output current, the peak error in the output voltage was 3% and the output vo...
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DC-to-DC power supplies are critical components for processors in high performance computing and datacenter servers. Conversion from an intermediate bus voltage (e.g., 12 or 48 V) to the core voltage (∼0.9 V) of processors must be... more
DC-to-DC power supplies are critical components for processors in high performance computing and datacenter servers. Conversion from an intermediate bus voltage (e.g., 12 or 48 V) to the core voltage (∼0.9 V) of processors must be efficient, compact, and cost effective. This paper proposes two versions of active-clamp forward converter (ACFC) power blocks to supply core voltage from either 12 or 48 V intermediate bus voltage. The ACFC power block can be individually tested prior to assembly and vertically soldered onto the motherboard to fit in a standard 1U server. A low loss, compact planar transformer is designed into the ACFC power block printed circuit board (PCB). A custom, standing slab inductor not only provides high inductance and high saturation current but also helps to mechanically support the power block. A one-piece copper winding connects the transformer to the inductor, thereby reducing the dc loss in the current path. Thorough analysis is performed to model the conversion loss of the proposed power block. Experimental results show a peak efficiency of 90.4% (12 V input) and 89.5% (48 V input) with 0.9-V output.
Research Interests:
As enhancement mode gallium-nitride-on-silicon (eGaN®) FETs gain wider acceptance as the successor to the aged power MOSFET, designers have been able to improve power conversion system efficiency, size, and cost. eGaN FETs, however, are... more
As enhancement mode gallium-nitride-on-silicon (eGaN®) FETs gain wider acceptance as the successor to the aged power MOSFET, designers have been able to improve power conversion system efficiency, size, and cost. eGaN FETs, however, are based on a relatively immature technology and only recently have they begun to hit the market in applications such as Power over Ethernet (PoE) and DC-DC converters for telecom and computing applications. An overview of the capability of this technology is followed by the exploration of four common circuit topologies: (1) Flyback converters where costs are sensitive and power levels low, (2) forward converters that are best suited in applications requiring high power density and low power, (3) buck converters for applications requiring high power densities, and (4) full bridge isolated converters for applications requiring high power density, high power, and input-to-output isolation. These four topologies cover the majority of applications where eGa...