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Recently, the interest about the Tate pairing over binary fields has decreased due to the existence of efficient attacks to the discrete logarithm problem in the subgroups of such fields. We show that the choice of fields of large size to... more
Recently, the interest about the Tate pairing over binary fields has decreased due to the existence of efficient attacks to the discrete logarithm problem in the subgroups of such fields. We show that the choice of fields of large size to make these attacks infeasible does not lead to a degradation of the computation performance of the pairing. We describe
ABSTRACT Data outsourcing has recently emerged as a successful solution allowing individuals and organizations to delegate data and service management to external third parties. A major challenge in the data outsourcing scenario is how to... more
ABSTRACT Data outsourcing has recently emerged as a successful solution allowing individuals and organizations to delegate data and service management to external third parties. A major challenge in the data outsourcing scenario is how to guarantee proper privacy protection against the external server. Recent promising approaches rely on the organization of data in indexing structures that use encryption and the dynamic allocation of encrypted data to physical blocks for destroying the otherwise static relationship between data and the blocks in which they are stored. However, dynamic data allocation implies the need to re-write blocks at every read access, thus requesting exclusive locks that can affect concurrency. Also, these solutions only support search conditions on the values of the attribute used for building the indexing structure.In this paper, we present an approach that overcomes such limitations by extending the recently proposed shuffle index structure with support for concurrency and multiple indexes. Support for concurrency relies on the use of several differential versions of the data index that are periodically reconciled and applied to the main data structure. Support for multiple indexes relies on the definition of secondary shuffle indexes that are then combined with the primary index in a single data structure whose content and allocation is unintelligible to the server. We show how using such differential versions and combined index structure guarantees privacy, provides support for concurrent accesses and multiple search conditions, and considerably increases the performance of the system and the applicability of the proposed solution.
ABSTRACT The modern trend toward heterogeneous many-core architectures has led to high architectural diversity in both high performance and high-end embedded systems. To effectively exploit the computational resources of such a wide range... more
ABSTRACT The modern trend toward heterogeneous many-core architectures has led to high architectural diversity in both high performance and high-end embedded systems. To effectively exploit the computational resources of such a wide range of architectures, programming languages and APIs such as OpenCL have become increasingly popular. Although OpenCL provides functional code portability and the ability to fine tune the application to the target hardware, providing performance portability is still an open problem. Thus, many research works have investigated the optimization of specific combinations of application and target platform. In this paper, we aim at leveraging the experience obtained in the implementation of algorithms from the cryptography domain to provide a set of guidelines for modern many-core heterogeneous architecture performance portability and to establish a base on which domain-specific languages and compiler transformations could be built in the near future. We study algorithmic choices and the effect of compiler transformations on three representative applications in the chosen domain on a set of seven target platforms. To estimate how well the application fits the architecture, we define a metric of computational intensity both for the architecture and the application implementation. Besides being useful to compare either different implementation or algorithmic choices and their fitness to a specific architecture, it can also be useful to the compiler to guide the code optimization process. Copyright © 2014 John Wiley & Sons, Ltd.
Adding digital intelligence and two-way functionalities to the power grid is one of the most flourishing topics in both academic and public institution communities. Efficiency, improved reliability and safety are the benefits promised by... more
Adding digital intelligence and two-way functionalities to the power grid is one of the most flourishing topics in both academic and public institution communities. Efficiency, improved reliability and safety are the benefits promised by the new smart grid at the price of privacy and security challenges which are only in part similar to the security issues of IT networks. We survey the current grid architecture and the relation among the smart grid operators to analyze the security and privacy threats which needs to be addressed to secure the smart grid digital infrastructure.
ABSTRACT Side channel attacks analyzing both power consumption and electromagnetic (EM) radiations are a well known threat to the security of devices dealing with sensitive data. Whilst it is well known that the EM emissions of a chip... more
ABSTRACT Side channel attacks analyzing both power consumption and electromagnetic (EM) radiations are a well known threat to the security of devices dealing with sensitive data. Whilst it is well known that the EM emissions of a chip represent an information leakage stronger than the overall dynamic power consumption, the actual relation between the emissions and the computations is still a subject under exploration. It is important for the chip designer to be able to distinguish which portions of the measured EM emissions are actually correlated with the sensitive information. Our technique obtains a detailed profile of the information leakage, identifying which harmonic components carry the largest part of the it on the measured signals. It may be successfully integrated in a design workflow as a post-testing feedback from the prototype chip, in the form of additional constraints aimed at reducing the local wires congestion up to a point where the emissions are no longer sufficient to conduct an attack. The analysis allows the design of ad-hoc countermeasures (shields and/or EM jammers), which do not require architectural changes to the chip. We provide a validation of the proposed technique on a commercial grade ARM Cortex-M3 based System on Chip (SoC), executing a software implementation of AES-128. The proposed approach is more efficient than a search of the whole frequency spectrum, allowing to conduct a deeper analysis with the same timing constraints. KeywordsSide-Channel Attacks–Embedded Systems Security–Differential Power Attacks–Differential Electromagnetic Attacks
Elliptic curve cryptosystems proved to be well suited for securing systems with constrained resources like embedded and portable devices. In a fault attack, errors are induced during the computation of a cryptographic primitive, and the... more
Elliptic curve cryptosystems proved to be well suited for securing systems with constrained resources like embedded and portable devices. In a fault attack, errors are induced during the computation of a cryptographic primitive, and the faulty results are collected to derive information about the secret key stored into the device in a non-readable way. Scenarios where the secure devices are
ABSTRACT The automatic identification of security vulnerabilities is a critical issue in the development of web-based applications. We present a methodology and tool for vulnerability identification based on symbolic code execution... more
ABSTRACT The automatic identification of security vulnerabilities is a critical issue in the development of web-based applications. We present a methodology and tool for vulnerability identification based on symbolic code execution exploiting Static Taint Analysis to improve the efficiency of the analysis. The tool targets PHP web applications, and demonstrates the effectiveness of our approach in identifying cross-site scripting and SQL injection vulnerabilities on both NIST synthetic benchmarks and real world applications. It proves to be faster and more effective than its main competitors, both open source and commercial.
ABSTRACT A longstanding issue in computer security is preventing an attacker from gaining arbitrary execution rights from the exploitation of common programming mistakes, which result in opening unintentional breaches in the behavior of... more
ABSTRACT A longstanding issue in computer security is preventing an attacker from gaining arbitrary execution rights from the exploitation of common programming mistakes, which result in opening unintentional breaches in the behavior of executable code. In particular, buffer overflows on the stack and the possibility for an attacker to manipulate format strings in formatted I/O functions still represent, according to the classification provided by the SANS institute, the third and 23rd most significant threats to the security of a system, respectively. We provide a drop-in countermeasure intercepting calls to dynamic libraries, to prevent both stack-based buffer overflows and uncontrolled format strings from providing a viable entry point for an attacker, while keeping the average performance overhead below 4% for I/O intensive applications and within 2% for CPU bound ones. We tested our approach on a large benchmark suite on a common Linux distribution, without making any modifications.
ABSTRACT Modern embedded systems manage sensitive data increasingly often through cryptographic primitives. In this context, side-channel attacks, such as power analysis, represent a concrete threat, regardless of the mathematical... more
ABSTRACT Modern embedded systems manage sensitive data increasingly often through cryptographic primitives. In this context, side-channel attacks, such as power analysis, represent a concrete threat, regardless of the mathematical strength of a cipher. Evaluating the resistance against power analysis of cryptographic implementations and preventing it, are tasks usually ascribed to the expertise of the system designer. This paper introduces a new security-oriented data-flow analysis assessing the vulnerability level of a cipher with bit-level accuracy. A general and extensible compiler-based tool was implemented to assess the instruction resistance against power-based side-channels. The tool automatically instantiates the essential masking countermeasures, yielding a ×2.5 performance speedup w.r.t. protecting the entire code.
ABSTRACT In this paper, we face the problem of P-equivalence Boolean match-ing. We outline a formal framework that unifies some of the canon-ical form-based approaches to the problem. As a first major contribution, we show how these... more
ABSTRACT In this paper, we face the problem of P-equivalence Boolean match-ing. We outline a formal framework that unifies some of the canon-ical form-based approaches to the problem. As a first major contribution, we show how these approaches are particular ...
ABSTRACT This paper describes an automated solution for improving the design methodology of bio-medical applications on embedded platform devices with security and privacy guarantees. Besides typical design parameters, the need for... more
ABSTRACT This paper describes an automated solution for improving the design methodology of bio-medical applications on embedded platform devices with security and privacy guarantees. Besides typical design parameters, the need for security and privacy guarantees at the communication, software and hardware layers further extend the design space. Security and privacy features require expertise in evaluating and deploying solutions which are often specific to the individual application scenario. This makes these concerns hard to take into account in a typical hardware-software design process. We discuss how an existing design workflow can be extended to support the early detection of security and privacy issues, the selection of appropriate countermeasures and their effective integration. We consider the application scenario of continuous heart monitoring and analysis, through employing a Holter device. The design space exploration enacted by our methodology allows solving the conflicting requirements posed by security, software optimization, and hardware architectural parameters, in order to fine tune the overall system design and optimize the desired system metrics. We provide an experimental analysis of the proposed approach, showing a 3X decrease in design time, as well as demonstrating that quality assurance constraints are met.
Applications for Location-based Services (LBS) are becoming more and more popular. However, the continuous access to the wireless internet to get map tiles from servers can significantly affect the quality of the user experience, or might... more
Applications for Location-based Services (LBS) are becoming more and more popular. However, the continuous access to the wireless internet to get map tiles from servers can significantly affect the quality of the user experience, or might be too expensive. In this paper, we present SMaC, Spatial Map Caching, a caching technique devised for storing map tiles on the secondary memory

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