research-article

Hardware Acceleration for an Accurate Stereo Vision System Using Mini-Census Adaptive Support Region

Authors:

Yi Shan,

Yuchen Hao,

Wenqiang Wang,

Yu Wang,

Xu Chen,

Huazhong Yang,

Wayne LukAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 13, Issue 4s

Article No.: 132, Pages 1 - 24

https://doi.org/10.1145/2584659

Published: 01 April 2014 Publication History

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Abstract

Domain of stereo vision is highly important in the fields of autonomous cars, video tolling, robotics, and aerial surveys. The specific feature of this domain is that we should handle not only the pixel-by-pixel 2D processing in one image but also the 3D processing for depth estimation by comparing information about a scene from several images with different perspectives. This feature brings challenges to memory resource utilization, because an extra dimension of data has to be buffered. Due to the memory limitation, few of previous stereo vision implementations provide both accurate and high-speed processing for high-resolution images at the same time.

To achieve domain-specific acceleration for stereo vision, the memory limitation has to be addressed. This article uses a Mini-Census ADaptive Support Region (MCADSR) stereo matching algorithm as a case study due to its high accuracy and representative operations in this domain. To relieve the memory limitation and achieve high-speed processing, the article proposes several efficient optimization methods including vertical-first cost aggregation, hybrid parallel processing, and hardware-friendly integral image. The article also presents a customizable system which provides both accurate and high-speed stereo matching for high-resolution images. The benefits of applying the optimization methods to the system are highlighted.

With the aforesaid optimization and specific customization implemented on FPGA, the demonstrated system can process 47.6 fps (frames per second) and 129 fps for video size of 1920 × 1080 with a large disparity range of 256 and 1024 × 768 with a disparity range of 128, respectively. Our results are up to 1.64 times better than previous work in terms of Million Disparity Estimation per second (MDE/s). For accuracy, the 7.65% overall average error rate outperforms current work which can provide real-time processing with this high-resolution and large disparity range.

References

[1]

K. Ambrosch, M. Humenberger, W. Kubinger, and A. Steininger. 2009. SAD-based stereo matching using fpgas. In Embedded Computer Vision, Springer, 121--138.

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Accurate hardware-based stereo vision

Low-cost FPGA stereo vision system for real time disparity maps calculation

FPGA based real-time on-road stereo vision system

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