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Gert JervanRelated papers
Efficient Test Solutions for Core-Based Designs
IEEE Transactions on Computer-aided Design of Integrated Circuits and Systems, 2004
Reformatting test patterns for testing embedded core based system using test access mechanism (TAM) switch [SoC]
Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design, 2002
Hybrid-SBST Methodology for Efficient Testing of Processor Cores
IEEE Design & Test of Computers, 2000
Improved Core Isolation and Access for Hierarchical Embedded Test
IEEE Design & Test of Computers, 2009
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