Interconnects

In modeling of hard disk drive interconnects, one
often encounters frequency-dependent impedance expressions
formulated in terms of special and transcendental functions
or symbolic inverses. In this paper, we develop fast accurate
evaluations of these expressions with solution visualization and
correct interpretation. We demonstrate this methodology for the
computation of a ratio of confluent hypergeometric functions
via Padé approximations for a number of geometrical structures
such as a round wire and a flat plate. Equivalent circuits are also
derived.

The performance factors such as propagation delay, power dissipation and crosstalk in RC modelled interconnects are major design issues for the System on-chip (SoC) designs in current Deep Submicron (DSM) era. The crosstalk effect is a consequence of coupling and switching activities that is encountered when there is a transition as compared to previous state of wire and or when there are transitions in adjacent wires. Therefore, minimization or elimination of switching and coupling activities is crucial in enhancing the performance of SoC designs. There are several methods for the reduction of power dissipation, crosstalk and delay. The encoding method is most effective and popular method for enhancing the behaviour of on-chip buses. This paper proposes encoding scheme to achieve overall reduction in transitions. The reduction in transition improves the performance in terms of reduced power dissipation, coupling activity and delay in on-chip buses. This encoding method is implemented using VHDL. The result evidently demonstrates reduction in transitions which consequently improves the overall performance of on-chip buses.