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    Design and Implementation of Multiplexer and De-Multiplexer Using Logic Gates and Study of Ic74150 and Ic 74154

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    Rahul Kumar
    The document describes the design and implementation of a multiplexer and demultiplexer using logic gates. It provides block diagrams and truth tables showing the functionality of a 4:1 multiplexer and 1:4 demultiplexer. It also discusses integrated circuits IC 74150 and IC 74154 that can be used to implement multiplexer and demultiplexer circuits.

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    Design and Implementation of Multiplexer and De-Multiplexer Using Logic Gates and Study of Ic74150 and Ic 74154

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    Rahul Kumar
    2K views9 pages
    The document describes the design and implementation of a multiplexer and demultiplexer using logic gates. It provides block diagrams and truth tables showing the functionality of a 4:1 multiplexer and 1:4 demultiplexer. It also discusses integrated circuits IC 74150 and IC 74154 that can be used to implement multiplexer and demultiplexer circuits.

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    The document describes the design and implementation of a multiplexer and demultiplexer using logic gates. It provides block diagrams and truth tables showing the functionality of a 4:1 multiplexer and 1:4 demultiplexer. It also discusses integrated circuits IC 74150 and IC 74154 that can be used to implement multiplexer and demultiplexer circuits.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX or read online from Scribd
    Download as docx
    2K views9 pages

    Design and Implementation of Multiplexer and De-Multiplexer Using Logic Gates and Study of Ic74150 and Ic 74154

    Uploaded by

    Rahul Kumar
    The document describes the design and implementation of a multiplexer and demultiplexer using logic gates. It provides block diagrams and truth tables showing the functionality of a 4:1 multiplexer and 1:4 demultiplexer. It also discusses integrated circuits IC 74150 and IC 74154 that can be used to implement multiplexer and demultiplexer circuits.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOCX or read online from Scribd
    Download as docx
    of 9

    DESIGN AND IMPLEMENTATION OF MULTIPLEXER AND DE-

    MULTIPLEXER USING LOGIC GATES AND STUDY OF IC74150 AND IC 74154

    AIM:
    To design and implement multiplexer and demultiplexer
    using logic gates and study of IC 74150 and IC 74154.

    APPARATUS REQUIRED:
    Sl.No. COMPONENT SPECIFICATION QTY.
    1. 3 I/P AND GATE IC 7411 2
    2. OR GATE IC 7432 1
    3. NOT GATE IC 7404 1
    2. IC TRAINER KIT - 1
    3. PATCH CORDS - 32

    THEORY:
    MULTIPLEXER:
    Multiplexer means transmitting a large number of
    information units over a smaller number of channels or lines. A
    digital multiplexer is a combinational circuit that selects binary
    information from one of many input lines and directs it to a single
    output line. The selection of a particular input line is controlled by
    a set of selection lines. Normally there are 2n input line and n
    selection lines whose bit combination determine which input is
    selected.
    DEMULTIPLEXER:
    The function of Demultiplexer is in contrast to multiplexer
    function. It takes information from one line and distributes it to a
    given number of output lines. For this reason, the demultiplexer is
    also known as a data distributor. Decoder can also be used as
    demultiplexer.
    In the 1: 4 demultiplexer circuit, the data input line goes to
    all of the AND gates. The data select lines enable only one gate at
    a time and the data on the data input line will pass through the
    selected gate to the associated data output line.

    BLOCK DIAGRAM FOR 4:1 MULTIPLEXER:

    FUNCTION TABLE:
    S1 S0 INPUTS Y
    0 0 D0 → D0 S1’
    S0’
    0 1 D1 → D1 S1’ S0
    1 0 D2 → D2 S1 S0’
    1 1 D3 → D3 S1 S0
    Y = D0 S1’ S0’ + D1 S1’ S0 + D2 S1 S0’ + D3 S1 S0
    CIRCUIT DIAGRAM FOR MULTIPLEXER:

    TRUTH TABLE:

    S1 S0 Y = OUTPUT
    0 0 D0
    0 1 D1
    1 0 D2
    1 1 D3

    BLOCK DIAGRAM FOR 1:4 DEMULTIPLEXER:


    FUNCTION TABLE:
    S1 S0 INPUT
    0 0 X → D0 = X S1’
    S0’
    0 1 X → D1 = X S1’
    S0
    1 0 X → D2 = X S1
    S0’
    1 1 X → D3 = X S1
    S0

    Y = X S1’ S0’ + X S1’ S0 + X S1 S0’ + X S1 S0


    LOGIC DIAGRAM FOR DEMULTIPLEXER:
    TRUTH TABLE:
    INPUT OUTPUT
    S1 S0 I/P D0 D1 D2 D3
    0 0 0 0 0 0 0
    0 0 1 1 0 0 0
    0 1 0 0 0 0 0
    0 1 1 0 1 0 0
    1 0 0 0 0 0 0
    1 0 1 0 0 1 0
    1 1 0 0 0 0 0
    1 1 1 0 0 0 1

    PIN DIAGRAM FOR IC 74150:


    PIN DIAGRAM FOR IC 74154:
    PROCEDURE:

    (i) Connections are given as per circuit diagram.

    (ii) Logical inputs are given as per circuit diagram.

    (iii) Observe the output and verify the truth table.

    RESULT:

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