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Lect 1 5

The document describes the instruction set of the 8085 microprocessor. It discusses the various instruction groups including data transfer, arithmetic, logical, branching, and stack/machine control. It provides details on individual instructions such as MOV, MVI, LDA, STA, ADD, SUB, AND, OR, XOR, CMP and examples of their operation. Instruction formats, addressing modes, and the effect of instructions on registers and memory are also covered.

Uploaded by

Kishor Bhamare
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
34 views

Lect 1 5

The document describes the instruction set of the 8085 microprocessor. It discusses the various instruction groups including data transfer, arithmetic, logical, branching, and stack/machine control. It provides details on individual instructions such as MOV, MVI, LDA, STA, ADD, SUB, AND, OR, XOR, CMP and examples of their operation. Instruction formats, addressing modes, and the effect of instructions on registers and memory are also covered.

Uploaded by

Kishor Bhamare
Copyright
© © All Rights Reserved
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 82

Data transfer group

MOV Rd, Rs
MVI M,R
MVI R, M
MOV M,R
MOV R,M

LDA 16bit Address STA, 16 bit Address


LDAX Rp
STAX Rp
LXI Rp, 16 Bit Data SHLD, 16 Bit Address
LHLD, 16 Bit Address

XCHG

Instruction
Instruction format
Instruction is binary pattern designed for p to perform specific task
Entire group of instruction set is called Instruction Set
Instruction consist of
Opcode
Operand
Operand specifies
8 bit/16 bit internal GPR
A Memory location
8 bit port address
Instruction are of
1 byte instruction
2 bytes instruction
3 bytes instruction

1 byte instruction

3 byte instruction

Instruction include opcode & operand


in 1 byte only
Specifies what operation to be
performed & who is going to
performed.
Require single memory location
Example : MOV A, B
Opcode
Format

Instruction include opcode & 2


operand.
First byte specifies Opcode, second
and third bytes specifies operand
Require 3 successive memory
location
Generally these instruction are used to
specify 16 bit data or memory address
of the instruction

2 byte instruction

Format

Instruction include opcode & operand.


First byte specifies Opcode & second
bytes specifies operand
Require 2 successive memory location
Opcode

Format
Example : MVI C, 10H

Operand

Opcode

Operand

Example : LDA 1000 H

Operand

Addressing modes
Various format for specifying operand are called Addressing modes

Types:

Immediate Addressing Mode


Register Addressing Mode
Direct Addressing Mode
Indirect Addressing Mode
Implied Addressing Mode

Immediate Addressing Mode

Data is specified in the instruction itself


Instruction are either 2 bytes or three bytes long
Letter I indicate immediate addressing mode
Example:
MVI A,10H
LXI H,1000H

Addressing modes
Indirect Addressing Mode
Instruction refer memory through
Source and destination operands
register pair.
are GPR.
i.e. operand is stored in memory
Instruction are generally 1byte
location that is specified by register
Example:
pair.
MOV D, B
Example:
ADD B,
MOV M, R
PCHL
LDAX B
Direct Addressing Mode
Implied Addressing Mode
16 bit address of operand is given
Do not require any operand.
within the instruction
Data is specified within the Opcode
Instruction are 3 bytes longs
itself.
Example:
1 byte instruction.
LDA 0200 H
Data is supposed to be in the A
STA 1000 H
Example:

Register Addressing Mode

8085 Instruction set

Data transfer group


Arithmetic group
Logical group
Branching group
Stack and machine control group

Data transfer group

MOV Rd, Rs
MVI M,R
MVI R, M
MOV M,R
MOV R,M

LXI Rp, 16 Bit Data STA, 16 bit Address


LDA 16bit Address STAX Rp
LDAX Rp
SHLD, 16 Bit Address
LHLD, 16 Bit Address

XCHG

MOV Rd, Rs

Before
Execution

After
Execution

e.g. MOV B, L

11

00

00

25

25
11

00

00

25

MVI R, Data

Before
Execution

After
Execution

e.g. MVI B, 10 H

11

00

00

25

11
10

00

00

25

10

MVI M, Data

Before
Execution

e.g. MVI M, 10 H

11

00

53

00

10
25

After
Execution

11

00

53

00
2510

MOV M, R

e.g. MOV M, C
BA
AA

Before
Execution

11

C2

00
02

10

00

BA

After
Execution

11

00

53

00

00
AA

10
00

MOV C, M

e.g. MOV C, M
BA
AA

Before
Execution

11

C2

00
02

10

00

BA

After
Execution

AA
11

00

53

00

AA

10
00

Data transfer group

MOV Rd, Rs
MVI M,R
MVI R, M
MOV M,R
MOV R,M

LDA 16bit Address STA, 16 bit Address


LDAX Rp
STAX Rp
LXI Rp, 16 Bit Data SHLD, 16 Bit Address
LHLD, 16 Bit Address

XCHG

LXI Rp, Data (16 bit)

e.g. LXI B, 5300 H


BA
AA

Before
Execution

11

C2

00
02

53 00

10

00

BA

After
Execution

11
53

00
01

53

00

AA

10
00

LDA Address

e.g. LDA , 5200 H


BA

CB
Before
Execution

11

C2

AA

00
02

10

00

CB
10

After
Execution

BA

11

01

53

00

AA

10
00

LDAX Rp

e.g. LDAX H
BA

Before
Execution

CB

00

11

00

53

00

AA

10

00

CB
00

After
Execution

BA

11

00

53

00

AA

10
00

LHLD, Address

e.g. LHLD, C201 H


BA

Before
Execution

CB

00

11

00

00

53

AA

10

00

CB

11
After
Execution

00
AA

BA

00

AA

BA
53
10
00

Data transfer group

MOV Rd, Rs
MVI M, data
MVI R, data
MOV M,R
MOV R,M

LDA 16 bit Address STA, 16 bit Address


LDAX Rp
STAX Rp
LXI Rp, 16 Bit Data SHLD, 16 Bit Address
LHLD, 16 Bit Address

XCHG

STA , Address

e.g. STA, C201 H


BA

Before
Execution

CB

00

11

00

00

53

AA

10

00

CB

11
After
Execution

00

CB
BA

00

AA

53
10
00

STAX , Rp

e.g. STAX, Rp
BA

Before
Execution

CB

00

11

00

53

00

AA

10

00

CB

After
Execution

BA

11

00

53

00

AA

10
00
CB

SHLD , Address

e.g. SHLD, C201 H


BA

Before
Execution

CB

00

11

00

53

00

AA

10

00

CB

After
Execution

BA

11

00

53

00

AA

00
10
00
53

Data transfer group

MOV Rd, Rs
MVI M, data
MVI R, data
MOV M,R
MOV R,M

LDA 16 bit Address STA, 16 bit Address


LDAX Rp
STAX Rp
LXI Rp, 16 Bit Data SHLD, 16 Bit Address
LHLD, 16 Bit Address

XCHG

XCHG

e.g. XCHG
BA

Before
Execution

CB

00

11

00

AE

10

53

00

AA

10

00

After
Execution

CB

00

11
AE
53

00
00
10

AE
53

00
10

BA

AA

10
00

Arithmetic group

ADD, R
ADD, M
ADC, R
ADC,M
ADI, Data
ACI, Data
DAD, Rp
DAA

SUB, R
SUB, M
SBB, R
SBB, M
SUI, Data
SBI, Data

INR R
INR M
INX Rp

DCR R
DCR M
DCX Rp

ADD R

e.g. ADD B
BA

Before
Execution

13

00

11

00

AE

10

53

00

AA

10
ALU

00

24

After
Execution

24
13

00

11
AE

00
10

53

00

BA

AA

10
00

ADD M

e.g. ADD M
BA

Before
Execution

13

00

11

00

AE

10

C2

01

AA

10
ALU

00

CD

After
Execution

13
CD

00

11
AE

00
10

C2

01

BA

AA

10
00

ADI, Data

e.g. ADI, BD
BD

Before
Execution

13

00

11

00

AE

10

C2

01

BA
AA

10
ALU

00

D0

D0
13

After
Execution

00
00

11
AE

10

C2

01

BA

AA

10
00

ACI, Data

e.g. ACI, BD
BD

13
Before
Execution

01

11

00

AE

10

C2

01

BA
AA

10
ALU

00

D1
13
D1

After
Execution

01
00

11
AE

10

C2

01

BA

AA

10
00

ADC, R

Before
Execution

e.g. ADC, C
13

01

11

00

AE

10

C2

01

BA
AA

10
ALU

00

14

After
Execution

13
14

01

11
AE

00
10

C2

01

BA

AA

10
00

ADC, M

Before
Execution

e.g. ADC, M
13

01

11

00

AE

10

C2

01

1
BA
AA

10
ALU

00

CE

CE
13

After
Execution

01
00

11
AE

10

C2

01

BA

AA

10
00

Arithmetic group

ADD, R
ADD, M
ADC, R
ADC,M
ADI, Data
ACI, Data
DAD, Rp
DAA

SUB, R
SUB, M
SBB, R
SBB, M
SUI, Data
SBI, Data

INR R
INR M
INX Rp

DCR R
DCR M
DCX Rp

SUB R

e.g. SUB B
BA

Before
Execution

13

00

11

00

AE

10

53

00

AA

10
ALU

00

02

After
Execution

13
02

00

11
AE

00
10

53

00

BA

AA

10
00

SUB M

Before
Execution

e.g. SUB M
13
13

00

11

00

AE

10

C2

01

07
AA

10
ALU

00

06

After
Execution

13
06

00

11
AE

00
10

C2

01

07
AA

10
00

SUI, Data

e.g. SUI, 10 H
13

Before
Execution

13

00

11

00

AE

10

C2

01

BA
AA

10
ALU

00

00

After
Execution

13
00

00

11
AE

00
10

C2

01

BA

AA

10
00

SBI, Data

e.g. SBI, BD
10

13
Before
Execution

01

11

00

AE

10

C2

01

11

BA
AA

10
ALU

00

01

After
Execution

13
01

01

11
AE

00
10

C2

01

BA

AA

10
00

SBB, R

Before
Execution

e.g. SBB, C
13

01

11

00

AE

10

C2

01

BA
AA

10
ALU

00

12

After
Execution

13
12

01

11
AE

00
10

C2

01

BA

AA

10
00

SBB, M

Before
Execution

e.g. SBB, M
13

01

11

00

AE

10

C2

01

1
08
AA

10
ALU

00

04

After
Execution

13
04

01

11
AE

00
10

C2

01

08

AA

10
00

Arithmetic group

ADD, R
ADD, M
ADC, R
ADC,M
ADI, Data
ACI, Data
DAD, Rp
DAA

SUB, R
SUB, M
SBB, R
SBB, M
SUI, Data
SBI, Data

INR R
INR M
INX Rp

DCR R
DCR M
DCX Rp

INR R

Before
Execution

e.g. INR E
13

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

01

10
11

After
Execution

13

00

11
AE

00
11
10

C2

01

BA

AA

10
00

INR M

Before
Execution

e.g. INR M
13

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

BA

01

BB

After
Execution

13

00

11
AE

00
11
10

C2

01

BA
BB

AA

10
00

INX Rp

Before
Execution

e.g. INX D

AE
13

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

00
01

AE
10
11
AE

After
Execution

13

00

11
AE

00
11
10

C2

01

BA

AA

10
00

DCR R

Before
Execution

e.g. DCR E
13

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

10

01
09

After
Execution

13

00

11
AE

00
10
09

C2

01

BA

AA

10
00

DCR M

Before
Execution

e.g. DCR M
13

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

BA

01

B9

After
Execution

13

00

11
AE

00
11
10

C2

01

BA
B9

AA

10
00

DCX Rp

Before
Execution

e.g. DCX D

AE
13

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

01
00

AE
10
AE
09

After
Execution

13

00

11
AE

00
11
10

C2

01

BA

AA

10
00

Logical Instruction group


ANA R
ANA M
ANI, Data
ORA, R
ORA, M
ORI, Data

XRA R
XRA M
XRI, Data

CMP R
CMA
CMP M
CMC
CPI, Data

STC

RAR
RAL
RRC
RLC

ANA R

e.g. ANA B
BA

Before
Execution

02

00

12

00

AE

10

53

00

AA

10

00

ALU

12

02
24

After
Execution

24
13

00

11
AE

00
10

53

00

BA

AA

10
00

ANA M

Before
Execution

e.g. ANA M
12

02

00

11

00

AE

10

C2

01

AA

10

00

ALU

02

12
24

After
Execution

24
13

00

11
AE

00
10

53

00

12

AA

10
00

ADI, Data

e.g. ADI, BD
03

Before
Execution

13

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

13

03
39

After
Execution

13
39

00

11
AE

00
10

C2

01

BA

AA

10
00

1/6/2015

49

ORA R

e.g. ORA B
BA

Before
Execution

02

00

12

00

AE

10

53

00

AA

10
ALU

12

00

02
14

After
Execution

13
14

00

11
AE

00
10

53

00

BA

AA

10
00

ORA M

Before
Execution

e.g. ORA M
12

02

00

11

00

AE

10

C2

01

AA

10

00

ALU

02

12
14
13
14

After
Execution

00
00

11
AE

10

53

00

12

AA

10
00

ORI, Data

e.g. ORI, 03H


03

Before
Execution

13

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

13

03
16
13
16

After
Execution

00
00

11
AE

10

C2

01

BA

AA

10
00

1/6/2015

53

XRA R

e.g. XRA B
BA

Before
Execution

02

00

12

00

AE

10

53

00

AA

10
ALU

12

00

02
10

After
Execution

10
13

00

11
AE

00
10

53

00

BA

AA

10
00

ORA M

e.g. ORA M
12

Before
Execution

22

00

11

00

AE

10

C2

01

AA

10

00

ALU

22

12
30

After
Execution

30
13

00

11
AE

00
10

53

00

12

AA

10
00

XRI, Data

e.g. XRI, 03H


03

Before
Execution

10
10

00

11

00

AE

10

C2

01

BA
AA

10

00

ALU

10

03
13

After
Execution

13

00

11
AE

00
10

C2

01

BA

AA

10
00

1/6/2015

57

CMP R

e.g. CMP B
BA

Before
Execution

13

00

11

00

AE

10

53

00

AA

10
ALU

00

02

After
Execution

13
02

00

11
AE

00
10

53

00

BA

AA

10
00

CMP M

Before
Execution

e.g. CMP M
13
13

00

11

00

AE

10

C2

01

07
AA

10
ALU

00

06

After
Execution

13
06

00

11
AE

00
10

C2

01

07
AA

10
00

CPI, Data

e.g. CPI, 13 H
13

Before
Execution

13

00

11

00

AE

10

C2

01

BA
AA

10
ALU

00

00

After
Execution

13
00

00

11
AE

00
10

C2

01

BA

AA

10
00

1/6/2015

61

CMA

e.g. CMA
BA

Before
Execution

13

00

11

00

AE

10

53

00

AA

10
ALU

00

EC
13
EC

After
Execution

00
00

11
AE

10

53

00

BA

AA

10
00

CMC

e.g. CMC
1

Before
Execution

13

00

11

00

AE

10

53

00

BA
AA

10
ALU

00

After
Execution

13

00

11
AE

00
10

53

00

BA

AA

0
10
00

STC

e.g. STC
0

Before
Execution

13

00

11

00

AE

10

53

00

BA
AA

10
ALU

00

After
Execution

13

00

11
AE

00
10

53

00

BA

AA

1
10
00

1/6/2015

65

RAR

e.g. RAR
69
69

00

11

00

AE

10

53

00

Before
Execution

ALU

B4
13
B4

After
Execution

00
00

11
AE

10

53

00

RAL

e.g. RAL
E9

00

11

00

AE

10

53

00

Before
Execution

ALU

B4

After
Execution

B4
13

00

11
AE

00
10

53

00

RRC

e.g. RRC
69

00

11

00

AE

10

53

00

Before
Execution

ALU

B4
13
B4

After
Execution

00
00

11
AE

10

53

00

RLC

e.g. RLC
E9

00

11

00

AE

10

53

00

Before
Execution

ALU

B4

After
Execution

B4
13

00

11
AE

00
10

53

00

1/6/2015

70

Stack Control Instruction group

Push Rp

Pop Rp

SPHL

XTHL

SPHL

Before
Execution

e.g. SPHL
CB

00

11

00

53

00
00 01

After
Execution

CB

00

11

00

53
0100
00
530 0 0 100

BA
BA
AA

10

00

BA
BA
AA

10

00
BA

XTHL

Before
Execution

e.g. XTHL
CB

00

11

00

53

00

CB

00

11

00

53

00

530 0 000
1

AA

10

00

0001

After
Execution

BA
BA

BA
BA
AA

10

00
BA

PUSH Rp

Before
Execution

e.g. PUSH B
CB

00

11

00

53

00

Top of the stack

00

Top of the stack

After
Execution

00

11

00

53
53

AA

10

C2 02

CB

BA
BA

BA
00
11
BA
AA

01
00

10

00
BA

PUSH PSW

Before
Execution

e.g. PUSH PSW


11

00

11

00

53

00

Top of the stack

00

Top of the stack

After
Execution

00

11

00

53
53

AA

10

C2 02

CB

BA
BA

BA
00
11
BA
AA

01
00

10

00
BA

POP Rp

Before
Execution

e.g. POP B
CB

00

11

00

53

00

C2

After
Execution

00

11
BB

00
BA

53

BA
BB
AA

10

00

00

CB

53

Top of the stack

BA
BB
Top of the stack

AA

01
00

10

00
BA

POP PSW e.g. POP PSWTop of

Before
Execution

CB

00

11

00

53

00

C2

After
Execution

BA
00

11

00

53

01
00

BA
BB
AA

10

00

00

CB
BB

53

the stack

BA
BB
Top of the stack

AA

10

00
BA

1/6/2015

78

Branch Instruction group

Jump
Instruction
JMP, Address Conditional
Jump

Call
Address
CALL, Address Conditional
CALL

Return

RET, Address

RET

JMP, Address

e.g. JMP, 5200 H

CB

Before
Execution

00

11

00

LDA 5300 H

BA
BA
AA

MOV B, A
XRA A
LXI H, 5301 H

53

01

L1: ADD M

10

INX H

00

01

DCR B

53

00

JNZ L1

00

STA D000 H
JMP C200

After
Execution

CB

00

11

00

.
.
.

C200 H

BA
BA
AA

.
.

01

53
00 01
532 0 00
C
0

LXI H, 5301 H
STA D000 H
HLT

10

00
BA

Jump conditional,
Address

e.g. Jcondition, Address

CB

00

11

00

If condition true
PC= Address
Else
PC= PC+3

Before
Execution
00

53
C2

Instruction

00

Description

Condition
for jump

JP

JUMP when positive

SF= 0

JM

JUMP when Minus

SF= 1

ZF

ACY

1 1 X

SF

PF

0000 H

LDA 5300 H

0003 H

MOV B, A

0004 H

XRA A

0005 H

LXI H, 5301 H

0008 H L1: ADD M


0009 H

INX H

000A H

DCR B

000B H

JNZ L1

000C H

STA D000 H

000F H

JMP C200

0013 H

CY

X 0 X 1

JZ

JUMP when Zero

ZF= 1

JNZ

JUMP when not Zero

ZF= 0

0019 H

LXI H, 5301 H

JPE

JUMP when Even Parity

PF= 1

001A H

STA D000 H

JPO

JUMP when Odd Parity

PF= 0

001B H

HLT

JC

JUMP when Carry

CY= 1

JNC

JUMP when no Carry

CY= 0

Jump conditional,
Address
ZF

ACY

1 0 X

SF

PF

CY

If condition true
PC= Address

X 0 X 1

ZF

ACY

1 1 X

SF

e.g. Jcondition, Address

PF

X 0 X 1

After
Execution

Before
Execution

CB

CB

11

00

00

53
C2

00

00 0B H

11

00

53
C2

After
Execution
CB

00

00

00 0B H
0008H

11

53
C2

LDA 5300 H

0003 H

MOV B, A

0004 H

XRA A

0005 H

LXI H, 5301 H

0008 H L1: ADD M

Else
PC= PC+3

CY

0000 H

00

00
00

00 0B H
H
000E

0009 H

INX H

000A H

DCR B

000B H

JNZ L1

000E H

STA D000 H

0012 H

JMP C200

0015 H

0019 H

LXI H, 5301 H

001C H

STA D000 H

001F H

HLT

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