Code No: RR311901 Set No.

1
III B.Tech I Semester Regular Examinations, November 2007
DIGITAL SYSTEMS DESIGN
(Electronics & Computer Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
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1. (a) How is an essential Prime Cube detected in the CAMP algorithm?

(b) Find the CAMP − II Printout for the function.
P
f= (1,3,5,7,9,10,13,14,15) [8+8]

2. (a) Draw an ASM chart for a circuit with two 8-bit registers RA and RB that
receive two unsigned binary numbers and perform subtraction operation RA
←RA-RB and set a borrow flip flop to 1 if the answer is negative.
(b) Write short notes on hardware description languages. [8+8]

3. (a) The following is a truth table of a 3 input, 4- output combinational circuit.

Tabulate the PAL programming table

Inputs Outputs
x y z A B C D
0 0 0 0 1 0 0
0 0 1 1 1 1 1
0 1 0 1 0 1 1
0 1 1 0 1 0 1
1 0 0 1 0 1 0
1 0 1 0 0 0 1
1 1 0 1 1 1 0
1 1 1 0 1 1 1
(b) With CCD- channel explain the concept of CCD and its functioning. [8+8]

4. (a) What do you mean by a fault in a circuit? How do you classify the faults in
a circuit? Explain them.
(b) For the circuit shown in figure 4, find a minimum test set for all the stuck at
faults by the fault table method. [8+8]

Figure 4

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Code No: RR311901 Set No. 1
5. (a) Explain the working of a TMR system. Extend the system from TMR to
NMR and define its reliability factor.
(b) Define the terms
i. fault
ii. failure
iii. reliability factor [10+6]

6. (a) Write short notes on Synchronizing experiments.

(b) Find the shortest Homing sequence of the machine shown below. [8+8]

NS, Z
PS X=0 X=1
A A, 1 E, 0
B A, 0 C, 0
C B, 0 D, 1
D C, 1 C, 0
E C, 0 D, 0

7. (a) Discuss the types of faults in PLAs.

(b) Minimize the following function implemented on PLA using IISC algorithm.
f = 2120 + 0102 + 1121 + 0002 [8+8]

8. (a) State and prove EPC test criteria.

(b) With the help of a map, determine the minimal test set for the following PLAs.
Also list undetectable faults, if any. [8+8]

x1 x2 x3 x4 z1 z2 z3
1 1 0 2 0 1 0
2 1 0 2 1 0 1
1 0 2 2 0 1 1
0 0 2 1 1 1 0

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Code No: RR311901 Set No. 2
III B.Tech I Semester Regular Examinations, November 2007
DIGITAL SYSTEMS DESIGN
(Electronics & Computer Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. (a) How is a redundant Prime cube detected in the CAMP algorithm?

(b) Find the CAMP-II printout for the function
P
f (abcd) = (2, 4, 5, 8, 9, 12, 14) [8+8]

2. (a) Explain how the ASM chart differs from a conventional flowchart?
(b) Construct an ASM chart for a digital system that counts the number of people
in a room. People enter the room from one door with a photocell that changes
a signal x from 1 to 0 when the light is interrupted. They leave the room
from a second door with a similar photocell with a signal y. Both x and y are
synchronized with the clock, but they may stay ON or OFF for more than one
clock pulse period. The data processor subsystem consists of an up - down
counter with a display of its contents. [8+8]

3. List the PLA programming table for the BCD to Excess-3 code converter. [16]

4. (a) A two level AND - OR network realizes the function

f = 0201 + 1102 + 1211 + 0112
Find the minimum test set to detect all the faults using Kohavi algorithm.
(b) Using the Boolean difference method, find the test vectors for SA0 fault on
input line 1 and SA1 fault on the internal line 2 of the given circuit. shown in
figure4 [8+8]

Figure 4
5. (a) Define the term fault tolerance of a system?
(b) How many difference approaches are there to have fault tolerance of a digital
system? Explain about one such approach. [4+12]

6. (a) Describe the second algorithm for the design of fault detection experiments.
(b) Construct a fault detection experiment for the machine shown below that is
entirely preset, with no initial adaptive part. (Such an experiment need not
require more than 24 symbols) [8+8]

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Code No: RR311901 Set No. 2
NS, Z
PS X=0 X=1
A D, 0 C, 0
B C, 0 D, 0
C A, 0 B, 0
D D, 1 A, 1

7. Use COMPACT algorithm to find column folded PLA for the given PLA whose set
of subsuming rows are given below. [8+8]

Column SSRs
A 4,5,10
B 1,2,3,6,11,12
C 2,9
D 4,7,8,9,10
E 3,5,6,10,11
F 1,5,7,8,12
G 1,2,3,7,9,12
H 3,9

8. (a) State and prove EPC test criteria.

(b) With the help of a map, determine the minimal test set for the following PLAs.
Also list undetectable faults, if any. [8+8]

x1 x2 x3 x4 z1 z2 z3
1 1 0 2 0 1 0
2 1 0 2 1 0 1
1 0 2 2 0 1 1
0 0 2 1 1 1 0

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Code No: RR311901 Set No. 3
III B.Tech I Semester Regular Examinations, November 2007
DIGITAL SYSTEMS DESIGN
(Electronics & Computer Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. Find the CAMP −? II Printout for the function.

P
f= (0, 1, 3, 5, 7 − 10, 13 − 15, 17, 21, 25, 29) [16]

2. (a) What are the basic building blocks of an ASM chart? Explain about them?
(b) Show the eight exit paths in an ASM block emanating from the decision boxes
that check the eight possible binary values of three control variables x, y and
z. [8+8]

3. List the PLA programming table for the BCD to Excess-3 code converter. [16]

4. (a) What do you mean by a fault in a circuit? How do you classify the faults in
a circuit? Explain them.
(b) For the circuit shown in figure 4, find a minimum test set for all the stuck at
faults by the fault table method. [8+8]

Figure 4
5. (a) Explain the working of a TMR system. Extend the system from TMR to
NMR and define its reliability factor.
(b) Define the terms
i. fault
ii. failure
iii. reliability factor [10+6]

6. (a) Write short notes on successor tree.

(b) Show the testing table and testing graph for the machine given in the table.
Add one additional output to the machine so that it will have distinguishing
sequences. [8+8]

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Code No: RR311901 Set No. 3
NS, Z
PS X=0 X=1
A B, 0 D, 0
B A, 0 B, 0
C D, 1 A, 0
D D, 1 C, 0

7. Use COMPACT algorithm to find column folded PLA for the given PLA whose set
of subsuming rows are given below. [8+8]

Column SSRs
A 4,5,10
B 1,2,3,6,11,12
C 2,9
D 4,7,8,9,10
E 3,5,6,10,11
F 1,5,7,8,12
G 1,2,3,7,9,12
H 3,9

8. (a) Describe the DFT scheme of Biswas and Jacob.

(b) Explain FCM. [8+8]

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Code No: RR311901 Set No. 4
III B.Tech I Semester Regular Examinations, November 2007
DIGITAL SYSTEMS DESIGN
(Electronics & Computer Engineering)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
⋆⋆⋆⋆⋆

1. Find the CAMP −? II Printout for the function.

P
f= (0, 1, 3, 5, 7 − 10, 13 − 15, 17, 21, 25, 29) [16]

2. (a) What are the basic building blocks of an ASM chart? Explain about them?
(b) Show the eight exit paths in an ASM block emanating from the decision boxes
that check the eight possible binary values of three control variables x, y and
z. [8+8]

3. List the PLA programming table for the BCD to Excess-3 code converter. [16]

4. (a) A two level AND - OR network realizes the function

f = 0201 + 1102 + 1211 + 0112
Find the minimum test set to detect all the faults using Kohavi algorithm.
(b) Using the Boolean difference method, find the test vectors for SA0 fault on
input line 1 and SA1 fault on the internal line 2 of the given circuit. shown in
figure4 [8+8]

Figure 4
5. (a) What is meant by hardware redundancy? How does it provide fault tolerance
in logic circuits?
(b) Derive the reliability factor of a Triple modular Redundant system. [10+6]

6. (a) Describe the second algorithm for the design of fault detection experiments.
(b) Construct a fault detection experiment for the machine shown below that is
entirely preset, with no initial adaptive part. (Such an experiment need not
require more than 24 symbols) [8+8]

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Code No: RR311901 Set No. 4
NS, Z
PS X=0 X=1
A D, 0 C, 0
B C, 0 D, 0
C A, 0 B, 0
D D, 1 A, 1

7. Use COMPACT algorithm to find column folded PLA for the given PLA whose set
of subsuming rows are given below. [8+8]

Column SSRs
A 4,5,10
B 1,2,3,6,11,12
C 2,9
D 4,7,8,9,10
E 3,5,6,10,11
F 1,5,7,8,12
G 1,2,3,7,9,12
H 3,9

8. (a) With necessary illustrations explain masking cycle for a PLA.

(b) Describe the goals of testable design. [8+8]

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