Sir Syed University of Engineering & Technology (SSUET)

Computer Engineering Department

Course Name: Basic Electronics

Semester: Spring 2010, 3rd

Batch: 2009(Sections: A,B)

Assignments # 1

Course Responsible
Syed Hassan Raza Naqvi
Assistant Professor,
Computer Engineering Department
Office: STI,
 SIR SYED UNIVERSITY OF ENGINEERING AND TECHNOLOGY
COMPUTER ENGINEERING DEPARTMENT
BASIC ELECTRONICS
2009 BATCH (Sections: A, B)
Last Submission Date: 6th MARCH, 2010, 4PM.

Assignment # 1

1. Load Line Analysis: Q1 – to – Q4

2. Series Diode Configuration with DC Inputs: Q5 – to – Q9
3. Parallel and Series Parallel Configuration: Q10 – to – Q13
4. Half Wave Rectification: Q22 – to – Q27
5. Full Wave Rectification: Q28 – to – Q31
6. Clipper: Q32 – to – Q36
7. Clamper: Q37 – to – Q41
8. Zener Diode: Q42 – to – Q46
9. Voltage Multiplier: Q47 – to – Q48
 § 2.2 Load-Line Analysis PROBLEMS
1. (a) Using the characteristics of Fig. 2.131b, determine ID, VD, and VR for the circuit of Fig.
2.131a.
(b) Repeat part (a) using the approximate model for the diode and compare results.
(c) Repeat part (a) using the ideal model for the diode and compare results.

Figure 2.131 Problems 1, 2

Figure 2.132 Problems 2, 3

2. (a) Using the characteristics of Fig. 2.131b, determine ID and VD for the circuit of Fig. 2.132.
(b) Repeat part (a) with R ⫽ 0.47 k⍀.
(c) Repeat part (a) with R ⫽ 0.18 k⍀.
(d) Is the level of VD relatively close to 0.7 V in each case?
How do the resulting levels of ID compare? Comment accordingly.
3. Determine the value of R for the circuit of Fig. 2.132 that will result in a diode current of 10
mA if E ⫽ 7 V. Use the characteristics of Fig. 2.131b for the diode.
4. (a) Using the approximate characteristics for the Si diode, determine the level of VD, ID, and
VR for the circuit of Fig. 2.133.
(b) Perform the same analysis as part (a) using the ideal model for the diode.
(c) Do the results obtained in parts (a) and (b) suggest that the ideal model can provide a good
approximation for the actual response under some conditions? Figure 2.133 Problem 4

Problems 103
 § 2.4 Series Diode Configurations with DC Inputs

5. Determine the current I for each of the configurations of Fig. 2.134 using the approximate equiv-
alent model for the diode.

Figure 2.134 Problem 5

6. Determine Vo and ID for the networks of Fig. 2.135.

Figure 2.135 Problems 6, 49

* 7. Determine the level of Vo for each network of Fig. 2.136.

Figure 2.136 Problem 7

* 8. Determine Vo and ID for the networks of Fig. 2.137.

Figure 2.137 Problem 8

104 Chapter 2 Diode Applications

* 9. Determine Vo1 and Vo2 for the networks of Fig. 2.138.

Figure 2.138 Problem 9

§ 2.5 Parallel and Series–Parallel Configurations

10. Determine Vo and ID for the networks of Fig. 2.139.

Figure 2.139 Problems 10, 50

* 11. Determine Vo and I for the networks of Fig. 2.140.

Figure 2.140 Problem 11

Problems 105
 12. Determine Vo1, Vo2, and I for the network of Fig. 2.141.
* 13. Determine Vo and ID for the network of Fig. 2.142.

Figure 2.141 Problem 12 Figure 2.142 Problems 13, 51

§ 2.6 AND/OR Gates

14. Determine Vo for the network of Fig. 2.38 with 0 V on both inputs.
15. Determine Vo for the network of Fig. 2.38 with 10 V on both inputs.
16. Determine Vo for the network of Fig. 2.41 with 0 V on both inputs.
17. Determine Vo for the network of Fig. 2.41 with 10 V on both inputs.
18. Determine Vo for the negative logic OR gate of Fig. 2.143.
19. Determine Vo for the negative logic AND gate of Fig. 2.144.
20. Determine the level of Vo for the gate of Fig. 2.145.
Figure 2.143 Problem 18 21. Determine Vo for the configuration of Fig. 2.146.

Figure 2.144 Problem 19 Figure 2.145 Problem 20 Figure 2.146 Problem 21

§ 2.7 Sinusoidal Inputs; Half-Wave Rectification

22. Assuming an ideal diode, sketch vi, vd, and id for the half-wave rectifier of Fig. 2.147. The in-
put is a sinusoidal waveform with a frequency of 60 Hz
* 23. Repeat Problem 22 with a silicon diode (VT ⫽ 0.7 V).
* 24. Repeat Problem 22 with a 6.8-k⍀ load applied as shown in Fig. 2.148. Sketch vL and iL.
25. For the network of Fig. 2.149, sketch vo and determine Vdc.

Figure 2.147 Problems 22, 23,

24

Figure 2.148 Problem 24 Figure 2.149 Problem 25

106 Chapter 2 Diode Applications

* 26. For the network of Fig. 2.150, sketch vo and iR.

Figure 2.150 Problem 26

* 27. (a) Given Pmax ⫽ 14 mW for each diode of Fig. 2.151, determine the maximum current rating
of each diode (using the approximate equivalent model).
(b) Determine Imax for Vimax ⫽ 160 V.
(c) Determine the current through each diode at Vimax using the results of part (b).
(e) If only one diode were present, determine the diode current and compare it to the maximum
rating.

Figure 2.151 Problem 27

§ 2.8 Full-Wave Rectification

28. A full-wave bridge rectifier with a 120-V rms sinusoidal input has a load resistor of 1 k⍀.
(a) If silicon diodes are employed, what is the dc voltage available at the load?
(b) Determine the required PIV rating of each diode.
(c) Find the maximum current through each diode during conduction.
(d) What is the required power rating of each diode?
29. Determine vo and the required PIV rating of each diode for the configuration of Fig. 2.152.

Figure 2.152 Problem 29

Problems 107
 * 30. Sketch vo for the network of Fig. 2.153 and determine the dc voltage available.

Figure 2.153 Problem 30

* 31. Sketch vo for the network of Fig. 2.154 and determine the dc voltage available.

Figure 2.154 Problem 31

§ 2.9 Clippers

32. Determine vo for each network of Fig. 2.155 for the input shown.

Figure 2.155 Problem 32

33. Determine vo for each network of Fig. 2.156 for the input shown.

Figure 2.156 Problem 33

108 Chapter 2 Diode Applications

* 34. Determine vo for each network of Fig. 2.157 for the input shown.

Figure 2.157 Problem 34

* 35. Determine vo for each network of Fig. 2.158 for the input shown.

Figure 2.158 Problem 35

36. Sketch iR and vo for the network of Fig. 2.159 for the input shown.

Figure 2.159 Problem 36

§ 2.10 Clampers

37. Sketch vo for each network of Fig. 2.160 for the input shown.

Figure 2.160 Problem 37

Problems 109
 38. Sketch vo for each network of Fig. 2.161 for the input shown. Would it be a good approxima-
tion to consider the diode to be ideal for both configurations? Why?

Figure 2.161 Problem 38

* 39. For the network of Fig. 2.162:

(a) Calculate 5␶.
(b) Compare 5␶ to half the period of the applied signal.
(c) Sketch vo.

Figure 2.162 Problem 39

* 40. Design a clamper to perform the function indicated in Fig. 2.163.

Figure 2.163 Problem 40

* 41. Design a clamper to perform the function indicated in Fig. 2.164.

Figure 2.164 Problem 41

110 Chapter 2 Diode Applications

 § 2.11 Zener Diodes

* 42. (a) Determine VL, IL, IZ, and IR for the network Fig. 2.165 if RL ⫽ 180 ⍀
(b) Repeat part (a) if RL ⫽ 470 ⍀.
(c) Determine the value of RL that will establish maximum power conditions for the Zener
diode.
(d) Determine the minimum value of RL to ensure that the Zener diode is in the “on” state.

Figure 2.165 Problem 42

* 43. (a) Design the network of Fig. 2.166 to maintain VL at 12 V for a load variation (IL) from 0
to 200 mA. That is, determine Rs and VZ.
(b) Determine PZmax for the Zener diode of part (a).
* 44. For the network of Fig. 2.167, determine the range of Vi that will maintain VL at 8 V and not
exceed the maximum power rating of the Zener diode.
45. Design a voltage regulator that will maintain an output voltage of 20 V across a 1-k⍀ load with
an input that will vary between 30 and 50 V. That is, determine the proper value of Rs and the
maximum current IZM. Figure 2.166 Problem 43
46. Sketch the output of the network of Fig. 2.120 if the input is a 50-V square wave. Repeat for
a 5-V square wave.

§ 2.12 Voltage-Multiplier Circuits

47. Determine the voltage available from the voltage doubler of Fig. 2.121 if the secondary volt-
age of the transformer is 120 V (rms).
48. Determine the required PIV ratings of the diodes of Fig. 2.121 in terms of the peak secondary
voltage Vm.

§ 2.13 PSpice Windows Figure 2.167 Problems 44, 52

49. Perform an analysis of the network of Fig. 2.135 using PSpice Windows.
50. Perform an analysis of the network of Fig. 2.139 using PSpice Windows.
51. Perform an analysis of the network of Fig. 2.142 using PSpice Windows.
52. Perform a general analysis of the Zener network of Fig. 2.167 using PSpice Windows.

* Please Note: Asterisks indicate more difficult problems.

Problems 111