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Logic Diagram:: Module Testbench Reg A, B, C Wire (7:0) D Decoder111 Decoder - 1 (A, B, C, D) Initial Begin

This document describes a logic diagram and truth table for a 3-input decoder with 8 outputs (d0-d7). It includes a testbench program that simulates the decoder logic by applying all possible combinations of inputs (a, b, c) and displaying the corresponding output values. The program outputs the binary values of each output for each of the 8 cases in the truth table.

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Krishna Reddy K
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© Attribution Non-Commercial (BY-NC)
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Download as DOCX, PDF, TXT or read online on Scribd
25 views

Logic Diagram:: Module Testbench Reg A, B, C Wire (7:0) D Decoder111 Decoder - 1 (A, B, C, D) Initial Begin

This document describes a logic diagram and truth table for a 3-input decoder with 8 outputs (d0-d7). It includes a testbench program that simulates the decoder logic by applying all possible combinations of inputs (a, b, c) and displaying the corresponding output values. The program outputs the binary values of each output for each of the 8 cases in the truth table.

Uploaded by

Krishna Reddy K
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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LOGIC DIAGRAM:

TRUTH TABLE:
a
0
0
0
0
1
1
1
1

Inputs
b
0
0
1
1
0
0
1
1

c
0
1
0
1
0
1
0
1

do
0
0
0
0
0
0
0
1

d1
0
0
0
0
0
0
1
0

d2
0
0
0
0
0
1
0
0

Outputs
d3 d4
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0

TESTBENCH PROGRAM:
module Testbench;
reg a, b, c;
wire [7:0] d;
Decoder111 Decoder_1(a,b,c,d);
initial
begin

d5
0
0
1
0
0
0
0
0

d6
0
1
0
0
0
0
0
0

d7
1
1
0
0
0
0
0
0

//case 0
a = 0; b= 0; c=0;
#1 $display("d = %b", d);
//case 1
a = 0; b= 0; c=1;
#1 $display("d = %b", d);
//case 2
a = 0; b= 1; c=0;
#1 $display("d = %b", d);
//case 3
a = 0; b= 1; c=1;
#1 $display("d = %b", d);
//case 4
a = 1; b= 0; c=0;
#1 $display("d = %b", d);
//case 5
a = 1; b= 0; c=1;
#1 $display("d = %b", d);
//case 6
a = 1; b= 1; c=0;
#1 $display("d = %b", d);
//case 7
a = 1; b= 1; c=1;
#1 $display("d = %b", d);

end
endmodulelay("d = %b", d);
//case 7
a = 1; b= 1; c=1;
#1 $display("d = %b", d);
end
endmodule

OUTPUT WAVEFORM:

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