LD7575B

5/26/2008

Green-Mode PWM Controller with High-Voltage Start-Up Circuit

Rev. 00

General Description
The LD7575B is a current-mode PWM controller with excellent power-saving operation. It features a highvoltage current source to directly supply the startup current from bulk capacitor and further to provide a lossless startup circuit. The integrated functions such as the leading-edge blanking of the current sensing, internal slope compensation, and the small package provide the users a high efficiency, minimum external component counts, and low cost solution for AC/DC power applications. Furthermore, the embedded over voltage protection, over load protection and the special green-mode control provide the solution for users to design a high performance power circuit easily. The LD7575B is offered in both SOP-8 and DIP-8 package.

Features
High-Voltage (500V) Startup Circuit Current Mode Control Non-Audible-Noise Green Mode Control UVLO (Under Voltage Lockout) LEB (Leading-Edge Blanking) on CS Pin Programmable Switching Frequency Internal Slope Compensation OVP (Over Voltage Protection) on Vcc OLP (Over Load Protection) 500mA Driving Capability

Applications
Switching AC/DC Adapter and Battery Charger Open Frame Switching Power Supply LCD Monitor/TV Power

Typical Application

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Pin Configuration
SOP-8 & DIP-8 (TOP VIEW) VCC
6

OUT
5

NC

HV

TOP MARK YYWWPP

1 2 3 4

YY: WW: PP:

Year code Week code Production code

RT

COMP

Ordering Information
Part number LD7575B GS LD7575B GN LD7575B PS LD7575B PN Package SOP-8 (Green PK) DIP-8 (Green PK) SOP-8 (Pb Free) DIP-8 (Pb Free) Top Mark LD7575BGS LD7575BGN LD7575BPS LD7575BPN Shipping 2500 /tape & reel 3600 /tube /Carton 2500 /tape & reel 3600 /tube /Carton

The LD7575B is ROHS Complaint.

Pin Descriptions
PIN 1 NAME RT FUNCTION This pin is to program the switching frequency. By connecting a resistor to ground to set the switching frequency. Voltage feedback pin (same as the COMP pin in UC384X), By connecting a photo-coupler to close the control loop and achieve the regulation. Current sense pin, connect to sense the MOSFET current Ground Gate drive output to drive the external MOSFET Supply voltage pin Unconnected Pin Connect this pin to positive terminal of bulk capacitor to provide the startup current 8 HV for the controller. When Vcc voltage trips the UVLO(on), this HV loop will be off to save the power loss on the startup circuit.

2 3 4 5 6 7

COMP CS GND OUT VCC NC

GND

CS

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Block Diagram
HV

1mA 8V POR

32V 16.0V/ 10.0V

UVLO Comparator

OVP Comparator

VCC

internal bias & Vref

VCC OK

27.5V

RT

OSC

PG

Vref OK

R
Green-Mode Control
Vbias OVP PG

Q
OLP

COMP

PWM Comparator 2R R

+ Slope Compensation POR 0.85V OCP Comparator

CS

Leading Edge Blanking

Driver Stage

OUT

clear
30mS Delay OLP Comparator /2 Counter

5.0V

PG

GND

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Absolute Maximum Ratings
Supply Voltage VCC High-Voltage Pin, HV COMP, RT, CS Junction Temperature Operating Ambient Temperature Storage Temperature Range Package Thermal Resistance (SOP-8) Package Thermal Resistance (DIP-8) Power Dissipation (SOP-8, at Ambient Temperature = 85C) Power Dissipation (DIP-8, at Ambient Temperature = 85C) Lead temperature (Soldering, 10sec) ESD Voltage Protection, Human Body Model (except HV Pin) ESD Voltage Protection, Machine Model (except HV Pin) Gate Output Current 30V -0.3V~500V -0.3 ~7V 150C -20C to 85C -65C to 150C 160C/W 100C/W 400mW 650mW 260C 3KV 300V 500mA

Caution:
Stresses beyond the ratings specified in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Recommended Operating Conditions

Item Supply Voltage Vcc Vcc Capacitor Switching Frequency Min. 11 10 50 Max. 25 33 130 Unit V F KHz

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Electrical Characteristics
(TA = +25 C unless otherwise stated, VCC=15.0V) PARAMETER High-Voltage Supply (HV Pin) High-Voltage Current Source Off-State Leakage Current Supply Voltage (Vcc Pin) Startup Current VCOMP=0V Operating Current (with 1nF load on OUT pin) VCOMP=3V Protection tripped (OVP) Protection tripped (OLP) UVLO (off) UVLO (on) OVP Level Voltage Feedback (Comp Pin) Short Circuit Current Open Loop Voltage Green Mode Threshold VCOMP Current Sensing (CS Pin) Maximum Input Voltage Leading Edge Blanking Time Input impedance Delay to Output Oscillator (RT pin) Frequency Green Mode Frequency Temp. Stability Voltage Stability Gate Drive Output (OUT Pin) Output Low Level Output High Level Rising Time Falling Time OLP (Over Load Protection) OLP Trip Level OLP Delay Time (note) Fs=65KHz 5.0 33 V mS VCC=15V, Io=20mA VCC=15V, Io=20mA Load Capacitance=1000pF Load Capacitance=1000pF 9 50 30 160 60 1 V V nS nS RT=100K Fs=65.0KHz (-40C ~105C) (VCC=11V-25V) 60.0 65.0 21 5 1 70.0 KHz KHz % % 1 100 0.80 0.85 220 0.90 V nS M nS VCOMP=0V COMP pin open 1.5 6.3 2.35 2.2 mA V V 9.0 15.0 25.0 0.5 2.4 2.9 0.5 0.43 10.0 16.0 27.5 11.0 17.0 30.0 3.4 4.4 mA mA mA mA mA V V V Vcc< UVLO(on), HV=500V Vcc> UVLO(off), HV=500V 0.5 1.0 1.5 35 mA A CONDITIONS MIN TYP MAX UNITS
o

Note: The OLP delay time is proportional to the period of switching cycle. So that, the lower RT value will set the higher switching frequency and the shorter OLP delay time.

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Typical Performance Characteristics
1.5
0.90

HV Current Source (mA)

1.3

0.88

VSENSE (off) (V)

0 40 80 120 125

0.86

1.1

0.84

0.9
0.82

0.7 -40

0.80 -40

-20

20

40

60

80

100

120

Temperature (C) Fig. 1 HV Current Source vs. Temperature (HV=500V, Vcc=0V)

17. 5

Temperature (C) Fig. 2 VSEN SE (off) vs. Temperature

10. 8 10. 6 10. 4 10. 2

17. 0 16. 5

UVLO (off) (V)

UVLO (on) (V)

16. 0

10. 0 9.8 9.6 9.4 9.2

15. 5

15. 0

14. 5

14. 0

9.0
13. 5 -40 -20 0 20 40 60 80 100 120

8.8

- 40

-20

20

40

60

80

100

120

Temperature (C) Fig. 3 UVLO (on) vs. Temperature

70 68 24

Temperature (C) Fig. 4 UVLO (off ) vs. Temperature

23

Green Frequency (KHz)

Frequency (KHz)

66

22

21

64

20

62

19

60

18 58
- 40 -20 0

16 20 40 60 80 100 120 140 -40

-20 0

20

40

60

80

100

120

140

Temperature (C) Fig. 5 Frequency vs. Temperature

Temperature (C) Fig. 6 Green Mode Frequency vs. Temperature

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70

25

68

Green mode frequency (KHz)

23

Frequency (KHz)

66

21

64

19

62

17

60 11

12

14

16

18

20

22

24

25

15 11

12

14

16

18

20

22

24

25

Vcc (V) Fig. 7 Frequency vs. Vcc

80

Vcc (V) Fig. 8 Green mode frequency vs. Vcc

35

78

30

Max Duty (%)

76

VCC OVP (V)

- 20

25

74

20

72

15

70
- 40

20

40

60

80

100

120

10 -40 0 40 80 120 125

Temperature (C) Fig. 9 Max Duty vs. Temperature

6.6

Temperature (C) Fig. 10

6.0

VCC OVP vs. Temperature

6.4

5.5
6.2

V COMP (V)

6.0

5.8

OLP (V)
-20 0 20 40 60 80 100 120

5.0

5.6

4.5

5.4

4.0
5.2

5.0 -40

3.5 -40 0 40 80 120 125

Temperature ( C) Fig. 11 VCOMP open loop voltage vs. Temperature

Fig. 12

Temperature (C) OLP-Trip Level vs. Temperature

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Application Information
Operation Overview
As long as the green power requirement becomes a trend and the power saving is getting more and more important for the switching power supplies and switching adaptors, the traditional PWM controllers are not able to support such new requirements. Furthermore, the cost and size limitation force the PWM controllers need to be powerful to integrate more functions to reduce the external part counts. The LD7575B is targeted on such application to provide an easy and cost effective solution; its detail features are described as below: threshold thus the current source is on to supply a current with 1mA. Meanwhile, the Vcc supply current is 500A thus half of the HV current is utilized to charge the Vcc capacitor. Thus start-up time can be calculated as:
TStart up = 0.032C Second

C is capacitance value of C1 in uF By using such configuration, the turn-on delay time will be almost same no matter under low-line or high-line conditions. Whenever the Vcc voltage is higher than UVLO(on) to power on the LD7575B and further to deliver the gate drive signal, the high-voltage current source is off and the supply current is provided from the auxiliary winding of the transformer. achieved. An UVLO comparator is included to detect the voltage on Therefore, the power losses on the startup circuit can be eliminated and the power saving can be easily

Internal High-Voltage Startup Circuit and Under Voltage Lockout (UVLO)

Vin

Cbulk R1

D1

the Vcc pin to ensure the supply voltage enough to power on the LD7575B PWM controller and in addition to drive the power MOSFET. during startup. As shown in Fig. 14, a hysteresis is

C1

provided to prevent the shutdown from the voltage dip The turn-on and turn-off threshold level are set at 16V and 10.0V, respectively.

HV

VCC OUT

LD7575B
Comp GND CS

Rs

Fig. 13 Traditional circuit powers up the PWM controller through a startup resistor to provide the startup current. However, the startup resistor consumes significant power which is more and more critical whenever the power saving requirement is coming tight. Theoretically, this startup resistor can be very high resistance value. However, higher resistor value will cause longer startup time. To achieve an optimized topology, as shown in figure 13, LD7575B implements a high-voltage startup circuit for such requirement. During the startup, a high-voltage current source sinks current from the bulk capacitor to provide the startup current as well as charge the Vcc capacitor C1. During the startup transient, the Vcc is lower than the UVLO

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Vcc

Output Stage and Maximum Duty-Cycle

UVLO(on) UVLO(off)

An output stage of a CMOS buffer, with typical 500mA driving capability, is incorporated to drive a power MOSFET directly.
t

And the maximum duty-cycle of LD7575B is

limited to 75% to avoid the transformer saturation.

HV Current
1mA

Voltage Feedback Loop

The voltage feedback signal is provided from the TL431 in the secondary side through the photo-coupler to the COMP pin of LD7575B.
~ 0mA (off)

The input stage of LD7575B, like the

UC384X, is with 2 diodes voltage offset then feeding into the

t

voltage divider with 1/3 ratio, that is,

V+ (PWM COMPARATOR ) = 1 ( VCOMP 2VF ) 3

Vcc current
Operating Current (Supply from Auxiliary Winding) Startup Current (500uA)

A pull-high resistor is embedded internally thus can be eliminated on the external circuit.

Fig. 14

Current Sensing, Leading-edge Blanking and the Negative Spike on CS Pin

The typical current mode PWM controller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. The LD7575B detects the primary MOSFET current from the CS pin, which is not only for the peak current mode control but also for the pulse-by-pulse current limit. The maximum voltage threshold of the current sensing pin is set as 0.85V. Thus the MOSFET peak current can be calculated as:
IPEAK(MAX) = 0.85 V RS
VCC OUT 220ns blanking time

LD7575B
CS

A 220nS leading-edge blanking (LEB) time is included in the input of CS pin to prevent the false-trigger caused by the current spike. In the low power application, if the total pulse width of the turn-on spikes is less than 220nS and the negative spike on the CS pin is not exceed -0.3V, the R-C filter (as shown in figure15) can be eliminated. However, the total pulse width of the turn-on spike is related to the output power, circuit design and PCB layout. It is strongly recommended to add the small R-C filter (as shown in figure 16) for higher power application to avoid the CS pin damaged by the negative turn-on spike.

GND

Can be removed if the negative spike is not over spec. (-0.3V).

Fig. 15

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be disabled immediately under such condition. The off mode can be released when the pull-low signal is removed.

Dual-Oscillator Green-Mode Operation

There saving are many difference such as topologies has been implemented in different chips for the green-mode or power requirements burst-mode control, skipping-cycle Mode, variable off-time control etc. The basic operation theory of all these approaches intended to reduce the switching cycles under light-load or no-load condition either by skipping some switching pulses or reduce the switching frequency. By using this dual-oscillator control, the green-mode frequency can be well controlled and further to avoid the generation of audible noise.

Over Load Protection (OLP)

To protect the circuit from the damage during over load
Fig. 16

condition or short condition, a smart OLP function is implemented in the LD7575B. Figure 17 shows the waveforms of the OLP operation. Under such fault condition, the feedback system will force the voltage loop toward the saturation and thus pull the voltage on COMP pin

Oscillator and Switching Frequency

Connecting a resistor from RT pin to GND according to the equation can program the normal switching frequency:
65.0 100(KHz ) fSW = RT(K)

(VCOMP) to high.

Whenever the VCOMP trips the OLP

threshold 5.0V and keeps longer than 30mS (when switching frequency is 65KHz), the protection is activated and then turns off the gate output to stop the switching of power circuit. The 30mS delay time is to prevent the false trigger from the power-on and turn-off transient.

The suggested operating frequency range of LD7575B is within 50KHz to 130KHz.

A divide-2 counter is implemented to reduce the average power under OLP behavior. Whenever OLP is activated, The latch is released if the output is latched off and the divide-2 counter starts to count the number of UVLO(off). the 2nd UVLO(off) point is counted then the output is recovery to switching again. By using such protection mechanism, the average input power can be reduced to very low level so that the component temperature and stress can be controlled within the safe operating area.

Internal Slope Compensation

A fundamental issue of current mode control is the stability problem when its duty-cycle is operated more than 50%. To stabilize the control loop, the slope compensation is needed in the traditional UC384X design by injecting the ramp signal from the RT/CT pin through a coupling capacitor. In LD7575B, the internal slope compensation circuit has been implemented to simplify the external circuit design.

On/Off Control
The LD7575B can be controlled to turn off by pulling COMP pin to lower than 1.2V. The gate output pin of LD7575B will

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VCC
UVLO(on) UVLO(off) OLP 2nd UVLO(off) OLP Counter Reset

COMP
30mS

5.0V OLP trip Level

t OUT

Fig. 18
Switching Non-Switching Switching

Fault Protection
t

A lot of protection features have been implemented in the LD7575B to prevent the power supply or adapter from being damaged caused by single fault condition on the open or short condition on the pin of LD7575B. Under the conditions listed below, the gate output will be off immediately to protect the power circuit --RT pin short to ground RT pin floating CS pin floating

Fig. 17

OVP (Over Voltage Protection) on Vcc

The Vgs ratings of the nowadays power MOSFETs are most with maximum 30V. To prevent the Vgs from the fault condition, LD7575B is implemented an OVP function on Vcc. Whenever the Vcc voltage is higher than the OVP threshold voltage, the output gate drive circuit will be shutdown simultaneous thus to stop the switching of the power MOSFET until the next UVLO(on). The Vcc OVP function in LD7575B is an auto-recovery type protection. If the OVP condition, usually caused by the The Vcc feedback loop opened, is not released, the Vcc will tripped the OVP level again and re-shutdown the output. is working as a hiccup mode. operation. On the other hand, if the OVP condition is removed, the Vcc level will get back to normal level and the output is automatically returned to the normal operation. Figure 18 shows its

Pull-Low Resistor on the Gate Pin of MOSFET

In LD7575B, an anti-floating resistor is implemented on the OUT pin to prevent the output from any uncertain state which may causes the MOSFET working abnormally or false triggered-on. However, such design wont cover the condition of disconnection of gate resistor Rg thus it is still strongly recommended to have a resistor connected on the MOSFET gate terminal (as shown in figure 19) to provide extra protection for fault condition. This external pull-low resistor is to prevent the MOSFET from damage during power-on under the gate resistor is disconnected. In such single-fault condition, as show in figure 20, the resistor R8 can provide a discharge path to avoid the MOSFET from being false-triggered by the current through the gate-to-drain capacitor Cgd. Therefore, the MOSFET is always pull-low and kept in the off-state whenever the gate resistor is disconnected or opened in any case.

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in figure 21, a small negative spike on the HV pin may trigger this parasitic SCR and causes the latchup between Vcc and GND. And such latchup is easy to damage the chip because of the equivalent short-circuit which is induced by such latchup behavior. Thanks to the Leadtrends proprietary Hi-V technology, there is no such parasitic SCR in LD7575B. Figure 22 shows the equivalent circuit of LD7575Bs Hi-V structure. So that LD7575B is with higher capability to sustain negative voltage than similar products. However, a 40K resistor is recommended to implement on the Hi-V path to be played the role as a current limit resistor whenever a negative voltage is applied in any case.

Fig. 19

Fig. 21

dV i = Cgd bulk dt

Fig. 22 Fig. 20

Protection Resistor on the Hi-V Path

In some other Hi-V process and design, there may cause a parasitic SCR between HV pin, Vcc and GND. As shown

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Reference Application Circuit --- 10W (5V/2A) Adapter
Pin < 0.15W when Pout = 0W & Vin = 264Vac
Schematic

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BOM
P/N Component Value Original P/N Component Value Note

R1A R1B R4A R4B R6 R7 R8 R9 RS1 RS2 RT R51A R51B R52 R53 R54 R55 R56A R56B NTC1 FL1 T1 L51

N/A N/A 39K, 1206 39K, 1206 2.2, 1206 10, 1206 10K, 1206 10K, 1206 2.7, 1206, 1% 2.7, 1206, 1% 100K, 0805, 1% 100, 1206 100, 1206 2.49K, 0805, 1% 2.49K, 0805, 1% 100, 0805 1K, 0805 2.7K, 1206 N/A 5, 3A 20mH EI-22 2.7H 08SP005 UU9.8

C1 C2 C4 C5 C51 C52 C54 C55 CX1 CY1 D1A D1B D1C D1D D2 D4 Q1 CR51 ZD51 IC1 IC2 IC51 F1 Z1

22F, 400V 22F, 50V 1000pF, 1000V, 1206 0.01F, 16V, 0805 1000pF, 50V, 0805 1000F, 10V 470F, 10V 0.022F, 16V, 0805 0.1F 2200pF 1N4007 1N4007 1N4007 1N4007 PS102R 1N4007 2N60B SB540 6V2C LD7575B EL817B TL431 250V, 1A N/A

L-tec L-tec Holystone

L-tec L-tec X-cap Y-cap

600V, 2A

SOP-8 1%

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Package Information
SOP-8

Dimensions in Millimeters Symbols MIN MAX

Dimensions in Inch MIN MAX

A B C D F H I J M

4.801 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 0

5.004 3.988 1.753 0.508 1.346 0.229 0.254 6.198 1.270 8

0.189 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 0

0.197 0.157 0.069 0.020 0.053 0.009 0.010 0.244 0.050 8

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Package Information
DIP-8

Dimension in Millimeters Symbol Min Max

Dimensions in Inches Min Max

A B C D E F I J L

9.017 6.096 ----0.356 1.143 2.337 2.921 7.366 0.381

10.160 7.112 5.334 0.584 1.778 2.743 3.556 8.255 ------

0.355 0.240 -----0.014 0.045 0.092 0.115 0.29 0.015

0.400 0.280 0.210 0.023 0.070 0.108 0.140 0.325 --------

Important Notice
Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should verify the datasheets are current and complete before placing order.
0

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Revision History
Rev. 00 Date 5/26/2008 Change Notice Original Specification.

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