High Efficiency Low-Side N-Channel Controller For Switching Regulators
High Efficiency Low-Side N-Channel Controller For Switching Regulators
High Efficiency Low-Side N-Channel Controller For Switching Regulators
FEATURES
LM3488Q is AEC-Q100 qualified and manufactured on an Automotive Grade Flow 8-lead VSSOP package Internal push-pull driver with 1A peak current capability Current limit and thermal shutdown Frequency compensation optimized with a capacitor and a resistor Internal softstart Current Mode Operation Undervoltage Lockout with hysteresis
DESCRIPTION
The LM3488 is a versatile Low-Side N-FET high performance controller for switching regulators. It is suitable for use in topologies requiring low side FET, such as boost, flyback, or SEPIC. Moreover, the LM3488 can be operated at extremely high switching frequency in order to reduce the overall solution size. The switching frequency of LM3488 can be adjusted to any value between 100kHz and 1MHz by using a single external resistor or by synchronizing it to an external clock. Current mode control provides superior bandwidth and transient response, besides cycle-by-cycle current limiting. Output current can be programmed with a single external resistor. The LM3488 has built in features such as thermal shutdown, short-circuit protection and over voltage protection. Power saving shutdown mode reduces the total supply current to 5A and allows power supply sequencing. Internal soft-start limits the inrush current at start-up.
APPLICATIONS
Distributed Power Systems Notebook, PDA, Digital Camera, and other Portable Applications Offline Power Supplies Set-Top Boxes
KEY SPECIFICATIONS
Wide supply voltage range of 2.97V to 40V 100kHz to 1MHz Adjustable and Synchronizable clock frequency 1.5% (over temperature) internal reference 5A shutdown current (over temperature)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
Copyright 20002013, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
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Connection Diagram
VIN
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
(1)
45V -0.4V < VFB < 7V -0.4V < VFA/SYNC/SD < 7V 1.0A Internally Limited 65C to +150C +150C Human Body Model (2) Vapor Phase (60 sec.) Infared (15 sec.) 2kV 215C 260C 0.4V VDR 8V 600mV
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics. The human body model is a 100 pF capacitor discharged through a 1.5k resistor into each pin.
LM3488 LM3488-Q1
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Operating Ratings
Supply Voltage
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device is intended to be functional. For specifications and test conditions, see the Electrical Characteristics.
Electrical Characteristics
Specifications in Standard type face are for TJ = 25C, and in bold type face apply over the full Operating Temperature Range. Unless otherwise specified, VIN = 12V, RFA = 40k
Symbol VFB Parameter Feedback Voltage Conditions VCOMP = 1.4V, 2.97 VIN 40V 2.97 VIN 40V IEAO Source/Sink Typical 1.26 1.2507/1.24 1.2753/1.28 0.001 0.5 2.85 2.97 VUV(HYS) Input Undervoltage Lock-out Hysteresis 170 130 210 Fnom Nominal Switching Frequency RFA = 40K 400 360 430 RDS1 RDS2
(ON) (ON)
Limit
Unit V V(min) V(max) %/V %/V (max) V V(max) mV mV (min) mV (max) kHz kHz(min) kHz(max) V %
Feedback Voltage Line Regulation Output Voltage Load Regulation Input Undervoltage Lock-out
Driver Switch On Resistance (top) Driver Switch On Resistance (bottom) Maximum Drive Voltage Swing (1) Maximum Duty Cycle (2) Minimum On Time
IDR = 0.2A, VIN= 5V IDR = 0.2A VIN < 7.2V VIN 7.2V
nsec nsec(min) nsec(max) mA mA (max) A A (max) mV mV (min) mV (max) mV mV (min) mV (max) mV mV(min) mV(max) (min) (max) mV mV(min) mV(max)
ISUPPLY IQ VSENSE
Supply Current (switching) Quiescent Current in Shutdown Mode Current Sense Threshold Voltage
(3)
VSC
VIN = 5V
VSL
VIN = 5V
92 52 132
VSL/VSENSE Output Over-voltage Protection (with respect to feedback voltage) (5) VCOMP = 1.4V
0.49 50
The voltage on the drive pin, VDR is equal to the input voltage when input voltage is less than 7.2V. VDR is equal to 7.2V when the input voltage is greater than or equal to 7.2V. The limits for the maximum duty cycle can not be specified since the part does not permit less than 100% maximum duty cycle operation. For this test, the FA/SYNC/SD Pin is pulled to ground using a 40K resistor . For this test, the FA/SYNC/SD Pin is pulled to 5V using a 40K resistor. The over-voltage protection is specified with respect to the feedback voltage. This is because the over-voltage protection tracks the feedback voltage. The over-voltage thresold can be calculated by adding the feedback voltage, VFB to the over-voltage protection specification. Submit Documentation Feedback 3
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Gm
AVOL
IEAO
The FA/SYNC/SD pin should be pulled to VIN through a resistor to turn the regulator off.
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Figure 5.
Figure 6.
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Figure 11.
Figure 12.
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Figure 17.
Figure 18.
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Figure 20.
Figure 21.
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FUNCTIONAL DESCRIPTION
The LM3488 uses a fixed frequency, Pulse Width Modulated (PWM), current mode control architecture. In a typical application circuit, the peak current through the external MOSFET is sensed through an external sense resistor. The voltage across this resistor is fed into the ISEN pin. This voltage is then level shifted and fed into the positive input of the PWM comparator. The output voltage is also sensed through an external feedback resistor divider network and fed into the error amplifier negative input (feedback pin, FB). The output of the error amplifier (COMP pin) is added to the slope compensation ramp and fed into the negative input of the PWM comparator. At the start of any switching cycle, the oscillator sets the RS latch using the SET/Blank-out and switch logic blocks. This forces a high signal on the DR pin (gate of the external MOSFET) and the external MOSFET turns on. When the voltage on the positive input of the PWM comparator exceeds the negative input, the RS latch is reset and the external MOSFET turns off. The voltage sensed across the sense resistor generally contains spurious noise spikes, as shown in Figure 22. These spikes can force the PWM comparator to reset the RS latch prematurely. To prevent these spikes from resetting the latch, a blank-out circuit inside the IC prevents the PWM comparator from resetting the latch for a short duration after the latch is set. This duration is about 150ns and is called the blank-out time.
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Under extremely light load or no-load conditions, the energy delivered to the output capacitor when the external MOSFET is on during the blank-out time is more than what is delivered to the load. An over-voltage comparator inside the LM3488 prevents the output voltage from rising under these conditions. The over-voltage comparator senses the feedback (FB pin) voltage and resets the RS latch under these conditions. The latch remains in reset state till the output decays to the nominal value.
(1)
From the above equation, when D > 0.5, I1 will be greater than IO. In other words, the disturbance is divergent. So a very small perturbation in the load will cause the disturbance to increase. To prevent the sub-harmonic oscillations, a compensation ramp is added to the control signal, as shown in Figure 24. With the compensation ramp,
(2)
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Figure 24. Compensation Ramp Avoids Sub-Harmonic Oscillation The compensation ramp has been added internally in LM3488. The slope of this compensation ramp has been selected to satisfy most of the applications. The slope of the internal compensation ramp depends on the frequency. This slope can be calculated using the formula:
MC = VSL.FS Volts/second (3)
In the above equation, VSL is the amplitude of the internal compensation ramp. Limits for VSL have been specified in the electrical characteristics. In order to provide the user additional flexibility, a patented scheme has been implemented inside the IC to increase the slope of the compensation ramp externally, if the need arises. Adding a single external resistor, RSL(as shown in Figure 25) increases the slope of the compensation ramp, MC by :
'MC = 40x10-6 RSL FS Amps second RSEN
. .
(4)
(5)
VSL versus RSL has been plotted in Figure 26 for different frequencies.
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FREQUENCY ADJUST/SYNCHRONIZATION/SHUTDOWN
The switching frequency of LM3488 can be adjusted between 100kHz and 1MHz using a single external resistor. This resistor must be connected between FA/SYNC/SD pin and ground, as shown in Figure 27. See Typical Performance Characteristics to determine the value of the resistor required for a desired switching frequency.
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The LM3488 can be synchronized to an external clock. The external clock must be connected to the FA/SYNC/SD pin through a resistor, RSYNC as shown in Figure 28. The value of this resistor is dependent on the off time of the synchronization pulse, TOFF(SYNC). Table 1 shows the range of resistors to be used for a given TOFF(SYNC). Table 1.
TOFF(SYNC) (sec) 1 2 3 4 5 6 7 8 9 10 RSYNC range (k) 5 to 13 20 to 40 40 to 65 55 to 90 70 to 110 85 to 140 100 to 160 120 to 190 135 to 215 150 to 240
It is also necessary to have the width of the synchronization pulse wider than the duty cycle of the converter (when DR pin is high and the switching point is low). It is also necessary to have the synchronization pulse width 300nsecs. The FA/SYNC/SD pin also functions as a shutdown pin. If a high signal (see Electrical Characteristics for definition of high signal) appears on the FA/SYNC/SD pin, the LM3488 stops switching and goes into a low current mode. The total supply current of the IC reduces to less than 10A under these conditions. Figure 29 and Figure 30 show implementation of shutdown function when operating in Frequency adjust mode and synchronization mode respectively. In frequency adjust mode, connecting the FA/SYNC/SD pin to ground forces the clock to run at a certain frequency. Pulling this pin high shuts down the IC. In frequency adjust or synchronization mode, a high signal for more than 30s shuts down the IC. Figure 31 shows implementation of both frequency adjust with RFA resistor and frequency synchronization with RSYNC. The switching frequency is defined by RFA when a synchronization signal is not applied. When sync is applied it overrides the RFA setting.
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RSYNC FA/SYNC/SD
CSYNC 270 pF
LM3488
RFA
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SHORT-CIRCUIT PROTECTION
When the voltage across the sense resistor (measured on ISEN Pin) exceeds 350mV, short-circuit current limit gets activated. A comparator inside LM3488 reduces the switching frequency by a factor of 5 and maintains this condition till the short is removed.
TYPICAL APPLICATIONS
The LM3488 may be operated in either continuous or discontinuous conduction mode. The following applications are designed for continuous conduction operation. This mode of operation has higher efficiency and lower EMI characteristics than the discontinuous mode.
BOOST CONVERTER
The most common topology for LM3488 is the boost or step-up topology. The boost converter converts a low input voltage into a higher output voltage. The basic configuration for a boost regulator is shown in Figure 32. In continuous conduction mode (when the inductor current never reaches zero at steady state), the boost regulator operates in two cycles. In the first cycle of operation, MOSFET Q is turned on and energy is stored in the inductor. During this cycle, diode D is reverse biased and load current is supplied by the output capacitor, COUT. In the second cycle, MOSFET Q is off and the diode is forward biased. The energy stored in the inductor is transferred to the load and output capacitor. The ratio of these two cycles determines the output voltage. The output voltage is defined as:
(6)
where
D is the duty cycle of the switch VD is the forward voltage drop of the diode VQ is the drop across the MOSFET when it is on
(7)
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Figure 32. Simplified Boost Converter Diagram (a) First cycle of operation (b) Second cycle of operation
(8)
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IL (A)
VIN L
IL_AVG
VIN
VOUT L
'iL
ID (A)
VIN - V OUT L
ID_AVG =IOUT_AVG
ISW (A)
VIN L
ISW_AVG
Figure 33. A. Inductor Current B. Diode Current C. Switch Current If VL(t) is constant, diL(t)/dt must be constant. Hence, for a given input voltage and output voltage, the current in the inductor changes at a constant rate.
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The important quantities in determining a proper inductance value are IL (the average inductor current) and iL (the inductor current ripple). If iL is larger than IL, the inductor current will drop to zero for a portion of the cycle and the converter will operate in discontinuous conduction mode. If iL is smaller than IL, the inductor current will stay above zero and the converter will operate in continuous conduction mode. All the analysis in this datasheet assumes operation in continuous conduction mode. To operate in continuous conduction mode, the following conditions must be met:
IL > iL (9)
(10)
(11)
Choose the minimum IOUT to determine the minimum L. A common choice is to set iL to 30% of IL. Choosing an appropriate core size for the inductor involves calculating the average and peak currents expected through the inductor. In a boost converter,
(12)
A core size with ratings higher than these values should be chosen. If the core is not properly rated, saturation will dramatically reduce overall efficiency. The LM3488 can be set to switch at very high frequencies. When the switching frequency is high, the converter can be operated with very small inductor values. With a small inductor value, the peak inductor current can be extremely higher than the output currents, especially under light load conditions. The LM3488 senses the peak current through the switch. The peak current through the switch is the same as the peak current calculated above.
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VIN
VOUT
DR LM3488 ISEN FB
COUT
Rfb1
RSEN
Rfb2
where
ISWLIMIT is the peak switch current limit, defined by the equation below. As duty cycle increases, the control voltage is reduced as VSL ramps up. Since current limit threshold varies with duty cycle, the following equation should be used to select RSEN and set the desired current limit threshold: (15)
RSEN =
The numerator of the above equation is VCS, and ISWLIMIT is calculated as:
ISWLIMIT = IOUT (1-D) (2 x fS x L) + (D x VIN)
(17)
To avoid false triggering, the current limit value should have some margin above the maximum operating value, typically 120%. Values for both VSENSE and VSL are specified in Electrical Characteristics. However, calculating with the limits of these two specs could result in an unrealistically wide current limit or RSEN range. Therefore, the following equation is recommended, using the VSL ratio value given in Electrical Characteristics:
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RSEN =
RSEN is part of the current mode control loop and has some influence on control loop stability. Therefore, once the current limit threshold is set, loop stability must be verified. To verify stability, use the following equation: 2 x VSL x fS x L RSEN < Vo - (2 x VIN)
(19)
If the selected RSEN is greater than this value, additional slope compensation must be added to ensure stability, as described in CURRENT LIMIT WITH EXTERNAL SLOPE COMPENSATION.
where
RSEN is the selected value based on current limit. With RSL installed, the control signal includes additional external slope to stabilize the loop, which will also have an effect on the current limit threshold. Therefore, the current limit threshold must be re-verified, as illustrated in the equations below : (20) VCS = VSENSE (D x (VSL + VSL))
where
VSL is the additional slope compensation generated and calculated as: VSL = 40 A x RSL (21) (22)
This changes the equation for current limit (or RSEN) to: VSENSE - (D x(VSL + 'VSL)) ISWLIMIT = RSEN
(23)
The RSEN and RSL values may have to be calculated iteratively in order to achieve both the desired current limit and stable operation. In some designs RSL can also help to filter noise on the ISEN pin. If the inductor is selected such that ripple current is the recommended 30% value, and the current limit threshold is 120% of the maximum peak, a simpler method can be used to determine RSEN. The equation below will provide optimum stability without RSL, provided that the above 2 conditions are met: VSENSE RSEN = Vo - Vi xD ISWLIMIT + L x fS
(24)
In the above equation, IOUT is the output current and IL has been defined in Figure 33. The peak reverse voltage for boost converter is equal to the regulator output voltage. The diode must be capable of handling this voltage. To improve efficiency, a low forward drop schottky diode is recommended.
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where
DMAX is the maximum duty cycle. (26) (27)
The turn-on and turn-off transitions of a MOSFET require times of tens of nano-seconds. CRSS and Qg are needed to estimate the large instantaneous power loss that occurs during these transitions. The amount of gate current required to turn the MOSFET on can be calculated using the formula:
IG = Qg.FS (28)
The required gate drive power to turn the MOSFET on is equal to the switching frequency times the energy required to deliver the charge to bring the gate charge voltage to VDR (see Electrical Characteristics and Typical Performance Characteristics for the drive voltage specification).
PDrive = FS.Qg.VDR (29)
(30)
The input capacitor should be capable of handling the rms current. Although the input capacitor is not as critical in a boost application, low values can cause impedance interactions. Therefore a good quality capacitor should be chosen in the range of 10F to 20F. If a value lower than 10F is used, then problems with impedance interactions or switching noise can affect the LM3478. To improve performance, especially with VIN below 8 volts, it is recommended to use a 20 resistor at the input to provide a RC filter. The resistor is placed in series with the VIN pin with only a bypass capacitor attached to the VIN pin directly (see Figure 35). A 0.1F or 1F ceramic capacitor is necessary in this configuration. The bulk input capacitor and inductor will connect on the other side of the resistor with the input power supply.
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VIN CIN
(31)
Where
(32)
and D, the duty cycle is equal to (VOUT VIN)/VOUT. The ESR and ESL of the output capacitor directly control the output ripple. Use capacitors with low ESR and ESL at the output for high efficiency and low ripple voltage. Surface Mount tantalums, surface mount polymer electrolytic and polymer tantalum, Sanyo- OSCON, or multi-layer ceramic capacitors are recommended at the output.
(33)
In the above equation, VQ is the on-state voltage of the MOSFET, Q, and VDIODE is the forward voltage drop of the diode.
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(37)
IL2AVE = IOUT
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(40)
(41)
maintains the condition IL > iL/2 to ensure constant current mode. (VIN - VQ)(1-D) L1 > 2IOUTfS
L2 > (VIN - VQ)D 2IOUTfS
(42)
(43)
Peak current in the inductor, to ensure the inductor does not saturate:
(44) (45)
IL1PK must be lower than the maximum current rating set by the current sense resistor. The value of L1 can be increased above the minimum recommended to reduce input ripple and output ripple. However, once DIL1 is less than 20% of IL1AVE, the benefit to output ripple is minimal. By increasing the value of L2 above the minimum recommended, IL2 can be reduced, which in turn will reduce the output ripple voltage:
'VOUT =
IOUT 1-D
'IL2 2
ESR
where
ESR is the effective series resistance of the output capacitor. (46)
If L1 and L2 are wound on the same core, then L1 = L2 = L. All the equations above will hold true if the inductance is replaced by 2L. A good choice for transformer with equal turns is Coiltronics CTX series Octopack.
The SEPIC capacitor must be rated for a large ACrms current relative to the output power. This property makes the SEPIC much better suited to lower power applications where the rms current through the capacitor is relatively small (relative to capacitor technology). The voltage rating of the SEPIC capacitor must be greater than the maximum input voltage. Tantalum capacitors are the best choice for SMT, having high rms current ratings relative to size. Ceramic capacitors could be used, but the low C values will tend to cause larger changes in voltage across the capacitor due to the large currents. High C value ceramics are expensive. Electrolytics work well for through hole applications where the size required to meet the rms current rating can be accommodated. There is an energy balance between CS and L1, which can be used to determine the value of the capacitor. The basic energy balance equation is:
24 Submit Documentation Feedback
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(49)
Where
(50)
(51)
is the ripple current through the inductor L1. The energy balance equation can be solved to provide a minimum value for CS:
(52)
The input capacitor should be capable of handling the rms current. Although the input capacitor is not as critical in a boost application, low values can cause impedance interactions. Therefore a good quality capacitor should be chosen in the range of 10F to 20F. If a value lower than 10F is used, then problems with impedance interactions or switching noise can affect the LM3478. To improve performance, especially with VIN below 8 volts, it is recommended to use a 20 resistor at the input to provide a RC filter. The resistor is placed in series with the VIN pin with only a bypass capacitor attached to the VIN pin directly (see Figure 35). A 0.1F or 1F ceramic capacitor is necessary in this configuration. The bulk input capacitor and inductor will connect on the other side of the resistor with the input power supply.
The ESR and ESL of the output capacitor directly control the output ripple. Use low capacitors with low ESR and ESL at the output for high efficiency and low ripple voltage. Surface mount tantalums, surface mount polymer electrolytic and polymer tantalum, Sanyo- OSCON, or multi-layer ceramic capacitors are recommended at the output for low ripple.
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CC 22 nF
D MBRD340
LM3488
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REVISION HISTORY
Changes from Revision L (March 2013) to Revision M Page
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PACKAGING INFORMATION
Orderable Device LM3488MM LM3488MM/NOPB LM3488MMX LM3488MMX/NOPB LM3488QMM/NOPB LM3488QMMX/NOPB Status
(1)
Package Type Package Pins Package Qty Drawing VSSOP VSSOP VSSOP VSSOP VSSOP VSSOP DGK DGK DGK DGK DGK DGK 8 8 8 8 8 8 1000 1000 3500 3500 1000 3500
Eco Plan
(2)
Op Temp (C)
Top-Side Markings
(4)
Samples
TBD Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
Call TI Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM -40 to 125 -40 to 125 -40 to 125 -40 to 125 -40 to 125
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Only one of markings shown within the brackets will appear on the physical device.
(4)
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
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continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
Device
Package Package Pins Type Drawing VSSOP VSSOP VSSOP VSSOP VSSOP VSSOP DGK DGK DGK DGK DGK DGK 8 8 8 8 8 8
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 178.0 178.0 330.0 330.0 178.0 330.0 12.4 12.4 12.4 12.4 12.4 12.4 5.3 5.3 5.3 5.3 5.3 5.3
Pack Materials-Page 1
Pins 8 8 8 8 8 8
Pack Materials-Page 2
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