Department of Instrumentation Technology

R.V. College of Engineering, Bangalore

IT-10/Rev.1.0

Lesson Plan
Cover Page: Course Overview Semester: VII Course Title: Real Time Systems and Applications and Lab Total Contact Hours: 42 hrs SEE Marks: 100+50 Lesson Plan Author: Soumya M Checked By: Year: 2011-12 Course Code: 07IT73 Duration of SEE: 3+3 hrs CIE Marks: 100+50 Date: Date:

Prerequisites: To understand Real time systems, a student must have strong basics of embedded system and C programming. Course Overview: The course is about understanding basic concepts of operating systems, Real time system, real time memory management and its associated embedded system. Course Learning Objectives-CLO 1. 2. 3. 4. 5. To explore through the basics of RTOS and to master the essential command set, that can be used to work comfortably. RTOS provides a number of real time concepts like semaphores, mutex, thread, process, priorities, etc. The ability to combine commands to perform tasks that are not possible to achieve using single command. Understand the significance of C programming to attain real time objectives. Acquire knowledge of real time memory management.

Department of Instrumentation Technology

R.V. College of Engineering, Bangalore

Course Content
Course Code: 07IT73 Course Title: REAL TIME SYSTEMS AND APPLICATIONS AND LAB Teaching Hours: 42 Part A 1. Basic Real time concepts: Basic computer architecture bus transfer mechanism, input and output memory, CPU operation: Terminology, software concepts, system concepts, real time definitions, 03 hours events and determination, synchronous and asynchronous events, determinism, time loading; real time design issues. 2. Real time specification and design techniques: Natural languages: mathematical specifications, flow charts, structure charts, pseudo code and programming design languages, finite state automata, data flow diagrams DeMarcos rules, Hately and Pribhais extensions; petri nets, warnier-orr notation Indexed loop, state charts depth, orthogonality, broadcast communication, sanity in using graphical techniques 3. Real time kernels: Polled loop system, polled loop with interrupts, phase/state driven code, co routines, interrupt driven systems, context switching, round robin systems, pre emptive priority systems, major and minor cycles, hybrid systems, foreground-background systems, background processing, initialization, real-time operation, full featured real time operation systems Task control block model, Build or buy POSIX Part B 4. Intertask communication and Synchronization: Buffering data Time relative buffering, ring buffers, mailboxes mailboxes and semaphores, counting semaphores, problems with semaphores, the test and set instruction, event flags and signals, deadlock avoidance, detect and recover, priority inversion. 10 hours 06 hours 07 hours L-T-P: 3-1-3 CIE: 100+50 SEE: 100+50

5. Real time memory management:

06 hours
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Department of Instrumentation Technology

R.V. College of Engineering, Bangalore Process stack management, task control block model, managing the stack, run time ring buffer, maximum stack size, multiple stack arrangements, task control block model, dynamic allocation swapping, overlays, MFT, MVT, demand paging, working sets, real-time garbage collection, contiguous fils systems; static schemes. Part - C 6. Interrupt servicing mechanism: Context and the periods for context switching; deadline and interrupt latency, language features: parameter passing, recursion, dynamic allocation, typing, exception handling, abstract data typing. 7. Case studies: Vx Works and MuCOS 05hours 5hours

Reference Books: 1. Philip A Laplante Real time systems design and analysis and engineers handbook, PHI publication, Second edition, 2000 2. Rajkamal Embedded systems architecture programming and design Tata McGraw Hill, 2004. 3. Dr. K.V.K.K Prasad Embedded/Real time systems: concepts, design and programming, Dreamtech press, 2005. 4. Steve Heath, Embedded systems design:, Second edition. 5. Krishna and shinkong Real time systems, McGraw Hill Publications, 2nd edition.

Evaluation Scheme

Department of Instrumentation Technology

R.V. College of Engineering, Bangalore CIE Scheme Assessment 2 Quiz 2 Internals Total Weightage in Marks 20 30 50

Best out of 2 Quiz and 2 Internals will be considered for CIE marks. Course Unitization for Internals and Semester End Examination
Part 1 A 2 Chapter Basic real time concepts Real time specification and design techniques Real time kernels Intertask communication and Synchronization Real time memory management 6 C 7 Interrupt servicing mechanism Case studies 5 2 5 3 2 Teaching Hours 3 7 3 6 10 6 1 2 3 2 No. of Questions in Internals I 2 Internals II Compensatory Internals 3 No. of Questions in SEE

3 4

Note: 1. Eight questions will be asked in the internals out of which student should answer five questions. Each question carries 10 Marks. 2. Eight questions will be asked in the Examination out of which student should answer five questions choosing atleast Two from PART-A, One from PART-B and Two from PART-C. Faculty In-charge Head of Department
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Department of Instrumentation Technology

R.V. College of Engineering, Bangalore Date:

Department of Instrumentation Technology

R.V. College of Engineering, Bangalore Chapter wise Plan Part A
Course Code and Title: (07IT73 ) REAL TIME SYSTEMS AND APPLICATIONS AND LAB Planned Hours:04 hrs

Chapter Number and Title: 01 Basic Real-Time Concepts

Learning Objectives 1. This chapter will explore through the basics of RTOS, and also helps to master the command set. 2. The multiprogramming, multiuser and multitasking nature of RTOS. 3. What System calls are and how they enrich the RTOS programming environment. 4. The other features of RTOS its vast collection of tools, pattern matching and wide variety of its documentation sources. Lesson Schedule Class No. Portion covered per hour 1. Basic computer architecture bus transfer mechanism, input and output memory, CPU operation. 2. Terminology, software concepts, system concepts, real time definitions, events and determination. 3. Synchronous and asynchronous events, determinism, time loading; real time design issues. Model Questions What are hard, firm and Soft Real Time systems? Consider a payroll processing system for a small manufacturing firm. Describe three different scenarios in which the system can be justified as hard, firm or soft real time. Define response time. Model a real time system describing its features and how it is different from a typical I/O system. When can we say that a system is deterministic? Illustrate it with an example. What do we mean by CPU utilization? Enumerate scenarios where CPU utilization factor is essential in determining its performance. What are the services offered by Kernel? Describe a pre-emptive and nonpreemptive kernel highlighting the difference between the two.

1.

2. 3. 4.

5.

Department of Instrumentation Technology

R.V. College of Engineering, Bangalore Learning Objectives
Course Code and Title: (07IT73 ) REAL TIME SYSTEMS AND APPLICATIONS AND LAB Chapter Number and Title: 02 Real-Time specification and Design Techniques Planned Hours: 06 hrs

1. This chapter helps in developing knowledge in languages required for basic programming and mathematical specifications 2. Discern in depth about formulating flowcharts and state charts for different real time problems. 3. Be acquainted with pseudo code generation for a problem. 4. Be familiar with petrinets ,data flow diagrams and orthogonality. Lesson Schedule Class No. Portion covered per hour 1. Natural languages: mathematical specifications 2. Flow charts, structure charts 3. 4. Pseudo code and programming design languages Finite state automata

5. Data flow diagrams DeMarcos rules, Hately and Pribhais extensions 6. Petri nets, warnier-orr notation Indexed loop, state charts depth 7. Orthogonality, broadcast communication, sanity in using graphical techniques

Model Questions 1. 2. 3. 4. 5. 6. 7. What are the disadvantages of modeling using state chart Taking an example of a digital clock, model it using the state chart. state all the assumptions made. How is state chart better than FSM modeling an embedded system. Describe finite state automata with a example. Explain about data flow diagrams. and Demarcos rules. What are petrinets ? show a typical petrinet and firing for typical petrinet? With an explain pseudo code for an automatic teller machine.

Department of Instrumentation Technology

R.V. College of Engineering, Bangalore

Course Code and Title: (07IT73 ) REAL TIME SYSTEMS AND APPLICATIONS AND LAB Chapter Number and Title: 03 Real-Time Kernels Planned Hours: 05 hrs

Learning Objectives 1. Comprehend pooled loop systems and polled loop with interrupts. 2. Identify phase and state driven systems and co routines and their significance in rael time design. 3. Distinguish between Round robin and pre emptive systems and their importance. 4. Realize full featured RTOS. Lesson Schedule Class No. Portion covered per hour 1. Polled loop system, polled loop with interrupts 2. Phase/state driven code, coroutines 3. Interrupt driven systems, context switching 4. Round robin systems, pre emptive priority systems, major and minor cycles, hybrid systems 5. Foreground-background systems, background processing, initialization, real-time operation 6. Full featured real time operation systems Task control block model, Build or buy POSIX Model Questions 1. What is interrupt-only driven system? Explain a foreground-background system highlighting its improvement over interrupt only systems. Describe the process how a co-routine executes with the help of a pseudo code. What is interrupt-only driven system? Explain a foreground-background system highlighting its improvement over interrupt only systems. What are cyclic executives? Construct a cyclic executive with four processes, 1, 2, 3, 4; Process_2 runs two times as frequently as Process_1 and Process_3 and Process_2 runs four times as frequently as Process_4. Explain TCB model with different task states.

2. 3.

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Department of Instrumentation Technology

R.V. College of Engineering, Bangalore Part - B
Course Code and Title: (07IT73 ) REAL TIME SYSTEMS AND APPLICATIONS AND LAB Chapter Number and Title: 04 Intertask communication and synchronization Planned Hours: 04 hrs

Learning Objectives 1. 2. 3. 4. Be acquainted with the various buffering methods in real time system design. Be familiar with semaphores and mailboxes and use them in programming. Realize the importance of deadlock and deadlock avoidance in real time design. Appreciate the significance of priority inversion and how to avoid it.

Lesson Schedule Class No. Portion covered per hour 1. Buffering data Time relative buffering, 2. Ring buffers, 3. Mailboxes mailboxes 4. 5. Semaphores, counting semaphores, Problems with semaphores,

6. The test and set instruction, 7. Event flags and signals, 8. Deadlock avoidance, 9. Detect and recover, 10. Priority inversion. Model Questions 1. 2. 3. What are the advantages of ring buffer over buffering or time-relative buffering? With pseudo code, explain the operation of a ring buffer. In brief, write a note on mailbox and message queue highlighting the difference between the two concepts. What are semaphores and where is it implemented? Explain the types of semaphores available in an RTOS and illustrate with an example of its utilization. Explain priority inversion with an example and how to overcome it?

4. 5. 6.

Department of Instrumentation Technology

R.V. College of Engineering, Bangalore

Course Code and Title: (07IT73 ) REAL TIME SYSTEMS AND APPLICATIONS AND LAB Chapter Number and Title: 05 Real-Time Memory Management Planned Hours: 03 hrs

Learning Objectives 1. Discern Dynamic memory management of any kind in real time systems. 2. Identify the techniques for managing stacks and task control blocks. 3. Value of memory management or paging of memory in real time systems. Lesson Schedule Class No. Portion covered per hour 1. Process stack management, task control block model, managing the stack, run time ring buffer 2. Maximum stack size, multiple stack arrangements 3. Task control block model, dynamic allocation swapping, overlays 4. MFT, MVT, demand paging, working sets, real-time garbage collection 5. Contiguous fils systems; static schemes. Model Questions 1. 2. 3. How does state chart better the FSM way of modeling embedded system? Write a note on modeling hierarchy. Describe the history mechanism involved in a state chart. Taking an example of a digital clock, model it using the state chart. State all the assumptions made. What are the disadvantages of modeling using a state chart? In memory management, how can we use a single list instead of multiple lists while implementing the TCB model of real time multitasking? Mention its advantage and 6. 7. 8. 9. disadvantage Which technique allows single program to be larger than the allowable program memory? Elaborate on the technique. In demand memory page systems, when is page staling done? How do we access a desired page by referencing via a page table? What are the disadvantages of using memory paging? Explain the concept of replacement algorithm. Take an example of a paged memory system divided into sixteen 256kb pages of which any 5 can be loaded at the same time

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Part C
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Department of Instrumentation Technology

R.V. College of Engineering, Bangalore Learning Objectives
Course Code and Title: (07IT73 ) REAL TIME SYSTEMS AND APPLICATIONS AND LAB Chapter Number and Title: 06 Interrupt Servicing mechanism Planned Hours: 04 hrs

1. Significance of context switching in real time design. 2. Prediction of worst case performance in real time design. 3. Considering the trade off in time and memory requirements. 4. Value of exception handling. Lesson Schedule Class No. Portion covered per hour 1. Context and the periods for context switching; 2. Deadline and interrupt latency 3. Language features: parameter passing 4. Recursion, dynamic allocation, typing

5. Exception handling, abstract data typing.

Model Questions 1. 2. 3. 4. 5. 6. Explain about context switching in detail What do you mean by dead line and interrupt latency in and RTOS With the help of a pseudo code illustrate recursion With the help of a pseudo code illustrate dynamic allocation With the help of a pseudo code illustrate exception handling Write short notes on abstract data typing and parameter passing

Learning Objectives
Course Code and Title: (07IT73 ) REAL TIME SYSTEMS AND APPLICATIONS AND LAB Chapter Number and Title: 07 Case studies Planned Hours: 02 hrs

1. Real time communication tools and an impressive collection of email agents and tools. 2. Locking user information with Vx Works , online text chat with MuCOS .
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Department of Instrumentation Technology

R.V. College of Engineering, Bangalore

Lesson Schedule Class No. Portion covered per hour 1. Vx Works: Details of Users, mesg: Your Willingness to Communicate, write: Communicating alternatively 2. MuCOS: Online Communication, wall: writing on all terminals, news: knowing the local events, Email Basics, The mail command Model Questions 1. 2. Design a class diagram using UML for an Automatic Chocolate Vending Machine. Also give examples for any one of class and object representations. Design the hardware and software architectures for a Digital camera. State your assumptions made for the performance of the system prior to the design.

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Department of Instrumentation Technology

R.V. College of Engineering, Bangalore

DEPARTMENT OF INSTRUMENTATION TECHNOLOGY R.V. COLLEGE OF ENGINEERING, BANGALORE 560 059. Model Question Paper REAL TIME SYSTEMS AND APPLICATIONS AND LAB Semester VII Sem B.E Subject Code: 07IT73 DATE: Max. Marks: 100 Marks TIME: Exam Time Note: 1. Answer five questions choosing at least Two from PART-A, One from PART-B and Two from PART-C. 2. Write neat diagrams wherever required. 1 PART A a) Define synchronous and asynchronous events.map them against periodic aperiodic [06] and sporadic event. b) Discuss whether the following are hard, soft or firm real-time system: (a) The library [04] of a congress print manuscript database system. (b) Automatic teller machine c) What are the design issues we come across dealing with real time systems? give one example of an RTS you come across on day to day basis and enumerate the design issues of that system. 2 a) Explain basic petrinet. model a system on an assembly line that counts 5 items and then sends a signal to the operator. [10]

b) Determine whether the following set is RM schedulable or not. If not schedule it with [10] EDF [T1(5,8),T2(1,9),T3(1,5)] 3 a) What are the disadvantages of EDF over fixed priority algorithm? Show the rm schedule of i si 1 0 2 1 3 2 ei 2 1 2 Pi=di 5 4 20 [02] [10] [10]

b) When is an ISR said to be re-entrant? c) Explain a context switch with a pseudo code. why should it be minimized?

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Department of Instrumentation Technology

R.V. College of Engineering, Bangalore

PART B 4 a) What are the ways to avoid deadlock in intertask communication? explain bankers algorithm illustrating safe and unsafe states for 3 process. b) When does priority inversion occur? How does priority inheritance protocol solves inversion problem . describe both with timing diagrams 5 a) Discuss issues related to buffering data using global variables. How is time related buffering done by readers and writers problem. [10]

[10] [10]

b) Give an example of mailbox implementation which has 4 tasks and 3 recourses. Draw [06] task resource request table and resource table and state your assumptions. c) Write short note on critical region with example. 6 a) What are the basic differences between a mutex and a semaphore? Illustrate their implementation in detail with pseudo code. b) Explain process stack management using run time stack and TCB model. PART C 7 a) What do you mean by throwing an exception? How is the exception condition during [10] execution of a function handled. b) Why is the context switching in an embedded processor faster than saving the pointers and variables on the stack using stack pointer. How does the context switching time [10] reduce in processor architectures for embedded system. 8 a) Design a class diagram using UML for an Automatic Chocolate Vending Machine. Also give examples for any one of class and object representations. b) Design the hardware and software architectures for a Digital camera. State your assumptions made for the performance of the system prior to the design. [10] [10] [04] [10] [10]

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