Lecture01 Intro 2up
Lecture01 Intro 2up
Lecture01 Intro 2up
Course Focus
Focus:
Circuit design for modern electrical interfaces
Goal:
Learn how to design an optimized link given a target application
EE290C Lecture 1 2
Administrative
Course web page:
http://bwrc.eecs.berkeley.edu/classes/icdesign/ee290c_s11
Webcast link:
http://webcast.berkeley.edu
Office hours
519 Cory Hall Tues. 9-10am, Thurs. 11am-12pm
Course Prerequisites
Minimum: EE141, EE240
EE241 helps too, but not necessarily required
Lecture Notes
Based on slide from Prof. Borivoje Nikolic, Prof. Vladimir Stojanovic (MIT), Jared Zerbe (Rambus), and myself Primary source of material for the class
No required text
Some References
Digital Systems Engineering W.J. Dally, J.W. Poulton, Cambridge University Press, 1998.
Design of High-Performance Microprocessor Circuits Edited by A. Chandrakasan, W. J. Bowhill, F. Fox, IEEE Press, 2001
Chapter on high-speed signaling and I/O design
Design of Integrated Circuits for Optical Communications B. Razavi, McGraw-Hill, 2002 Papers from:
IEEE Journal of Solid-State Circuits IEEE International Solid-State Circuits Conference IEEE Symposium on VLSI Circuits IEEE Custom Integrated Circuits Conference
Lecture 1 6
EE290C
Grading
Grading:
HW: 30% Will have 3-4 assignments Essential for learning the class material Project: 60% Will design a complete high-speed (>10Gb/s) interface Groups of 3-4
Will want wide range of skills - form your groups now
Presentations: 10% Will give two project-related presentations First at project half-way point Second at project end
No exams
But dont take course lightly will be a lot of work
EE290C Lecture 1 7
Homework
Homework:
Can discuss/work together But write-up must be individual Drop in box outside Elads office (519 Cory) Generally due 5pm on Thursdays
No late submissions
Start early!
EE290C
Lecture 1
Schedule Notes
ISSCC Week: 2/21 - 2/25 (no lectures) Spring break: 3/21 3/25 Project:
Will be broken into 3-4 parts Check on the website for updates First presentations: ~1st week of April Final presentations: RRR week
EE290C
Lecture 1
PC or Console
EE290C Lecture 1 11
PC or Console
EE290C Lecture 1 12
MEM MEM
MEM MEM
MEM MEM
MEM MEM
SerDes SerDes
Crossbar Crossbar
Optics Optics
SerDes
MAC MAC
NPU NPU
SerDes SerDes
EE290C
Lecture 1
13
MEM MEM
MEM MEM
MEM MEM
MEM MEM
SerDes SerDes
Crossbar Crossbar
Optics Optics
SerDes
MAC MAC
NPU NPU
SerDes SerDes
Board-to-board signaling:
Computers, peripherals: PCI (66-133-400MHz), PCI Express (2.5Gb/s 10Gb/s) USB (10Mb/s 10Gb/s)
In principle, nothing
As long as the wire is short enough And get the right clock at both TX and RX
EE290C
Lecture 1
17
Backplane
Linecard
Serdes
0.0 1.0
0.2
0.4
0.6
0.8
1.0
[GHz]
Signal at Tx
Signal at Rx
Backplane
Linecard
Serdes
0.0 1.00
1.0
2.0
3.0
4.0
5.0
[GHz]
0.10
Signal at Tx
0.01
Signal at Rx
0.00
Channel now degrades the signal significantly Improvements in channel tend to be costly
Short-distance optics vs. electrical debate ~15 years old Electronics usually bear the burden
EE290C Lecture 1 19
Need to achieve all of this within tightly limited power, area budgets
With lots of noisy digital blocks nearby And with transistor scaling running out of steam
EE290C Lecture 1 20
Good News
Many opportunities for multi-disciplinary innovation
Circuits, communications, optimization, E&M,
Will learn how to build (one of) most efficient comm. systems in existence
Best designs use only ~0.5-2mW per Gb/s of throughput
Syllabus
Link Environment
Channels: physical components, models Link performance evaluation
Signaling
Transmitters, receivers Equalizer types, circuits Adaptation algorithms and implementations
Timing
Clocking and link types Clock and data recovery (CDR) PLLs, DLLs, and phase interpolators
Support functions
Supply regulation Mixed-signal design verification