Novel Fingerprint Scanning Arrays Using Polysilicon TFT's On Glass and Polymer Substrates

IEEE ELECTRON DEVICE LETTERS, VOL. 18, NO.
1, JANUARY 1997
19
Novel Fingerprint Scanning Arrays Using Polysilicon TFTs on Glass and Polymer Substrates
N. D. Young, G. Harkin, R. M. Bunn, D. J. McCulloch, R. W. Wilks, and A. G. Knapp
Abstract Novel ngerprint scanning arrays based upon capacitance sensing have been made. Each sensor element consists of a capacitor electrode and two poly-Si thin lm transistors for addressing and read out. The devices were fabricated on glass, polyimide and polyethersulphone substrates using a low temperature (<250 C) process.
I. INTRODUCTION HERE IS considerable interest in poly-Si TFTs on glass substrates for active matrix liquid crystal displays (AMLCDs). The poly-Si devices have good enough characteristics to allow row and column driving circuits to be integrated onto the glass panel [1], [2], and it is expected that the integration of entire systems onto the panel might be achieved ultimately. In addition to displays, other system elements such as EEPROM memories have also been developed [3]. Furthermore, as process temperatures continue to fall, these systems might be manufactured on lightweight, robust, polymer substrates. In the present work, we take further steps toward these goals by demonstrating novel ngerprint scanning arrays on glass and polymer substrates. Such low cost devices may be useful for a wide range of applications including banking, access control, smart cards, and personalization. II. POLY-SI TFTS The device structure is shown in Fig. 1. The devices were fabricated on 1.1 mm thick glass substrates, 0.125-mm thick polyimide (PI) substrates, and 0.10.5-mm thick polyethersulphone (PES) substrates. Firstly, the polymer substrates were preshrunk at the temperature of thin-lm-deposition in order to achieve dimensional stability to better than 3 m across the plate (85 mm) (i.e., less than 3 m of further movement expected during the subsequent thermal processing steps). Next, stacks of silicon nitride, silicon dioxide and amorphous silicon were deposited in a multi-chamber PECVD reactor. The depositions were at 250 C on glass and polyimide, and at 200 C on polyethersulphone. The TFT source and drain regions were implanted through a resist mask, and the lm was crystallized with an excimer laser [4], [5]. Such processing of thin Si lms with excimer lasers to produce poly-Si has been reported previously [6], [7]. Following this, the poly-Si was patterned, and 0.15 m of PECVD oxide was deposited. Then, contact windows were opened, and chromium
Manuscript received June 27, 1996; revised September 3, 1996. The authors are with Philips Research Laboratories, Redhill, Surrey RH1 5HA, U.K. Publisher Item Identier S 0741-3106(97)00616-2.
Fig. 1. Cross-section showing the poly-Si TFT device structure, capacitor electrode, and row and column conductors of the ngerprint scanning array.
or aluminum was deposited and patterned to form the gate lines (rows). Next, the 0.1 m silicon nitride capacitor dielectric was deposited by PECVD, and contact windows through this were opened at the edges of the plate. Finally, the devices were annealed in mixed gas to passivate defects; the glass substrates were annealed at 300 C for 1 h, the polyimide substrates at 250 C for 16 h, and the polyethersulphone substrates at 200 C for 20 h. Typical device transfer characteristics obtained on glass and polyethersulphone are shown in Fig. 2. Those obtained on polyimide typically lie between those on glass and polyethersulphone. III. SCANNER The ngerprint scanner works on the principle of capacitance sensing. A block of four elements of a 2-D scanning array is shown in Fig. 3(a). Each element consists of a capacitor electrode covered with 0.1 m of silicon nitride insulator, connected to two poly-Si TFTs. When the ridge of a ngerprint lies directly over the electrode a capacitor is formed between the electrode and the nger, and this is charged through transistor A when a row pulse is applied. The stored charge is then transferred onto a column electrode through transistor B when the following row is pulsed. The charge on the column is then integrated by external circuitry. If a trough in the ngerprint lies over the electrode, then the capacitance is very much smaller, and a negligible charge results.
07413106/97$10.00 1997 IEEE
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IEEE ELECTRON DEVICE LETTERS, VOL. 18, NO. 1, JANUARY 1997
Fig. 2. Typical transfer characteristics of poly-Si TFTs formed on glass and polyethersulphone (PES) substrates. (a)
The present scanners consist of an array of 200 200 elements at a pitch of 100 m, and the row driving and charge integration are performed by external silicon chips. The row pulses are 810 V in magnitude, and 10100 s in duration. A typical image from a scanner on glass is shown in Fig. 3(b). Scanners on polymer similarly produce images, though defect densities (i.e., line discontinuities, and row to column shorts) are currently high, and this requires further investigation. Fast frame rates ( 500 s ) are possible due to the charging then immediate discharging of each pixel. However, this is limited in practice to 100 s by external mono-Si charge integrators. Designs with a 50- m pitch and integrated poly-Si row and column circuitry are currently being studied. These will operate at a lower frame rate of 15 s . IV. CONCLUSIONS A novel ngerprint scanner working on the principle of capacitance sensing has been presented. This has been formed on glass and polymer substrates using a low temperature polySi TFT process. This involves the deposition of insulators and amorphous silicon by PECVD, and the subsequent crystallization of the amorphous silicon by excimer laser annealing. This compact, low cost scanner might be incorporated into portable products, or even smart cards. Alternatively, these scanners could be made on less robust, higher cost Mono-Si substrates, but with an integrated chip for ngerprint recognition. ACKNOWLEDGMENT The authors are grateful to I. D. French and J. Hewett for PECVD lms, and N. C. Bird for supplying the external drive system. REFERENCES
[1] J.-I. Ohwada, M. Takabatake, Y. A. Ono, A. Mimura, K. Ono, and N. Konishi, Peripheral circuit integrated poly-Si TFT LCD with gray scale [5]
(b) Fig. 3. (a) The capacitance sensing elements of the scanner and (b) a typical image of a ngerprint obtained by a scanner.
[2]
[3]
[4]
[6]
[7]
representation, IEEE Trans. Electron Devices, vol. 36, no. 9, p. 1923, 1989. M. J. Edwards, S. D. Brotherton, J. R. Ayres, D. J. McCulloch, and J. P. Gowers, Laser crystallised poly-Si circuits for AMLCDs, in Asia Display 1995Proc. 15th Int. Display Research Conf., SID, Santa Ana, CA, 1995, pp. 335338. N. D. Young, G. Harkin, R. M. Bunn, D. J. McCulloch, and I. D. French, The fabrication of EEPROM arrays on glass using a low temperature poly-Si TFT process accepted for publication, IEEE Trans. Electron Devices, vol. 43, Nov. 1996. S. D. Brotherton, J. R. Ayres, D. J. McCulloch, and N. D. Young, Fabrication and characterization of poly-Si TFTs on glass, Physical and Technical Problems of SOI Structures and Devices, J. P. Collinge, Ed. Amsterdam, The Netherlands: Kluwer, 1995, pp. 183198. S. D. Brotherton, D. J. McCulloch, and M. J. Edwards, Beam shape effects with excimer laser crystallization of PECVD and LPCVD amorphous silicon, Solid State Phenomena, vols. 37/38, p. 299, 1994. K. Sera, F. Okumura, H. Uchida, S. Itoh, S. Kaneko, and K. Hotta, High performance TFTs fabricated by XeCl excimer laser annealing of a Si : H lm, IEEE Trans. Electron Devices, vol. 36, p. 2868, 1989. T. Sameshima, M. Hara, and S. Usui, XeCl excimer laser annealing used to fabricate poly-Si TFTs, Jpn. J. Appl. Phys., vol. 28, p. 1789, 1989.

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IEEE ELECTRON DEVICE LETTERS, VOL. 18, NO.

07413106/97$10.00 1997 IEEE

IEEE ELECTRON DEVICE LETTERS, VOL. 18, NO. 1, JANUARY 1997

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