EC 2155 - Circuits and Devices Lab Manual Cum Observation

SRR Engineering College Circuit Diagram:
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ECE Department
Figure -1
EC2155/ Circuits and Devices Lab Manual cum Observation
SRR Engineering College Expt.No:
Page 2 of 108 Verification of Kirchoffs Laws
ECE Department Date
Aim To verify (i) Kirchhoffs current law (KCL) (ii) Kirchhoffs voltage law (KCL),both analytically and experimentally. Apparatus Required: Sl. No. 1 2 3 4 5 6 Equipments & Components RPS Ammeter Voltmeter Resistor Bread Board Connecting wires (0-30) V (0-10) mA, (0-5) mA, (0-20) V, (0-10) V, (0-5) V 1K , 2.2K ,10K ,4.7K ,2K -----------------------Range / specification 2 3,3 each 1,2,2 respectively One each 1 As required Quantity
Theory: Kirchhoffs current law (KCL): KCL states that the algebraic sum of all the currents at any node in a circuit equals zero. i.e., Sum of all currents entering a node = Sum of all currents leaving a node In case of AC circuits, Phasor sum of incoming currents = Phasor sum of outgoing currents.at any node. Explanation
Figure -2 Let the currents I1, I2 , I3 , I4 flow through the junction oin figure-2. Taking flowing away from junction as negative. Applying KCL at node 0.we get I1-I2-I3+I4=0
conductors
meeting
at
the
currents flowing towards junction as positive & that
SRR Engineering College
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ECE Department
Figure -3
SRR Engineering College Kirchhoffs voltage law (KVL):
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ECE Department
KVL states that the algebraic sum of all the voltages around any closed loop in a circuit equals zero. i.e., Sum of voltage drops = Sum of voltage rises In a closed circuit emf + IR =0. To Determine the sign of EMF Source
To determine the sign of voltage across the Resistor. If the loop direction & the current direction are the same then the voltage across the impedance (i.e.,) the voltage drop is taken as negative. If the loop direction & the current direction are opposite to each other then the voltage across the impedance (i.e.,) the voltage drop is taken as positive.
Theoretical Calculation: Refer figure-3 .By applying loop current method ,we get the following Matrix
Ix, Iy, Iz are the currents of the loops1,2 and 3 respectively as shown in the figure. I1, I2, I3 are the branch currents given in circuit I1=IX - IY I2=Iy I3=Iz The other branch currents are I, I4 and I5 as marked in figure.
SRR Engineering College = || = (6.9 | [
Page 5 of 108 ] | + (4.7 + ( 2.2 ) | |
ECE Department
| |
= (6.9 = (831.036
[120.44 394.988 )
+ (4.7
[ 84.04 184.228 )
] + ( 2.2
) 83.74
|| = (251.82 x= [ |x| = (10) |
] -
+ 4.7 + 930.6 ) y =[ [198 +330
|
+ ( 2.2
(4.7 )|
| | [-150 ]
=10 120.44 =1204.4 |x| = (2465
] -2.2
|y| =
|
+ [ )+(840.04
|
[
- (10 | | (72.6 ) | [
|y|= |y| =(1366.2 |y| =2134.4 z |z| =

=
[
| |-(
]
)| +10| | | ]+10[83.74 ]
|z| [150 ]+4.7 [33 |z| = 1035 + 133.1 + 837.44 |z| = 2027.5 IX=|x| / | | = (2465 ) / (251.82 Iy=|y| /| | = (2134 ) / (251.82 Iz=|z| /| | = (2027.5 ) / (251.82 I1= IX - Iy = ( I2= Iy= A= 8.474 mA I3= Iz= A= 8.051mA
) = A=9.78 mA ) = A=8.474 mA ) = A=8.051 mA -3 ) =1.31 x10 A =1.31mA
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ECE Department
I4=Ix-Iz= ( )= 1.73x10-3A = 1.73 mA I5=Iy-Iz= ( ) = 0.423x10-3A= 0.423 mA For kirchoffs voltage laws, the voltage across each branch is v1 (voltage across resistor 2.2 kohm) = I4 x 2.2 x103= (1.73 x10-3A)( 2.2 x103) = 3.8 V v2 (voltage across resistor 10kohm)= I5 x 10 x103= (0.423x10-3A)( 10 x103) = 4.23 V v3 (voltage across resistor 4.7kohm)= I1 x 4.7 x103= (1.31x103 )( 4.7 x103) = 6.157 V v4 (voltage across resistor 1kohm)= I3 x 1 x103= ( v5 (voltage across resistor 2.2kohm)= I2 x 2 x103= ( A)( 1 x103) = 8.051 V A)( 2 x103) = 16.948 V
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ECE Department
Figure -4
Figure -5 Tabulation branch current: I (in mA) Theoretical value Practical value 9.781 I1 (in mA) 1.31 I2 (in mA) 8.474 I3 (in mA) 8.051 I4 (in mA) 1.73 I5 (in mA) 0.423
SRR Engineering College Procerure: Kirchhoffs current law (KCL):
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ECE Department
(1) Connect the components as shown in the figure -5. (2) Switch on the DC power supply and note down the corresponding ammeter readings. (3) Repeat the step 2 for different values in the voltage source. (4) Finally verify KCL.
Kirchhoffs voltage law (KVL): (1) Connect the components as shown in the figure-6. (2) Switch on the DC power supply and note down the corresponding voltmeter readings. (3) Repeat the step 2 for different values in the voltage source. (4) Finally verify KVL.
SRR Engineering College Tabulation for node current in KCL:
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ECE Department
S.No 1
Name of the node Node P I=I3+I4
Theoretical value 9.781mA= (8.051+1.73 )mA
Practical value
Node Q I4=I5+I1
1.73mA= (0.423+ 1.31)mA
Node R I2=I3+I5
8.474mA= (8.051+0.423)mA
Figure -6 Tabulation for branch voltage: V1 (in volt) Theoretical value Practical value 3.8 V2 (in volt) 4.23 V3 (in volt) 6.157 V4 (in volt) 8.051 V5 (in volt) 16.948
SRR Engineering College Tabulation for loop voltage:
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ECE Department
S.No 1
Name of the loop Loop 1
Theoretical value 10v = (3.8 +6.157)v
Practical value
E1=V1+V3 Loop 2 2 E2+V3-V2-V5=0 Loop 3 3 V4=V1+V2 8.051v = (3.8+4.23)v 15+6.157-4.23-16.948)v = 0
Results: Thus (i) Kirchhoffs Current Law & (ii) Kirchhoffs Voltage Law are verified. S.No 1 Name of the Current I1 Theoretical value Practical value
I2
I3
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ECE Department
Figure -1 Thevenins equivalent circuit:
Figure -2
SRR Engineering College Expt.No.:
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ECE Department Date:
Verification of Thevenins Theorem & Nortons Theorem a) Verification of Thevenins Theorem Aim: To verify Thevenins theorem both analytically and experimentally. Apparatus Required: Sl. No. 1 2 3 Equipments & Components RPS Ammeter Voltmeter Range / specification (0-30) V (0-10) mA, (0-30) mA (0-20) V 1K , 2.2K ,10K ,4.7K 4 5 6 Resistor Bread Board Connecting wires ,2K ----------------------------Each one 1 As required Quantity 2 Each one 1
Theory: Theorem Statement: Thevenins theorem states that any two terminal linear network having a number of voltage, current sources and resistances can be replaced by a simple equivalent circuit consisting of a single voltage source in series with a resistance, where the value of the voltage source is equal to the open circuit voltage across the two terminals of the network, and resistance is equal to the equivalent resistance measured between the terminals with all the energy sources replaced by their internal resistances. Original Network:
Figure -3
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ECE Department
Theoretical Calculation for Thevenins Theorem: To calculate the Thevenins load current:
Figure -4 The current I1, I2 and I3 are the three loop currents in figure-4 . The load current IL is same as the current in loop-3. i.e IL =I3 Refer figure-4 .By applying loop current method ,we get the following Matrix
[ ]
|| =[
]
=4.3K|
|-
(-3.3K)
| |
+ =4.3 =(4.3 =56.244 |3| = [17.92-4.84] 13.08 - 34.848 +3.3 )- (3.3 = 21.396
|
[-10.56-0] [-10.56] +0
]
SRR Engineering College =(4.3 |
Page 14 of 108 |-(-3.3 +20| )|
ECE Department
| |
=4.3 =(4.3 =219.3 =201.15
[84 51 -163.35
-33 +(3.3
]+3.3 49.5
(-49.5
-0)+20(7.26 +(20 7.26 )
-0)
+145.2
I3= (|3| / || )= ((201.15
) / ( 21.396
)) = 9.4
= 9.4 mA
To calculate the Thevenins voltage Vth::
Figure -5 By loop analysis (matrix method) calculate the two currents from loop-1 and loop-2 as I1 and I2 respectively. Refer figure-5 .By applying loop current method, we get the following Matrix
|
||= | |1|= | |2| = | I2=( |2| / |1|) = (1.5
| [ ]= [ |=24.08 |=112 |
-49.5
]
- 10.89 =13.19
=62.5
= -64.5 )=
+66
=1.5 =11.4mA
/ 13.19
Vth= (15+ I2 x 2.2 ) EC2155/ Circuits and Devices Lab Manual cum Observation
SRR Engineering College = (15+ ( = (15+0.251) = 15.251 Volts )x(2.2 )
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ECE Department
To calculate the Thevenins resistance Rth:
Figure -6 Rx is the parallel combination of 1k and 3.3k resistors.
Figure -7 Rx=( )/(3.3 +1 ) =767 Ry is the serise combination of Rx and 100 resistors.
Figure -8 Ry= (767+100) = 867 Rth is the parallel combination of Ry and 2.2k resistors. Rth=(867 // 2.2x103)=((867 x2.2x103) / (867 +2.2x103)) = 1907400 / 3067 = 621.91
SRR Engineering College To calculate the IL:
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ECE Department
Figure -9 IL= Vth / (Rth+RL)=15.251 / (621.91+1000)=15.251 / 1621.91 = Voltage across load is VL VL =IL x 1x103= To calculate the Ise: x 1x103= 9.403 volts A=9.403 mA
Figure -10 Ise= Vth / Rth =( 15.251v / 621.91 ) =0.0245 Amp =24.5 mA
SRR Engineering College To measure the Load current IL :
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ECE Department
Figure -11 To measure the VL :
Figure -12 To measure the Vth :
Figure -13 EC2155/ Circuits and Devices Lab Manual cum Observation
SRR Engineering College Procedure:
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ECE Department
General Circuit find load current (IL) and laod Voltage: (VL) (1) Connect the components as shown in the circuit diagram. (2) Measure the voltage across the load using a voltmeter or multimeter after switching on the power supply. Let it be VL. (3) Measure the current across the load IL by connecting the components as shown in the circuit diagram. To find Thevenins Voltage: (VTH) (1) Connect the components as shown in the circuit diagram. (2) Remove the load resistance and measure the open circuited voltage VTH across the output terminal. To find Thevenins Resistance: (RTH) (1) Connect the components as shown in the circuit diagram. (2) Remove the voltage source and replace it with an internal resistance as shown. (3) Using multimeter in resistance mode, measure the resistance across the output terminal. Thevenins Equivalent Circuit: (1) Connect the power supply of VTH and resistance of RTH in series as shown in the circuit diagram. (2) Connect the load resistance RL and measure VL across the load resistance using a voltmeter after switch on the power supply. (3) Connect the power supply of VTH and resistance of RTH in series with load resistor as shown in the circuit diagram and measure the load current IL.
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To measure the Thevenins resistance Rth:
Figure -14 To measure the load current IL:
Figure -15 To measure the VL :
Figure -16
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Tabulation 1: E1 (volts) Theoretical value Practical value 20 E2 (volts) 15 VL (volts) 9.403 VTH (volts) 15.251 RTH (ohms) 621.91 VL (volts) 9.403
Tabulation 2:
E1 (volts) Theoretical value Practical value 20
E2 (volts) 15
IL (mA) 9.403
IL (mA) 9.403
Result: Thus the Thevenins Theorem is verified theoretically and practically.
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ECE Department
Figure -1
Nortons equivalent circuit:
Figure -2
SRR Engineering College Expt. No:
Page 22 of 108
ECE Department Date
(b) Verification of Nortons Theorem Aim: To verify Nortons Theorem both analytically and experimentally. Apparatus Required:
Sl No 1 2 3 4 5 6
Equipments & Components RPS Ammeter Voltmeter Resistor Bread Board Connecting wires
Range / specification (0-30) V (0-10) mA, (0-30) mA (0-20) V 1K , 2.2K ,10K ,4.7K , 2K -----------------------------------
Quantity 2 Each one 1 Each one 1 As required
Theory: Theorem Statement Nortons theorem states that any two terminal linear network having a number of voltage, current sources and resistances can be replaced by an equivalent circuit consisting of a single current source in parallel with a resistance. The value of the current source is the short circuit current between the two terminals of the network, and resistance is the equivalent resistance measured between the terminals of the network with all the energy sources replaced by their internal resistances.
Original Network:
Figure -3
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ECE Department
Theoretical Calculation for Nortons Theorem: To calculate the Ise:
Figure -4 By loop analysis (matrix method) calculate the three currents from loop-1 and loop-2 and loop -3 as I1, I2 and I3 respectively. [ ] [ ] [ ]
|| =[ =(4.3 |
] | -(-3.3 )| |
+0x| =(4.3 =((4.3 || =(32.164 [12.32-4.84] )(7.48 - 23.958 + 3.3 ) (3.3 = 8.206 [-7.26-0] 7.26 )) + 0)
|)
|3| =[ =4.3 | | - (-3.3 +20| =4.3 [84 -33 ] + 3.3
] )| | (-49.5 - 0) + 20(7.26 -0) |
SRR Engineering College =(4.3 =(219.3 =201.15 Ise=I3= |3| /|| = (201.15 51 - 163.35 ) + ( 3.3
Page 24 of 108 49.5 )
ECE Department ) + (20 x 7.26 )
+ 145.2
/ 8.206
) = 0.0245 A=24.5mA
To calculate the Thevenins resistance Rth:
Figure -5 Rx is the parallel combination of 1k and 3.3k resistors.
Figure -6 Rx=( )/(3.3 +1 ) =767 Ry is the serise combination of Rx and 100 resistors.
Figure -7 Ry= (767+100) = 867 Rth is the parallel combination of Ry and 2.2k resistors. Rth=(867//2.2x103)=((867 x2.2x103) / (867 +2.2x103)) = 1907400 / 3067 = 621.91 EC2155/ Circuits and Devices Lab Manual cum Observation
SRR Engineering College To calculate the IL:
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ECE Department
Figure -8 After calculating Ise & Rth, IL can be calculated by applying current division technique. IL=Ise x (Rth / (Rth+RL) ) = 0.0245 x (621.91 / (621.91+1000)) =9.394x10-3A =9.394 mA= 9.4 mA
Figure -9 IL can also be calculated from the above circuit i.e.figure-9 by converting the current source in parallel with resistance Rth as equivalent voltage source in series with Rth. Veq= Ise x Rth =0.0245 x 621.91= 15.236 volts IL= Veq / (Rth+RL) =15.236/(621.91+1000)=9.394 x10 -3A=9.394 mA= 9.4 mA
SRR Engineering College Procedure :
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ECE Department
General Circuit find load current: (IL) (1) Connect the components as shown in the circuit diagram. (2) Measure the current through the load using an ammeter or multimeter after switch on the power supply. Let it be IL. To find Nortons Current: (Ise) (1) Connect the components as shown in the circuit diagram. (2) Remove the load resistance and short circuit the output terminal. Then measure the current through the short circuited terminals. To find Nortons Resistance: (Rth) (1) Connect the components as shown in the circuit diagram. (2) Remove the voltage source and replace it with an internal resistance as shown. (3) Using multimeter in resistance mode, measure the resistance across the output terminal. Nortons equivalent Circuit: (1) Draw the short circuit current source Ise in parallel with Rth as shown in the circuit diagram. (2) Draw the equivalent circuit by replacing the current source Ise in parallel with Rth by a voltage source such that Veq = (Ise x Rth )volts. (3) Then connect the circuit as shown in figure 9 and measure the load current IL through the load resistor RL. This must be equal to IL.
SRR Engineering College To measure the load current IL:
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ECE Department
Figure -9 To measure the short circuit load current Ise:
Figure -10 To measure the Rth:
Figure -11
SRR Engineering College To measure the load current IL:
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ECE Department
Figure -12
Figure -13
Tabulation: E1 (volts) Theoretical value Practical value 20 E2 (volts) 15 IL (mA) 9.4 Ise (mA) 9.4 Rth () 621.91 Veq = Ise . Rth (volts) 15.236 IL (mA) 9.4
Result: Thus Nortons Theorem is verified theoretically and practically. EC2155/ Circuits and Devices Lab Manual cum Observation
SRR Engineering College Circuit diagram:
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ECE Department
SRR Engineering College Expt. No.:
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Verification of Super Position Theorem Aim: To verify superposition theorem practically & theoretically for the given DC circuit. Apparatus Required: S.No. Components Range Quantity
1. 2. 3. 4. 5. 6. Theory:
Regulated Power supply(RPS) Ammeter Multimeter Resistors Bread board Connecting wires
(0-30)V (0-30)mA --560 ---
2 1 1 3 1 Few
Superposition Theorem: In a network of linear resistances, containing more than one source, the resultant current flowing at any one point is the algebraic sum of currents that would flow at that point, if each source is considered separately, and all the other sources are replaced by their equivalent internal resistance . This last step is carried out by short circuiting all sources of constant voltage & opencircuiting all sources of constant current. Procedure: 1. Make connections as per the (fig b) circuit diagram. 2. Vary the RPS2 and set an input voltage of 10 V . 3. Note down the ammeter reading IL1 in tabular column 1. 4. Make connections as per the (fig c) circuit diagram. 5. Vary the RPS1 and set an input voltage of 10 V. 6. Note down the ammeter reading IL2 in tabular column 2. 7. Make connections as per the (fig a) circuit diagram. 8. Find the total load current IL=IL1+IL2 9. Verify the same using theoretical calculation EC2155/ Circuits and Devices Lab Manual cum Observation
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ECE Department
Theoretical Calculation for Super position theorem: Circuit diagram:
Step 1: Short circuit V2. Apply V1=20V
10
+ RPS (0-30V) V1 I1
15 I2
25
+15
I1 =
20
-15
20
I2
I1 =1.45 A; I2 =1.09 A; IT1 =0.36 A
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ECE Department
Step 2: Short circuit V1. Apply V2=15V
I1
I2
25
+15
I1 = I2 ; I2 =-1.363 A
-15
+20
-15
I1 =-0.81 A
; IT2 =0.54 A
Step 3: V1 & V2 are active. Apply V1=20V & V2=15V
I1
I2
25
+15
I1 = I2
20
-15
+25
-15
I1 = 0.63 A;
I2 = -0.27 A ;
IT = 0.909 A
Thus IT = IT1 + IT2 . Super Position Theorem is proved.
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ECE Department
Circuit Diagram for Super Position Theorem Practical Analysis: Step 1: Both voltage sources are active. 10 5 I L = .
RPS1 + (10V) A
15 + (0-10mA) MC -
+ -
RPS2 (10V)
Fig (a) Step 2: RPS2 alone is active. 10 5 IL2=
15 + A (0-10mA) MC -
+ RPS2 (10V)
Fig (b) Step 3: RPS1 alone is active. 10 5 IL1=
RPS1 (10V)
15 + A Fig (c) (0-10mA)
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Tabular Column 1: To measure IT1 & IL1 (For fig.b)
Theoretical Voltage (volts) Current IT2(A)
Practical Current IL2 (A)
Tabular Column 2 To measure IT2 & IL2 (for fig.c) Theoretical Current IT1(A) Practical Current IL1 (A)
Voltage (volts)
Tabular column 3 To measure IT & IL (For fig. a) RPS1 Voltage (V) RPS2 Voltage (V) Theoretical Current IT (A) Practical Current IL (A)
IL = IL1+IL2 (A)
IT= IT1+IT2 (A)
Result: Thus superposition theorem is verified practically &theoretically.
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ECE Department
Circuit Diagram Maximum Power Transfer Theorem: 1K
RPS (0-30V)
1K
DRB (RL )
Circuit to find VL: 1K
RPS (0-30V) VS
+ 1K DRB RL V
+ (0-30V)MC -
Model Graph:
Pmax
Power ,P (mW)
RL= RTH Load resistance, RL in
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Verification of Maximum power Transfer Theorem and Reciprocity Theorem (a).Verification of Maximum Power Transfer Theorem Aim: To measure the power absorbed in a load and to verify that the power absorbed in a load is maximum only when load resistance is equal to the source resistance. Apparatus Required: SL. No 1 2 3 4 Name of the apparatus Voltmeter Resistance DRB RPS(D.C Supply) Range/Rating (0-30V) MC 1k (0-30V) Quantity 1 2 1 1
Theory: The maximum power transfer theorem states that A load will receive maximum power from a linear bilateral DC network when its total resistive value is exactly equal to the Thevenin resistance of the network as seen by load. In a simpler form the circuit may contain a voltage source VS having internal resistance RS and connected across a load RL. The maximum power transfer theorem tells us that the load should be equal in magnitude to the source resistance for maximum power to be absorbed by the load. Procedure: 1. Make connection as per the circuit diagram. 2. Select atleast five resistances (RL), two of them having values internal resistance, two having values higher internal resistance and one having value equal to internal resistance. 3. Change the value of RL one by one and measure the corresponding VL. Calculate the power PL by the formula PL = VL2/ R ;and enter into the table (2). 4. Plot a graph between RL and PL and find the RL corresponding to maximum power transfer. 5. Verify the measured values of RL at maximum power transfer to be as same as calculated and also verify graphically.
SRR Engineering College Tabular Column: Sl. No. 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 Load Resistance, RL (K)
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Output Voltage, V0 (volts)
Power, P (mW)
SRR Engineering College Model Calculation: Circuit Diagram: 1k
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ECE Department
Vs = 15V
1k
DRB RL
Step 1: To find VTH Open the circuit the load terminal RL. R1=1k
Vs= 15V R2=1k
VTH
By voltage divider rule: REQ = 0.5 & VTH= VSR1 / (R1+R2) = 15V Step 2: To find RTH: Open circuit the load terminal RL. Open circuit the current source and short circuit the voltage source.
R1=1k
R2=1k RTH
RTH = R1 R2 / (R1 + R2 ) = 0.5
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ECE Department
Step 3: Thevenins equivalent circuit for maximum power delivered. RTH=0.5
I Vs= 15V RL = RTH
I = VTH / (R+REQ) = 15 / (0.5 + 0.5) = 15 A Max power delivered at RL = I2RL = 112.5 W
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ECE Department
Result:
Thus maximum power transfer theorem is verified practically and theoretically.
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Reciprocity Theorem Practical Analysis Circuit Diagram: 12 1 RPS (0-30V) VS=30V + 6 2 Step 1: To measure the current at branch 3-4. 12 1 2 3 4 6 + I1 2 Step 2: To measure the current at branch 1-2. 12 1 2 3 4 (0-10mA) MC 4 2 3 4
+ RPS (0-30V) VS=30V
+ (0-10mA) MC I2 6
4 + RPS (0-30V) VS=30V 2 4
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(b) Verification of Reciprocity Theorem Aim: To verify the reciprocity theorem for the given circuit, practically and theoretically. Apparatus Required: S.No 1. 2. 3. 4. Name of the apparatus Ammeter RPS (Power Supply) Resistor Connecting wires Range/Rating (0-10)mA (0-30)V 12, 2 ,4,6 Quantity 1 1 1 each few
Theory: Reciprocity Theorem states that in any passive linear bilateral network, if the single voltage source VS in branch x produces the current response IY in branch y, then the removal of the voltage source from branch x and its insertion in branch y will produce the current IY in branch x. In simple terms, interchange of an ideal voltage source and an ideal ammeter in any passive, linear, bilateral circuit will not change the ammeter reading. Note: The reciprocity theorem is thus applicable only to single source network. It is, therefore, not a theorem employed in the analysis of multi-source network. In other words, the location of the voltage source and the resulting current may be interchanged without a change in current. Procedure: 1. Make connection as per the circuit diagram. 2. Calculate the values of I1, by connecting the ammeter at branch 3-4 and tabulate. 3. Now connect the power supply at branch 3-4 and measure the current in the ammeter connected at branch 1-2.tabulate the value as I2. 4. Compare the theoretical value and tabulated value of current to be the same to verify the reciprocity theorem.
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ECE Department
Tabulation: Supply voltage,VS (volts) Current at branch 3-4,I1 (mA) Current at branch 1-2, I2 (mA)
Model Calculation: Step 1: To measure current I1 at branch 3-4 12 1 2 3
RPS (0-30V) VS =30 v
I2
I1 6
18 -6
I2 12 I1
30 = 0
I1 = 0.71 A Step 2: To measure current I2 at branch 1-2 12 1 2 3
4 6 RPS (0-30V) VS=30 v 2 EC2155/ Circuits and Devices Lab Manual cum Observation 4
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ECE Department
18 -6
6 12
I2 I1 =
0 -30
I2 = 0.71A I1 = I2 . Reciprocity Theorem is verified.
Result: Thus the reciprocity theorem is verified theoretically and practically.
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ECE Department
Parallel Resonance Circuit:
Series Resonance Circuit:
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Frequency Response of Series and Parallel Resonance Circuit Aim: To obtain the resonance frequency and bandwidth of series and parallel resonance circuits. Apparatus Required:
S.No 1 2 3 4 5 6 7 8
Name of the apparatus RPS Ammeter Function Generator Resistors Capacitor DIB Breadboard Connecting wires
Range Dual (0-30) V (0-30 ) mA (0-3)MHz
Quantity 1 1 1
1 0.1F 1 1 1 Few
Theory: At resonance XL = XC and impedance Z = R. Where R is the resistance of the coil. The R and XL of the coil determines the quality of the circuit which is given by Q = XL / RL Point f1and f2 are located at 70.7 percent of the maximum current for the series circuit. They are called as half power point and the frequency difference between f1 (lower cut off frequency) and f2 (upper cut off frequency) is called the band width.
SRR Engineering College Model Graph: Series Resonance: current Imax
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ECE Department
Imax / 2
frequency
Parallel Resonance: Current
Imin . 2 Imin
Frequency
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The formula for calculating the band width is given by BW = f2 f1 . Band width is related to the quality factor(Q). Its given by BW = fr / Q Resonance frequency of the series resonant circuit is calculated using the formula fr = 1 / 2 (LC). Procedure: 1. Connections are given as per the circuit diagram. 2. The resonance frequency is obtained by keeping the value of L,C,R constant 3. The resonance frequency is obtained using the formula fr = 1 / 2 (LC). 4. Varying the value of frequency and note down the corresponding current flow in the circuit. 5. Graph is plotted between frequency (x axis) and current (y axis). 6. Same procedure is to be followed for both series and parallel circuits.
SRR Engineering College Tabular Column: Series Resonance:
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Parallel Resonance:
Sl. No 01 02 03 04 05 06 07 08 09 10 11 12 13
Frequency (Hz)
Current (mA)
Sl. No 01 02 03 04 05 06 07 08 09 10 11 12 13
Frequency (Hz)
Current (mA)
SRR Engineering College Model Calculation: Parallel Resonance: R= 10, L=1 H C= 1F
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Admittance of the parallel resonance circuit is given by
Y G jB G j (C
1 ) L
( where G is conductance and B is susceptance)
At resonance B=0
1 =0 L
fr
1 2 LC
1 2 LC
fr
= 159Hz
1 = 100 r RC
Bandwidth =
r
Q
= 10rad/sec
f1
1 1 4 RC 2 1 1 4 RC 2
1 2 RC
1 = 79.6Hz LC 1 = 160.5Hz LC
f2
1 2 RC
Bandwidth = f 2 f1 =80.9 Hz
SRR Engineering College Series Resonance: R= 5, L=40 m H, C= 1F
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ECE Department
Impedance of the series resonance circuit is given by

Z R j( X L X c )
At resonance: X L X c
X L L : XC
1 C 1 (where = 2f) C
Therefore L =
fr
1 2 LC
Q factor =
1 L = 40 R C
R = 19.89Hz 2 L
Bandwidth =
fr
1 2 LC
= 796Hz
f1 f r
R = 786Hz 4 L R = 806 Hz 4 L
f2 fr
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RESULT: Thus the resonant frequency and band width of series and parallel resonance circuits was obtained and the graph is plotted.
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ECE Department
Circuit Diagram: PN-Junction Diode: Forward Bias:
Reverse Bias:
Symbol:
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Characteristics of PN-Junction Diode Aim: To plot the forward and reverse characteristics of a PN diode and to calculate cut-in voltage, forward resistance and reverse resistance. Apparatus Required: S. No 1. 2. 3. 4. 5. Item Diode Resistor Voltmeter Ammeter RPS 1N4007 1K (0-1V) (0-30mA), (0-500A) (0-30)V Range Qty 1 1 1 1 1
Theory: A diode is a PN junction formed by a layer of a P type and layer of N type semiconductors. Once formed the free electrons in the N region diffuse across the junction and combine with holes in P region and so a depletion Layer is developed. The depletion layer consists of ions, which acts like a barrier for diffuse of charged beyond a certain limit. The difference of potential across the depletion layer is called the barrier potential. At 2.5 degree the barrier potential approximately equal to 0.7v for Silicon diode and 0.3V for Germanium diode. When the junction is forward biased, the majority carrier acquired sufficient energy to overcome the barrier and the diode conducts. When the junction is Reverse Biased the depletion layer widens and the barrier potential increases. Hence the majority carrier cannot cross the junction and the diode does not conduct. But there will be a leakage current due to minority carrier.
SRR Engineering College Model Graph:
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ECE Department
PN Diode V-I Characteristics Curve Tabular Column: Forward Bias: S. No. 01 02 03 04 05 06 07 08 09 10 Forward Voltage (Vf) Forward Current (If)
SRR Engineering College Procedure: Forward Bias:
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1. The connections are made as per the circuit diagram. 2. The positive terminal of power supply is connected to anode of the diode and negative terminal to cathode of the diode. 3. Forward voltage Vf across the diode is increased in small steps and the forward current is noted. 4. The readings are tabulated and the graph is drawn for Vf versus If.
5.
The forward resistance is found from the graph using the formula rf = Vf/ If.
Reverse Bias: 1. The connection as made as per the circuit diagram. 2. For reverse bias the positive terminal of the power supply is connected to cathode and negative terminal to anode of the diode. 3. The power supply is switched ON, the reverse bias voltage Vf is increased in steps and reverse current Ir is noted in each steps. 4. The readings are tabulated and the graph is drawn for Vr Versus Ir . 5. The reverse characteristics are approximately a straight line, inverse of the slope give the reverse resistance.
6.
The reverse resistance is found from the graph using the formula rr = Vr/ Ir.
SRR Engineering College Reverse Bias:
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S. No. 01 02 03 04 05 06 07 08 09 10 11
Forward Voltage (Vr)
Forward Current (Ir)
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Result: Thus the characteristic of PN-Junction diode was drawn and the following parameters are calculated. Forward resistance Reverse resistance Cut-in Voltage : : : V
SRR Engineering College Circuit Diagram: Zener Diode: Forward Bias:
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ECE Department
Reverse Bias:
Symbol:
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ECE Department DATE:
Characteristics of Zener Diode Aim: To plot the VI Characteristics of a Zener diode and to determine the zener breakdown voltage and Zener break down current Apparatus Required:
S. No 1. 2. 3. 4. 5.
Item Zener Diode Resistor Voltmeter Ammeter RPS
Range Z 6.8 V 1K (0-10V), (0-1V) (0-50mA) (0-30)V
Qty 1 1 1 1 1
Theory: Zener doide is a special diode with increased amounts of doping. This is to compensate for the damage that occurs in the case of a PN junction diode when the reverse bias exceeds the breakdown voltage and thereby current increases at a rapid rate. Applying a positive potential to the anode and a negative potential to the cathode of the zener diode establishes a forward bias condition. The forward characteristic of the zener diode is same as that of a pn junction diode i.e. as the applied potential increases. The current increases exponentially. Applying a negative potential to the anode and positive potential to the cathode reverse biases the zener diode. As the reverse bias increases the current increases rapidly in a direction opposite to that of the positive voltage region. Thus under reverse bias condition breakdown occurs.
SRR Engineering College Modal Graph
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ECE Department
Zener Diode V-I Characteristics Curve Tabular Column: Forward Bias: S. No. 01 02 03 04 05 06 07 08 09 10 Forward Voltage (Vf) Forward Current (If)
SRR Engineering College Procedure: Forward Bias:
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1. The connections are made as per the circuit diagram. 2. The positive terminal of power supply is connected to anode of the diode and negative terminal to cathode of the diode. 3. Forward voltage Vf across the diode is increased in small steps and the forward current is noted. 4. The reading is tabulated. 5. A graphs is drawn between Vf and If. Reverse Bias: 1. The connection as made as per the circuit diagram for reverse bias 2. The positive terminal of the power supply is connected to cathode and negative terminal to anode of the diode. 3. The power supply is switched ON 4. The reverse bias voltage Vf is increased in steps and reverse current Ir is noted in each steps. 5. The readings are tabulated. 6. A graph is drawn Vr and Ir .The reverse characteristics is approximately as straight line, inverse of the slope give the reverse resistance
SRR Engineering College Reverse Bias:
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S. No. 01 02 03 04 05 06 07 08 09 10 11
Forward Voltage (Vr)
Forward Current (Ir)
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Result: Thus the characteristics of Zener diode were drawn and the following parameters are determined. Zener Breakdown Voltage: Zener Breakdown Current: V mA
SRR Engineering College Pin Diagram:
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ECE Department
Top view of BC 107 Circuit Diagram:
Model Characteristics Curve:
(a) Input Curve EC2155/ Circuits and Devices Lab Manual cum Observation
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ECE Department DATE:
Characteristics of Common Emitter Configuration Using BJT Aim: To determine the input and output characteristics of Common Emitter (CE) configuration and characteristic curves. Apparatus Required: Calculate the h-parameter values from the input and output
S. No. 1 RPS
Name
Range (0-30)V (010)mA (0 250) A (030)V (01)V BC 107 1k -
Qty 2 1 1 1 1 1 2 2 1 As1 per required numberReqd
Ammeter
3 4 5 5 6 6 7
Voltmeter Transistor Resistor Bread Board
ConnectingWires -
Theory:
nos.
Bipolar Junction transistor (BJT) was Developed by Dr.Shockley in bell laboratories in the year 1951. BJT is a three terminal two junction semiconductor device in which the conduction is due to both the charge carrier. Hence it is a bipolar device. In BJT the output current, output voltage, power are controlled by its input current ,so the device is called as current controlled device. Cut in voltage for Si transistor = 0.7v Cut in voltage for Ge transistor = 0.3v The application of a suitable DC voltage across transistor terminals is called biasing. There are three different ways of biasing a transistor, which are known as modes of transistor operati on.
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(b) Output Curve Tabular column: Input characteristics:
Sl. No
VCE = 1V VBE (volts) IB ( mA)
VCE = 2V VBE ( volts) IB ( mA)
01 02 03 04 05 06 07 08 09 10
SRR Engineering College Junction bias Condition: S.no 1 2 3 Region Active Saturation Cut off
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Emitter Base Junction Forward Bias Forward Bias Reverse Bias
Collector Base Junction Reverse Bias Forward Bias Reverse Bias
In CE configuration, the Emitter terminal is connected as common terminal between the input and output circuit. Procedure: Input Characteristics: These Curves give the relationship between the Base current (IB) and Base to Emitter voltage (VBE) for a Constant Collector to Emitter voltage (VCE). 1. Connections are made as per the circuit diagram. 2. Adjust the Collector to Emitter voltage (VCE) to 1 volt. Then increase Base to Emitter voltage (VBE) in small suitable steps and record the corresponding values of Base current (IB) at each step. 3. Plot a graph with Base to Emitter voltage (VBE) along X-axis and the Base current (IB) along y-axis. We shall obtain a curve marked VCE = 1V as shown in fig. 4. A Similar procedure may be used to obtain Characteristics at different values of Collector to Emitter voltage i.e., VCE = 2V,3V etc. Output characteristics:
These Curves give the relationship between the Collector current (IC) and Collector to Emitter voltage (VCE) for a Constant Base Current (IB). 1. Adjust the Base current (IB) to 20A value. Then increase the Collector to Emitter voltage (VCE) in number of steps and record the corresponding values of Collector current (IC) at each step. 2. Plot a graph with Collector to Emitter voltage (VCE) along X-axis and the Collector current (IC) along y-axis. We shall obtain a curve marked IB = 20A as shown in fig. 3. A Similar procedure may be used to obtain Characteristics at different values of Base current (IB) at 40A,60A etc. EC2155/ Circuits and Devices Lab Manual cum Observation
SRR Engineering College Output characteristics:
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IB = 20A Sl. No 01 02 03 04 05 06 07 08 09 10 11 VCE (volts) IC ( mA)
IB = 40A VCE (volts) IC ( mA)
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Graphical Determination of h-parameters for CE: 1. Input impedance hie = VBE / IB
( for a constant VCE )
2. Reverse Voltage gain hre = VBE / VCE ( for a constant IB ) 3. Forward Current gain hfe = IC / IB ( for a constant VCE )
4. Output Admittance hoe = IC / VCE ( for a constant IB )
RESULT: Thus t h e input and output characteristics of Common Emitter (CE) configuration was plotted and the following h-parameter values are determined from the input and output characteristic curves. Input impedance hie = Reverse Voltage gain hre = Forward Current gain hfe = Output Admittance hoe =
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ECE Department
Top view of BC 107 Circuit Diagram:
Model Characteristics Curve:
(a) Input Curve
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Characteristics of Common Base Configuration Using BJT Aim: To determine the input and output characteristics of Common Base (CB) configuration and Calculate the h-parameter values from the input and output characteristic curves. Apparatus Required:
S.No. 1 RPS
Name
Range (0-30)V (030)mA (0 10) mA (030)V (01)V BC 107 1k -
Qty 2 1 1 1 1 1 2 2 1 As1 per required numberReqd
Ammeter
3 4 5 5 6 6 7
Voltmeter Transistor Resistor Bread Board
ConnectingWires -
Theory:
nos.
Bipolar Junction transistor (BJT) was Developed by Dr.Shockley in bell laboratories in the year 1951. BJT is a three terminal two junction semiconductor device in which the conduction is due to both the charge carrier. Hence it is a bipolar device. In BJT the output current, output voltage, power are controlled by its input current ,so the device is called as current controlled device. Cut in voltage for Si transistor = 0.7v Cut in voltage for Ge transistor = 0.3v The application of a suitable DC vo ltage across transistor terminals is called biasing. There are three different ways of biasing a transistor, which are known as modes of transistor operation.
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(b) Output Curve Tabular column: Input characteristics:
Sl. No
VCB = 1V VBE ( volts) IE ( mA)
VCB = 5V VBE ( volts) IE ( mA)
01 02 03 04 05 06 07 08 09 10
SRR Engineering College Junction bias Condition: S.no 1 2 3 Region Active Saturation Cut off
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ECE Department
Emitter Base Junction Forward Bias Forward Bias Reverse Bias
Collector Base Junction Reverse Bias Forward Bias Reverse Bias
In CB configuration, the Base terminal is connected as common terminal between the input and output circuit. Procedure: Input Characteristics: These Curves give the relationship between the Emitter current (IE) and Base to Emitter voltage (VBE) for a Constant Collector to base voltage (VCB). 1. Connections are made as per the circuit diagram. 2. Adjust the Collector to Base voltage (VCB) to 1 volt. Then increase Base to Emitter voltage (VBE) in small suitable steps and record the corresponding values of Emitter current (IE) at each step. 3. Plot a graph with Base to Emitter voltage (VBE) along X-axis and the Emitter current in fig. 4. A Similar procedure may be used to obtain Characteristics at different values of Collector to base voltage i.e., VCB = 5V,10V etc. (IE) along y-axis. We shall obtain a curve marked VCB = 1V as shown
Output characteristics: These Curves give the relationship between the Collector current (IC) and Collector to base voltage (VCB) for a Constant Emitter Current (IE). 1. Adjust the Emitter current (IE) to 2 mA value. Then increase the Collector to base voltage (VCB) in number of steps and record the corresponding values of Collector current (IC) at each step. 2. Plot a graph with Collector to base voltage (VCB) shown in fig. 3. A Similar procedure may be used to obtain Characteristics at different values of Emitter current (IE) at 4mA,6mA etc. EC2155/ Circuits and Devices Lab Manual cum Observation along X-axis and the Collector current (IC) along y-axis. We shall obtain a curve marked IE = 2mA as
SRR Engineering College Output characteristics:
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ECE Department
Sl. No
IE = 2mA VCB ( volts) IC ( mA)
IE= 4mA VCB ( volts) IC ( mA)
01 02 03 04 05 06 07 08 09 10
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Graphical Determination of h-parameters for CB: 1. Input impedance hib = VBE / IE
( for a constant VCB ) ( for a constant VCB )
2. Reverse Voltage gain hrb = VBE / VCB ( for a constant IE ) 3. Forward Current gain hfb = IC / IE 4. Output Admittance hob = IC / VCB ( for a constant IE )
Result: Thus the input and output characteristics of Common Emitter (CB) configuration was plotted and the following h-parameter values are determined from the input and output characteristic curves. Input impedance hib = Reverse Voltage gain hrb = Forward Current gain hfb = Output Admittance hob =
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ECE Department
Top View Of 2N2646: Circuit Diagram:
Procedure: Model Graph:
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Characteristics Of UJT Aim: To Plot the characteristics of UJT & determine its intrinsic standoff ratio. Apparatus Required: S. No. 1. 2. 3. 4. 5. 6. 7. R.P.S Ammeter Voltmeter UJT Resistor Bread Board Connecting Wires Name Type & Range (0-30)V (0-30)mA (010)V 2N2646 1K Qty 2 1 2 1 2 1 few
Theory: UJT (Double base diode) consists of a bar of lightly doped n-type silicon with a small piece of heavily doped P type material joined to one side. It has got three terminals. They are Emitter (E), Base1 (B1), Base2 (B2).Since the silicon bar is lightly doped, and it has a high resistance & can be represented as two resistors, rB1& rB2. When VB1B2 = 0, a small increase in VE forward biases the emitter junction. The resultant plot of V E & IE is simply the characteristics of forward biased diode with resistance. Increasing V EB1 reduces the emitter junction reverse bias. When VEB1 = VrB1 there is no forward or reverse bias. & IE= 0. Increasing VEB1 beyond this point begins to forward bias the emitter junction. At the peak point, a small forward emitter current is flowing. This current is termed as peak current (IP). Until this point UJT is said to be operating in cutoff region. When I E increases beyond peak current the device enters the negative resistance region. In which the resistance rB1 falls rapidly & VE falls to the valley
voltage. Vv. At this point IE= Iv. A further increase of IE c a u s e s the device to enter the saturation region.
SRR Engineering College Tabular Column: VBB = 5V Sl No 01 02 03 04 05 06 07 08 09 10 11 12 VEB1(V)
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VBB = 10V VEB1(V) IE(mA)
IE(mA)
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Determination of Intrinsic Standoff Ratio: We know VP = .VBB + VD Where VP = Peak point voltage (To be determined from the graph for constant VBB ) VD= 0.7 V (Voltage across the diode) VBB = Inter base voltage = Intrinsic Standoff Ratio (Whose values lies between 0.5 to 0.8)
Result: Thus the characteristics of given UJT were drawn and its Intrinsic Standoff Ratio was founded. Intrinsic Standoff Ratio =
SRR Engineering College Pin diagram:
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ECE Department
Symbol:
Circuit Diagram of SCR:
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Characteristics Of Silicon Controlled Rectifier Aim: To draw the VI characteristics of the given SCR & to determine the gate current for different anode voltage Apparatus Required:
Sl. No 1. 2. 3. 4. 5. 6. 7. RPS Ammeter
Name
Type & Range (0-30) V (0-10mA), (0-100A) (0-30v) (0-10mA) (MC) C106 10K, 33K -
Quantity 2 1 1 1 1 1 1 set
Voltmeter SCR Bread board Resistors Connecting Wires
Theory: The SCR consists of four layers of semi conductor material alternatively P type and N type .It can be brought of as an ordinary rectifier with a control element .The control element is called Gate. The gate current determines the anode to cathode voltage at which the device starts to conduct. The term ON & OFF is used to represent the conduction and blocking mode of SCR respectively. Once switched ON the gate has no further control. To switch the SCR the anode current has to be reduced below a certain level called Holding Current. The SCR can also be triggered ON with the gate open circuited with the anode to cathode voltage made large enough .In conduction state the SCR behaves as an ordinary diode. The anode to cathode voltage at which the SCR conducts is called Break over Voltage or Forward Blocking Voltage. Forward Characteristics: When anode is positive w.r.t cathode, the curve between V-I is called forward characteristic. If the supply voltage is increased from zero, a point is reached when SCR EC2155/ Circuits and Devices Lab Manual cum Observation
SRR Engineering College Model Graph:
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ECE Department
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ECE Department
starts conducting. Under this condition, the voltage across SCR suddenly drops and most of the voltage appears across the load resistance RL. If proper gate current is made to flow, SCR can close at much smaller supply voltage. Reverse Characteristics: When the anode is made negative w.r.t to cathode, the curve between V& I is called reverse characteristics. If the reverse voltage is increased, avalanche breakdown occurs and the SCR starts conducting heavily in reverse direction. It is similar to the ordinary PN junction diode. Procedure: 1. The connections are made as per circuit diagram. 2. The switch is kept open. 3. The anode supply is switched ON and the forward voltage is set to some desired, value.(Eg 20 V ) 4. There is no indication of current in the ammeter and the SCR is in OFF state. 5. Now the Gate supply is switched ON and the SPST switch is closed. 6. The gate bias voltage is increased slowly. 7. At some value of gate current the SCR will be triggering ON and it is indicated by the ammeter in the anode circuit. 8. Also the voltage across the SCR will suddenly fall to around 0.7 V. This value of gate current required to trigger the SCR is noted. 9. Now with SCR in ON state the gate terminal is made open by opening the SPST Switch The anode current is slowly reduced by reducing the supply voltage. At some value of anode current the SCR is turned OFF. 10. This is indicated by a sudden rise in the voltmeter reading and the Ammeter reading will suddenly become zero. 11. The anode current below which SCR turns OFF is the HOLDING CURRENT and is noted. 12. The SCR is turned ON once again and the anode current is reduced to the Holding level. 13. The anode current is varied from holding current to 10 mA and in each step the forward voltage drop across SCR is noted. 14. The readings are tabulated and the experiment is repeated with different forward break down voltage. EC2155/ Circuits and Devices Lab Manual cum Observation
SRR Engineering College Tabulation for SCR:
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ECE Department
IG = Sl. No. VAK(V)
A IA(mA)
01 02 03 04 05 06 07 08 09 10 11
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15. As Break over voltage is increased, the gate current required to trigger the SCR will decrease. 16. To determine the leakage current in the blocking state the connections are made as per circuit diagram. 17. The power supply is Switched ON and the anode voltage is increased in steps. The anode current is noted in each step and tabulated. 18. The graph is plotted between forward voltage and forward current. The break over voltage and holding current are marked on the graph
Result: Thus the given SCR characteristics were drawn and the following parameters are measured. Holding Current (IH) Break over Voltage (VBO) Holding Voltage (VH) = = = mA. V. V.
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ECE Department
Circuit Diagram:
Model Graph: Drain Characteristics:
Page 88 of 108
Characteristics of Junction Field Effect Transistor (JFET) Aim : To plot the transistor characteristics of JFET (Junction Field Effect Transistor) & to find drain resistance, transconductance & amplification factor Apparatus Required: S. No 1. 2. 3. 4. 5. 6. 7. JFET Resistor RPS Voltmeters Ammeters Bread Board Connecting Wires Component Range FET BFW10 1K Dual (0-30)V (0-10)V, (0-30)V (0-30)mA --Qty 1 2 2 1 1 1 As Per Requirement Theory: Drain Characteristics: In BJT, the relationship between an output parameter Ic and an input parameter IB is given by a constant _, the relationship in JFET between an output parameter, Id, and an input parameter, Vgs, is more complex. In the saturation region, there exists a square-law transfer relationship. Transconductance Characteristics: In the transfer characteristics of a two port network, the input parameter is changed and its effect on the output parameter is observed. Similarly JFET can be treated as a two port nonlinear network. The transfer characteristics wherein the input parameter is the voltage across gate and source, and the output parameter is the drain current are called the transconductance characteristics.
SRR Engineering College Transfer characteristics:
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ECE Department
Drain Characteristics:
Vgs = Sl. No. VDS (V) 01 02 03 04 05 06 07 08 09 10
(V) ID (mA)
Vgs = VDS (V)
(V) ID (mA)
SRR Engineering College Procedure: Drain Characteristics (rd):
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ECE Department
1. Connections are made as per the circuit diagram. 2. VGS is kept constant (Say -1V), VDS is varied insteps of 1V and the corresponding ID values are tabulated. 3. The above procedure is repeated for VGS =0V. 4. Graph is plotted between VDS
5. and
ID for a constant VGS
The Drain resistance is found from the graph using the formula rd = VDS/ ID.
Transfer Characteristics (gm): 1. Connections are made as per the circuit diagram. 2. VDS is kept constant (Say 5V), VGS is varied insteps of 1V and the corresponding ID values are tabulated. 3. The above procedure is repeated for different values of VDS=10V, 15V. 4. Graph is plotted between VGS
and
ID for a constant VDS
5. The Transconductance is found. From the graph. gm = ID/VGS -1 Amplification Factor (): Amplification factor () = rd*gm (the amplification factor value must not exceed 50)
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ECE Department
Transfer Characteristics:
Sl.No
VDS = -VGS (V)
(V) ID (mA)
01 02 03 04 05 06 07 08 09 10
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ECE Department
Result: Thus the Drain and Transfer Characteristic of JFET is drawn, and form the characteristics curve the following parameters are determined. Drain resistance value (rd) = Trans conductance value (gm) = Amplification factor () = -1
SRR Engineering College Pin Diagram: Circuit Diagram:
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ECE Department
Model Graph: Drain Characteristics Transfer Characteristics
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Characteristics Of MOSFET Aim: To study the Drain and Transfer characteristics of depletion type n-channel MOSFET. Apparatus Required: S. No 1. 2. 3. 4. 5. 6. Component RPS Resistor Voltmeters Ammeters MOSFET Bread Board Connection Wires Range Dual (0-30) V 1k,33k (0-10)V (0-30) V (0-30) mA IRF 840 -Qty 1 1 1 1 1 1
1 As per requirement.
7. Theory:
--
MOSFET is similar to that for an EMOS transistor except that a likely doped N type channel is induced between the drain and source blocks. When a positive drain source voltage (VDS) is applied, a drain current (ID) flows when the gate source voltage (VGS) is zero. If a negative VGS is applied, some of the negative charge carriers are applied from the gate and driven out of the n-type channel. This creates a depletion region in the channel, as illustrated causing an increase in channel resistance and a decrease in drain current. The effect is similar to that in an n-channel JFET because of the channel depletion region, the device can be termed a depletion- mode MOSFET. Now consider what happens when a positive gate-source voltage is applied. Additional n-type charge carriers are attracted from the substrate into channel, decreasing its resistance and increasing the drain current. So the depletion- mode MOSFET can also be operated as an enhancement MOSFET or DEMOSFET.
SRR Engineering College Tabular Columa: Drain Characteristics: VGS = -2 (V) S. No. VDS (Volts) 01 02 03 04 05 06 07 08 09 10 11 12 Transfer Characteristics: VDS = S. No VGS(Volts) 01 02 03 04 05 06 07 08 09 10 ID (mA)
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VGS = -1(V) VDS (Volts) ID (mA)
VGS = 0(V) VDS (Volts) ID (mA)
(Volts) ID(mA)
VDS = VGS(Volts)
(Volts) ID(mA)
SRR Engineering College Procedure: Drain Characteristics:
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ECE Department
1. Connections are given as per the circuit diagram. 2. VGS kept constant by adjusting the input side power supply. 3. Vary the supply voltage VDS is at the output side the corresponding. 4. Voltage VDS and current ID is noted. 5. Repeat the same procedure for various constant values of VGS. 6. Graph is plotted between VDS (in X axis) and ID (in Y axis). 7. The Drain resistance is found from the graph using the formula rd = VDS/ ID. Transfer Characteristics: 1. Connections are given as per the circuit diagram. 2. Drain source voltage (VDS) is kept constant by adjusting the output side power supply. 3. By varying the VGS in at the input side in steps and the corresponding current ID is noted. 4. Repeat the same procedure for various constant values of VDS. 5. The readings are tabulated. 6. Graph is plotted between VGS n(in X axis) and ID (in Y axis) gm = ID/VGS -1 Amplification Factor (): Amplification factor () = rd*gm. Result:
Thus the Drain and Transfer Characteristic of MOSFET is drawn, and form the characteristics curve the following parameters are determined. Drain resistance value (rd) = Trans conductance value (gm) = Amplification factor () = -1
SRR Engineering College Pin Diagram and Symbol: DIAC:
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ECE Department
Construction TRIAC:
Symbol
Pin Diagram Circuit Diagram Of DIAC: Forward Bias:
Reverse Bias:
Page 98 of 108
ECE Department Date :
Characteristics of DIAC and TRIAC Aim: To plot the V-I characteristics of a DIAC and TRIAC Apparatus Required: S. No. 1. 2. 3. 4. 5. 6. 7. 8. Apparatus RPS Resistor DC Voltmeter DC Ammeter DIAC TRIAC Bread board (0-30)V 1K, 10K,5K (0-60)V, (0-30)V, (0-10) V (0-30) mA, (0-5,30) mA DB 50 BT136 Type Quantity 2 1 1 each 1 2 1 1 1 Few
Connecting wires -
Theory: The DIAC is two parallel diodes turned in opposite direction having a pair of four layer diodes for alternating current. It is a bidirectional trigger diode that conducts current only after its breakdown voltage has been exceeded momentarily. When this occurs, the resistance of the diode abruptly decreases, leading to a sharp decrease in the voltage drop across the diode and usually, a sharp increase in current flow through the diode. The diode remains "in conduction" until the current flow through it drops below a value characteristic for the device, called the holding current. Below this value, the diode switches back to its high-resistance (non-conducting) state. When used in AC applications this automatically happens when the current reverses polarity. It is two SCRs turned in opposite directions, with a common gate terminal. It is a bidirectional device. The two main electrodes are called MT1 and MT2 while common control terminal is called gate G. S The gate terminal is near to MT1. The triac can be turned ON by
SRR Engineering College Model Graph of DIAC
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ECE Department
V-I characteristics of a DIAC Tabulation for DIAC: S.No. 01. 02. 03. 04. 05. 06. 07. 08. 09. 10. Forward Bias Reverse Bias
Voltage(V) Current(mA) Voltage(V) Current(mA)
Page 100 of 108
ECE Department
applying either positive or negative voltage to the gate G with respect to the main terminal MT1. DIAC: Procedure Forward Bias: 1. Connections are given as per the circuit diagram. 2. The supply is switched ON. 3. Vary the power supply in regular step and note down the voltage and current of DIAC. 4. Plot the graph between the voltage and current. Procedure Reverse Bias: Repeat the procedure for forward bias. TRIAC: Procedure Forward Bias: 1. Connections are given as per the circuit diagram. 2. The supply is switched ON. 3. The Gate current IG is set to 2mA by varying the RPS which connected to the gate. 4. Vary another power supply which is connected across the terminals of TRIAC in regular step and note down the voltage and current of TRIAC. 5. Plot the graph between the voltage and current. Procedure Reverse Bias: Repeat the procedure for forward bias.
SRR Engineering College Circuit Diagram of TRIAC: Forward Bias:
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ECE Department
Reverse Bias:
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ECE Department
SRR Engineering College Model Graph of TRIAC:
Page 103 of 108
ECE Department
V-I characteristics of a TRIAC Tabulation for TRIAC: Forward Bias S. No 01. 02. 03. 04. 05. 06. 07. 08. 09. 10. Gate Current (IG= 2mA) Reverse Bias Gate Current (IG=-2mA)
Voltage(V) Current(mA) Voltage(V) Current(mA)
Page 104 of 108
ECE Department
Result: Thus the V-I characteristics of a DIAC and TRIAC is analyzed.
SRR Engineering College Circuit Diagram of Phototransistor:
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ECE Department
Model Graph:
TabularColumn: S. No. 01 02 03 04 05 06 07 08 Expt. No.: EC2155/ Circuits and Devices Lab Manual cum Observation Date: VCE (Volts) IC (mA)
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ECE Department
Characteristics of Photo Transistor and Photo diode Aim: 1. To study the characteristics of a phototransistor. 2. To study the characteristics of phototransistor. Apparatus Required: S. No. 1 2 3 4 5 6 7 8 R.P.S Ammeter Voltmeter Photo diode Resistor Phototransistor Bread Board Connecting Wire Name Range & Type (0-30)V (030) mA, (0-100 mA) (030)V TIL81 1K LI4G2 --------------------------Qty 2 1each 1 1 2 1 1 As Per Requirement Theory: Phototransistor: It is a transistor with an open base; there exists a small collector current consisting of t herm al l y produced minority carriers and surface leakage. By exposing the collector junction to light, a manufacturer c a n produce a phototransistor, a transistor that has more sensitivity to light than a photo diode. Because the base lead is open, all the reverse current is forced into the base of the transistor. The resulting collector current is ICeo = dcIr. The main difference between a phototransistor and a photodiode is the current gain, dc. The same amount of light striking both devices produces dc times more current in a phototransistor than in a photodiode.
SRR Engineering College Circuit Diagram for photo Diode:
Page 107 of 108
ECE Department
Model Graph:
Tabular Column: S. No. 01 02 03 04 05 06 07 08 09 10 11 EC2155/ Circuits and Devices Lab Manual cum Observation VAK (V) IA (mA)
SRR Engineering College Photodiode:
Page 108 of 108
ECE Department
A photo diode is a two terminal PN junction device, which operates on reverse bias. On reverse biasing a PN junction diode, there results a constant current due to minority charge carriers known as reverse saturation current. Increasing the thermally generated minority carriers by applying external energy, i.e., either heat or light energy at the junction can increase this current. When we apply light energy as an external source, it results in a photo diode that is usually placed in a glass package so that light can reach the junction. Initially when no light is incident, the current is only the reverse saturation current that flows through the reverse biased diode. This current is termed as the dark current of the photo diode. Now when light is incident on the photo diode then the thermally generated carriers increase resulting in an increased reverse current which is proportional to the intensity of incident light. A photo diode can turn on and off at a faster rate and so it is used as a fast acting switch. Procedure: Phototransistor: 1. Rig up the circuit as per the circuit diagram. 2. Maintain a known distance (say 5 cm) between the DC bulb and the phototransistor. 3. Set the voltage of the bulb (say, 2V), vary the voltage of the diode in steps of 1V and note down the corresponding diode current, Ir. 4. Repeat the above procedure for the various values of DC bulb. 5. Plot the graph: VD vs. Ir for a constant bulb voltage. Photo Diode: 1. Rig up the circuit as per the circuit diagram. 2. Maintain a known distance (say 5 cm) between the DC bulb and the photo diode. 3. Set the voltage of the bulb (say, 2V), vary the voltage of the diode insteps of 1V and note down the corresponding diode current, Ir. 4. Repeat the above procedure for the various voltages of DC bulb. 5. Plot the graph: VD vs. Ir for a constant DC bulb voltage. Result: Thus the characteristics of photo diode and phototransistor are studied.

EC 2155 - Circuits and Devices Lab Manual Cum Observation

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SRR Engineering College Circuit Diagram:

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College Expt.No:

Page 2 of 108 Verification of Kirchoffs Laws

ECE Department Date

currents flowing towards junction as positive & that

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College Kirchhoffs voltage law (KVL):

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College = || = (6.9 | [

Page 5 of 108 ] | + (4.7 + ( 2.2 ) | |

|| = (251.82 x= [ |x| = (10) |

+ 4.7 + 930.6 ) y =[ [198 +330

=10 120.44 =1204.4 |x| = (2465

|y|= |y| =(1366.2 |y| =2134.4 z |z| =

) = A=9.78 mA ) = A=8.474 mA ) = A=8.051 mA -3 ) =1.31 x10 A =1.31mA

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College Procerure: Kirchhoffs current law (KCL):

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College Tabulation for node current in KCL:

Name of the node Node P I=I3+I4

Theoretical value 9.781mA= (8.051+1.73 )mA

1.73mA= (0.423+ 1.31)mA

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College Tabulation for loop voltage:

Name of the loop Loop 1

Theoretical value 10v = (3.8 +6.157)v

E1=V1+V3 Loop 2 2 E2+V3-V2-V5=0 Loop 3 3 V4=V1+V2 8.051v = (3.8+4.23)v 15+6.157-4.23-16.948)v = 0

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College Circuit Diagram:

Figure -1 Thevenins equivalent circuit:

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College Expt.No.:

ECE Department Date:

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College

SRR Engineering College =(4.3 |

Page 14 of 108 |-(-3.3 +20| )|

=4.3 =(4.3 =219.3 =201.15

-0)+20(7.26 +(20 7.26 )

I3= (|3| / || )= ((201.15

To calculate the Thevenins voltage Vth::

SRR Engineering College = (15+ ( = (15+0.251) = 15.251 Volts )x(2.2 )

To calculate the Thevenins resistance Rth:

Figure -6 Rx is the parallel combination of 1k and 3.3k resistors.

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College To calculate the IL:

EC2155/ Circuits and Devices Lab Manual cum Observation

SRR Engineering College To measure the Load current IL :

Figure -11 To measure the VL :

Figure -12 To measure the Vth :

SRR Engineering College Procedure: