A ROM-Less Direct Digital Frequency Synthesizer Based On Bezier Curve Approximation
A ROM-Less Direct Digital Frequency Synthesizer Based On Bezier Curve Approximation
A ROM-Less Direct Digital Frequency Synthesizer Based On Bezier Curve Approximation
0.52663(/)
4
+ 3.65319(/)
5
1.217743(/)
5
. (9)
For phase value, between 0 to , maximum error
between real sine wave and proposed approximation is
limited to maximum of 7.910
-6
. Fig. 2 shows the
approximation error between real sine wave and sine wave
generated by proposed approximation.
Figure 2. Approximation errors for Bezier curve approximation.
Table II. summarizes the comparison of various sine
function approximation techniques along with the proposed
approximation. The maximum approximation error in sine
amplitude computation by the proposed technique is
restricted to maximum of 7.910
-6
. Employing this
approximation in a DDS as sine computation technique,
makes it possible to have a ROM-Less DDS architecture
with 16-bit amplitude resolution (7.910
-6
< 2
-16
).
TABLE II. SUMMARY OF SINE APPROXIMATIONS TECHNIQUES
Approximations Methods Maximum Error
Equivalent
Amplitude
Resolution
(bits)
2
nd
-order parabolic
approximation [8]
9.010
-04
10
3
rd
-order parabolic
approximation [9]
4.888210
-04
11
5
th
-order polynomial
approximation [10]
2.010
-04
12
8
th
-order polynomial
approximation [11]
1.8910
-05
15
Proposed Bezier curve
approximation
7.910
-06
16
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Proc. of the Intl. Conf. on Advances in Computer, Electronics and Electrical Engineering
III. DIGITAL IMPLEMEMTATION
The phase accumulator output, n is a digital sweep whose
value ranges from 0 to 2
N
1. The phase output, n is related
to the phase angle, as given in (1). Substituting with n
and multiplying of each term of (9) by 1024/2
10
(1024/2
10
=
1),(9) becomes
Sin (n) = 1/2
10
(3218(n/2
N-1
) 16(n/2
N-1
)
2
5156(n/2
N-1
)
3
539(n/2
N-1
)
4
+3741(n/2
N-1
)
5
1248(n/2
N-1
)
6
). (10)
Considering truncated phase bits N=16 (as not all bits of
phase accumulator are forward to phase to sine conversion
stage, but only few MSBs are forwarded and rest are
truncated to reduce the ROM requirement. Assuming N=16
is truncated phase bits to be forwarded for sine function
calculation). With N=16, (10) reduces to
Sin (n) = 1/2
10
(3218(n/2
15
) 16(n/2
15
)
2
5156(n/2
15
)
3
539(n/2
15
)
4
+3741(n/2
15
)
5
1248(n/2
15
)
6
) (11)
Equation (11) can be rewritten as
Sin (n) = n/2
25
(3218 n/2
15
(16 + n/2
15
(5156+
n/2
15
(539n/2
15
(3741 n/2
15
(1248)))))) (12)
The last term in (12), n/2
15
(1248) requires a multiplier in its
digital implementation, which is not a desirable feature. This
term can be replaced with n/2
15
(2
10
+2
8
2
5
), which is easily
implemented by shift-and- add/subtractor. By this, demand
for number of multiplier reduces by one. So (12) can be
rewritten as
Sin (n) = n/2
25
(3218 n/2
15
(16 + n/2
15
(5156 + n/2
15
(539
n/2
15
(3741 n/2
5
n/2
7
+ n/2
10
))))). (13)
Equation (13) can be realized by digital circuitry. The
block diagram based upon (13), for the proposed Bezier
curve generator is shown in Fig. 3. It consists of five 1515-
bit multipliers, five shift-and-add scalers, and one
adder/subtractor.
Figure 3. Block diagram of Bezier curve approximation
Fig. 4 shows the proposed architecture of ROM-Less
DDS using Bezier curve approximation. The N-bit phase
accumulator generates a digital ramp corresponding to
complete cycle of sine wave (0 to 2). (N1) LSBs of phase
accumulator, corresponding to 0 to are converted to +ve
half cycles of sine wave by Bezier curve approximation
generator. The frequency of these half cycles is twice of
output frequency. The MSB is used to determine whether the
sine amplitude output has to be inverted. Every alternative
half cycle is inverted to make complete sine wave.
Figure 4. Architecture of Bezier curve approximation based DDS.
IV. RESULT AND ANALYSIS
The Bezier curve approximation function is modelled in
Matlab-Simulink for validating the approximation. The
Bezier function block was inserted in place of ROM (look
up table) block of DDS. The specifications of the proposed
DDS simulation are shown in Table III.
TABLE III. SPECIFICATION OF THE SIMULATED DDS
Specification Value
FCW 32-bit
Phase accumulator output 16-bit
Clock frequency 1GHz
Output frequency 10MHz
Spurious Free Dynamic Range
(SFDR)
99.76dBc
The Fig. 5 shows the output of phase accumulator and
sine function generator. The output waveform is spectrally
very pure. Fig. 6 shows the power spectrum of waveform
synthesized by DDS based on Bezier curve approximation.
The SFDR evaluated for the proposed method is 99.76dBc.
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Proc. of the Intl. Conf. on Advances in Computer, Electronics and Electrical Engineering
Figure 5. Phase accumulator and sine fuction generator output.
Figure 6. Power spectrum of simulated sine wave.
V. CONCLUSION
The DDS using Bezier curve approximation has been
proposed and simulated. It avoids use of ROM (look up
table) and computes the sine function. The proposed
approximation introduces maximum error of 7.910
-6
, which
is equivalent to quantized sinusoid with 16-bit amplitude
resolution. The SFDR of proposed ROM-Less DDS is
evaluated using Matlab-Simulink, which is equal to
99.76dBc. Important advantage lies with this idea of
approximation is that it uses full digital circuitry (no
memory), gives 16-bit resolution and spectrally very pure
sine waveform.
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