Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                

A ROM-Less Direct Digital Frequency Synthesizer Based On Bezier Curve Approximation

Download as pdf or txt
Download as pdf or txt
You are on page 1of 4

A ROM-Less Direct Digital Frequency

Synthesizer Based on Bezier Curve


Approximation
Ravinder Singh, Kathika Roy and C Bhattacharya
Defence Institute of Advanced Technology
Pune, India
E-mail: rsd240@yahoo.com, kathikaroy@gmail.com, cbhat0@ieee.org
AbstractThis paper describes the design and
implementation of a ROM-Less Direct Digital Frequency
Synthesizer (DDS) using Bezier curve approximation. With
Bezier curve approximation, phase values between 0 to are
mapped to sine amplitudes. Then, half wave symmetry of sine
wave is exploited to construct full sine wave. The proposed
approximation introduces maximum error of 7.910
-6
, which is
equivalent to quantized sinusoid with 16-bit amplitude
resolution. This yields very high spectrally pure sine wave
output. Based on the approximation, DDS circuit is designed
and validated in Matlab-Simulink.
KeywordsDirect Digital Frequency Synthesizer, ROM-
Less DDS, Bezier curve approximation.
I. INTRODUCTION
Direct Digital Frequency Synthesizer (DDS) plays a
significant role in modern digital communication and
electronic instruments. DDS is preferred because of its
significant advantages over Phase Locked Loop (PLL) such
as sub-hertz frequency resolution, fast switching time, low
phase noise, continuous-phase frequency switching and
unparalleled matching and control of I and Q synthesized
outputs [1]. A typical DDS consists of a phase accumulator
(PA) and a sine/cosine generator (phase to sine conversion)
as shown in Fig. 1.
Figure 1. Simplified block diagram of a DDS.
Phase accumulator is N-bit register. An N-bit Frequency
Control Word (FCW), M and clock frequency, f
clk
control the
phase accumulator output. Phase accumulator output, n is N-
bit digital sweep whose value ranges from 0 to 2
N
-1 and its
slope depends upon FCW. These 2
N
(0 to 2
N
-1) output values
of phase accumulator are mapped to phase values, as
u = 2(n/2
N
). (1)
Phase value, varies from 0 to 2. The phase accumulator
output is fed to sine generator which gives digital samples of
sine wave as
A(n) = sin(2(n/2
N
)). (2)
These digital samples of sine wave are presented to
Digital to Analog Converter (DAC). DAC generates an
analog waveform in response to the digital samples of sine
wave. Generally, a Low Pass Filter (LPF) is placed after
DAC to attenuate the higher frequency components. The
fundamental frequency, f
out
of output sine wave is [2]
f
out
= f
clk
.(FCW/2
N
). (3)
Phase to sine amplitude conversion in sine generator is
realized by either ROM (look up table) methods or ROM-
Less computational methods [3]. Using larger ROM leads to
higher power consumption and lower speed, which is
undesirable feature for any electronic circuitry. Due to this
reason, there is ever increasing demand of keeping memory
size to minimum. To achieve it, different ROM compression
techniques are employed [4]. The Sunderland technique
based upon trigonometric identities, offers a ROM
compression ratio of 59:1. Nicholas architecture uses least
square approximation to split the ROM into two smaller
memories: a coarse one that computes the sine function with
high error and a fine one to interpolate the values of coarse
ROM to exact value. It achieves a compression ratio of
128:1. Taylor series approximation [5] offers compression
ratio of 128.8:1.
An alternative approach, which employs no ROM (look
up table) but computes sine samples from phase values is
called ROM-Less or computational method. Various
techniques fall in this category are CORDIC, Taylor series,
parabolic approximation and polynomial approximations. As
this approach avoids use of ROM, so guarantees high speed
and low power consumption. In this approach, phase values
and mapped to amplitudes of sine wave by a sine function.
The error in computation of sine amplitude by these different
methods is restricted to maximum of 1.8910
-5
[6].
In this paper, a new and more accurate, Bezier curve
approximation based design for DDS is introduced. The
phase values from phase accumulator are mapped to sine
amplitudes by Bezier curve approximation. Next section
describes the idea of Bezier curve approximation for
generation of sine function. Further on, digital
Proc. of the Intl. Conf. on Advances in Computer, Electronics and Electrical Engineering
Editor In Chief Dr. R. K. Singh. Copyright 2012 Universal Association of Computer and Electronics Engineers.
All rights reserved. ISBN: 978-981-07-1847-3
doi:10.3850/978-981-07-1847-3 P0868
366
Proc. of the Intl. Conf. on Advances in Computer, Electronics and Electrical Engineering
implementation of approximation and its validation is given
in detail.
II. BEZIER CURVE APPROXIMATION
A Bezier curve is parametric curve described by
polynomial based on control points [7]. A general Bezier
equation is written as
, (4)
where the polynomials
, (5)
(6)
and points P
i
are called control points.
A curve is formed by connecting the Bezier points with
lines, starting with P
0
, normally not passes through any of
other control points and terminating at P
n
is called Bezier
curve. In general, every curve can be described by Bezier
curves with some minimal error. A Bezier curve with n = 6
is used to approximate sine function. Equation (7) gives the
half cycle of sine wave as
A(t) = (1t)
6
P
0
+ 6t(1t)
5
P
1
+ 15t
2
(1t)
4
P
2
+ 20t
3
(1t)
3
P
3
+
15t
4
(1t)
2
P
4
+ 6t
5
(1t)P
5
+ t
6
P
6
(7)
where t ranges from 0 to 1.
To generate the sine wave having unit amplitude, values
of control points P
0
to P
6
are calculated and are shown in
Table I. P
0
and P
6
are kept equal to zero to reduce the terms
of Bezier equation. P
1
= P
5
and P
2
= P
4
are due to fact that
sine wave is symmetrical about /2.
TABLE I. VALUES OF CONTROL POINTS
Control Points Value
P0 0
P1 0.5237
P2 1.0464
P3 1.3162
P4 1.0464
P5 0.5237
P6 0
As parameter t in (7) varies from 0 to 1 and phase
angle varies from 0 to for first half of sine wave, so
replacing t with / and substituting values of control
points in (7) leads to
A(t) = Sin() = 3.14222(/)(1 (/))
5
+ 15.69544(/)
2
(1 (/))
4
+ 26.32417(/)
3
(1 (/))
3
+ 15.69544(/)
4

(1 (/))
2
+ 3.14222(/)
5
(1 (/)). (8)
Simplification of (8) gives
Sin () = 3.14222(/) 0.015669(/)
2
5.03539(/)
3

0.52663(/)
4
+ 3.65319(/)
5
1.217743(/)
5
. (9)
For phase value, between 0 to , maximum error
between real sine wave and proposed approximation is
limited to maximum of 7.910
-6
. Fig. 2 shows the
approximation error between real sine wave and sine wave
generated by proposed approximation.
Figure 2. Approximation errors for Bezier curve approximation.
Table II. summarizes the comparison of various sine
function approximation techniques along with the proposed
approximation. The maximum approximation error in sine
amplitude computation by the proposed technique is
restricted to maximum of 7.910
-6
. Employing this
approximation in a DDS as sine computation technique,
makes it possible to have a ROM-Less DDS architecture
with 16-bit amplitude resolution (7.910
-6
< 2
-16
).
TABLE II. SUMMARY OF SINE APPROXIMATIONS TECHNIQUES
Approximations Methods Maximum Error
Equivalent
Amplitude
Resolution
(bits)
2
nd
-order parabolic
approximation [8]
9.010
-04
10
3
rd
-order parabolic
approximation [9]
4.888210
-04
11
5
th
-order polynomial
approximation [10]
2.010
-04
12
8
th
-order polynomial
approximation [11]
1.8910
-05
15
Proposed Bezier curve
approximation
7.910
-06
16
367
Proc. of the Intl. Conf. on Advances in Computer, Electronics and Electrical Engineering
III. DIGITAL IMPLEMEMTATION
The phase accumulator output, n is a digital sweep whose
value ranges from 0 to 2
N
1. The phase output, n is related
to the phase angle, as given in (1). Substituting with n
and multiplying of each term of (9) by 1024/2
10
(1024/2
10
=
1),(9) becomes
Sin (n) = 1/2
10
(3218(n/2
N-1
) 16(n/2
N-1
)
2
5156(n/2
N-1
)
3
539(n/2
N-1
)
4
+3741(n/2
N-1
)
5
1248(n/2
N-1
)
6
). (10)
Considering truncated phase bits N=16 (as not all bits of
phase accumulator are forward to phase to sine conversion
stage, but only few MSBs are forwarded and rest are
truncated to reduce the ROM requirement. Assuming N=16
is truncated phase bits to be forwarded for sine function
calculation). With N=16, (10) reduces to
Sin (n) = 1/2
10
(3218(n/2
15
) 16(n/2
15
)
2
5156(n/2
15
)
3
539(n/2
15
)
4
+3741(n/2
15
)
5
1248(n/2
15
)
6
) (11)
Equation (11) can be rewritten as
Sin (n) = n/2
25
(3218 n/2
15
(16 + n/2
15
(5156+
n/2
15
(539n/2
15
(3741 n/2
15
(1248)))))) (12)
The last term in (12), n/2
15
(1248) requires a multiplier in its
digital implementation, which is not a desirable feature. This
term can be replaced with n/2
15
(2
10
+2
8
2
5
), which is easily
implemented by shift-and- add/subtractor. By this, demand
for number of multiplier reduces by one. So (12) can be
rewritten as
Sin (n) = n/2
25
(3218 n/2
15
(16 + n/2
15
(5156 + n/2
15
(539
n/2
15
(3741 n/2
5
n/2
7
+ n/2
10
))))). (13)
Equation (13) can be realized by digital circuitry. The
block diagram based upon (13), for the proposed Bezier
curve generator is shown in Fig. 3. It consists of five 1515-
bit multipliers, five shift-and-add scalers, and one
adder/subtractor.
Figure 3. Block diagram of Bezier curve approximation
Fig. 4 shows the proposed architecture of ROM-Less
DDS using Bezier curve approximation. The N-bit phase
accumulator generates a digital ramp corresponding to
complete cycle of sine wave (0 to 2). (N1) LSBs of phase
accumulator, corresponding to 0 to are converted to +ve
half cycles of sine wave by Bezier curve approximation
generator. The frequency of these half cycles is twice of
output frequency. The MSB is used to determine whether the
sine amplitude output has to be inverted. Every alternative
half cycle is inverted to make complete sine wave.
Figure 4. Architecture of Bezier curve approximation based DDS.
IV. RESULT AND ANALYSIS
The Bezier curve approximation function is modelled in
Matlab-Simulink for validating the approximation. The
Bezier function block was inserted in place of ROM (look
up table) block of DDS. The specifications of the proposed
DDS simulation are shown in Table III.
TABLE III. SPECIFICATION OF THE SIMULATED DDS
Specification Value
FCW 32-bit
Phase accumulator output 16-bit
Clock frequency 1GHz
Output frequency 10MHz
Spurious Free Dynamic Range
(SFDR)
99.76dBc
The Fig. 5 shows the output of phase accumulator and
sine function generator. The output waveform is spectrally
very pure. Fig. 6 shows the power spectrum of waveform
synthesized by DDS based on Bezier curve approximation.
The SFDR evaluated for the proposed method is 99.76dBc.
368
Proc. of the Intl. Conf. on Advances in Computer, Electronics and Electrical Engineering
Figure 5. Phase accumulator and sine fuction generator output.
Figure 6. Power spectrum of simulated sine wave.
V. CONCLUSION
The DDS using Bezier curve approximation has been
proposed and simulated. It avoids use of ROM (look up
table) and computes the sine function. The proposed
approximation introduces maximum error of 7.910
-6
, which
is equivalent to quantized sinusoid with 16-bit amplitude
resolution. The SFDR of proposed ROM-Less DDS is
evaluated using Matlab-Simulink, which is equal to
99.76dBc. Important advantage lies with this idea of
approximation is that it uses full digital circuitry (no
memory), gives 16-bit resolution and spectrally very pure
sine waveform.
REFERENCES
[1] V. F. Kroupa, Direct Digital Frequency Synthesizers. New York, US:
Wiley-IEEE Press, 1999.
[2] A Technical Tutorial on Digital Signal Synthesis, Analog Devices,
2011.
[3] X. Li, L. Lai, A. Lei, and Z. Lai, A direct digital frequency
synthesizer based on two segment fourth-order parabolic
approximation, IEEE Transaction on Consumer Electronics, vol. 55,
pp. 322-326, May 2009.
[4] J. Vankka, Methods of mapping from phase to sine amplitude in
direct digital Synthesis, IEEE International Frequency Control
Symposium, pp. 942-950, 1996.
[5] M. M. E. Said and M. I. Elmasry, An improved ROM compression
technique for direct digital frequency synthesizers, IEEE
International Symposium on Circuits and Systems, vol. 5 pp. 437-440,
2002.
[6] Y. H.Chen and Y. A. Chau, A direct digital frequency synthesizer
based on a new form of polynomial approximations, IEEE
Transaction on Consumer Electronics, vol. 56, pp. 436-440, May
2010.
[7] H. Pottmann and J. Wallner, Computational Line Geometry. New
York, US: Springer, 2010.
[8] M. Sodagar and G.R.Lahiji, A novel architechture for ROM-Less
sine-output direct digital frequency synthesizers by using the 2
nd
-order
parabolic approximation, IEEE International Frequency Control
Symposium, pp. 284-289, 2000.
[9] A. Mohammad and A. M. Sodagar, ROM-Less direct digital
frequency synthesis using the 3rd-order parabolic approximation IET
Frequency and Time Forum, pp. 325-328, 2004.
[10] C. Meenakam and A. Thanachayanont, A ROM-Less direct digital
frequency synthesiser using a polynomial approximation, IEEE
International Symposium on Circuits and Systems, vol. 1, pp. 625-
628, 2003.
369

You might also like