Computation

5JJ70 Implementatie van rekenprocessen

Translate C into MIPS assembly

Henk Corporaal
December 2009

Welcome

So far we covered almost all of C, and a large part of C++ We also introduced the MIPS processor and its instructions C++ topics not treated:

Refer to the online manuals and tutorials, or the C++ bible

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copy py constuctor abstract classes virtual destructors define f y your u own w operators p (overloading ( g existing g ones) ) exceptions, using catch and throw formatted stream i/o templates (we'll (we ll come back on this)

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Topics of today

Final lecture of first semester Recap of MIPS instruction set and formats MIPS addressing modes R i t allocation Register ll ti

graph coloring spilling p g

Translating C statements into Assembler

MIPS_3000

if statement while h l statement switch statement procedure / function (leaf p ( and non-leaf) ) stack save and restore mechanism
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Actions to be performed for an instruction

let's take a load instruction at address 0x800:
0x800
1.

lw $s1, 8($s2)

Cycle 1

Fetch instruction to which PC points New PC = PC+4 Decode instruction Fetch $s2 from register file Execution: Add 8 to $s2 Fetch data from address (8+$s2) Write data back to register file location $s1
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2.

Cycle 2

3.

Cycle 3

4.

Cycle 4

5.

C l 5 Cycle

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Pipelined MIPS

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Main Types of Instructions

Arithmetic

Integer Floating Point

Memory access instructions

Load & Store

Control flow

Jump Conditional Branch Call & Return

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MIPS arithmetic
C code: A = B + C + D; E = F - A;

MIPS code: d add $t0, $s1, $s2 add $s0, $t0, $s3 sub $s4, , $s5, , $s0

Operands must be registers, only 32 registers provided Design Principle: smaller is faster. Why?

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Registers vs. Memory

Arithmetic instructions operands must be registers, only 32 registers provided Compiler associates variables with registers What about programs with lots of variables ?

CPU
register file

Memory

IO
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Register allocation

Compiler tries to keep as many variables in registers as possible: graph coloring Some variables can not be allocated

large arrays (too few registers) aliased variables (variables accessible through pointers in C) d dynamic i allocated ll t d variables i bl heap stack

Compiler may run out of registers => spilling

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Register allocation using graph coloring

Example: Program: g
a define (def)
a := c := b := := b d := := a := c := d Live Ranges a b c d

a consume (cons) ( )

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Register g allocation using g graph g p coloring g

Inf Inference n G Graph ph
a

Coloring:

a = red b = green c = blue d = green

b d

Graph p needs 3 colors => program p g needs 3 registers g

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Register allocation: spilling

Spill/ Reload code
Spill/ Reload code is needed when there are not enough colors (registers) to color the interference graph

Program:
Example: What if only two registers g available ? a := c := store c b := := b d := := a load c := c := d

Live Ranges a b c

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Memory layout: Alignment

31 23 15 7 0

addr ress

0 4 8 12 16 20 24

this word is aligned; the others are not!

Question: If words are aligned, what are then the least 2 significant i ifi t bit bits of f a word d address? dd ?
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Instructions: Load and store

Example: C code: A[8] = h + A[8];

MIPS code: d lw $t0, 32($s3) add $t0, $s2, $t0 sw $t0, , 32($s3) ( )

Store word operation has no destination (reg) operand Remember arithmetic operands are registers, not memory!

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Machine Language

Instructions, like registers and words of data, are also 32 bits g long

Example: add $t0, $s1, $s2 Registers have numbers: $t0=9, $s1=17, $s2=18

Instruction I t ti F Format: t op rs 000000

6 bits

rt 10010
5 bits

rd 01001
5 bits

shamt 00000
5 bits

funct 100000
6 bits

10001
5 bits

Question: Can you guess what the field names stand for?
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Machine Language

Consider the load-word and store-word instructions,

What would the regularity principle have us do? N New principle: i i l : Good G d design d si d demands ds a compromise is

Introduce a new type of instruction format

I-type I t p for f data d t t transfer nsf inst instructions u ti ns other format was R-type for register

Example: lw $t0, 32($s2) 35 op 18 rs 9 rt 32 16 bit number

Where's the compromise?

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Control

Decision making instructions

alter the control flow, flow i.e., change the "next" instruction to be executed

MIPS conditional diti l branch b h instructions: i st ti s: bne $t0, $t1, Label beq $t0, $t1, Label

Example:

if (i==j) h = i + j;

bne $s0, $s1, Label add $s3, $s0, $s1 Label: ....
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Control

MIPS unconditional branch instructions: j label Example: Example if (i!=j) h=i+j; else h=i-j; beq $s4, $s5, Lab1 add $s3 $s3, $s4 $s4, $s5 j Lab2 Lab1: sub $s3, $s4, $s5 Lab2: ...

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So far:

Instruction
add $s1,$s2,$s3 sub $s1,$s2,$s3 l $ lw $s1,100($s2) 1 100($ 2) sw $s1,100($s2) bne $s4,$s5,L beq $s4 $s4,$s5,L $s5 L j Label

Meaning
$s1 = $s2 + $s3 $s1 = $s2 $s3 $ 1 = M $s1 Memory[$s2+100] [$ 2+100] Memory[$s2+100] = $s1 Next instr. is at Label if $s4 $s5 Next instr instr. is at Label if $s4 = $s5 Next instr. is at Label

F Formats: t
R I J op op op rs rs rt rt rd shamt funct 16 bit address

26 bit address
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Used MIPS compiler conventions

Name Register number Usage 0 the constant value 0 $zero 2-3 values for results and expression evaluation $v0-$v1 47 4-7 arguments $ 0 $ 3 $a0-$a3 8-15 temporaries $t0-$t7 16-23 16 23 saved (by callee) $s0-$s7 $s0 $s7 24-25 more temporaries $t8-$t9 28 global pointer $gp 29 stack pointer $sp 30 frame pointer $fp 31 return t address dd $ $ra
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Constants

Small constants are used quite frequently (50% of operands) e.g., A = A + 5; ; B = B + 1; C = C - 18; Solutions? Why not?

put 'typical typical constants constants' in memory and load them? create hard-wired registers (like $zero) for small constants? . . . ???

MIPS Instructions: addi slti andi ori $29 $29, $8, $29, , $29, $29 $29, $18, $29, $29, , 4 10 6 4

How do we make this work?

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How about larger constants?

We'd like to be able to load a 32 bit constant into a register Must use two instructions, instructions new "load load upper immediate" immediate instruction lui $t0, 1010101010101010 filled with zeros
1010101010101010 0000000000000000

Then must get the lower order bits right, i.e., ori $t0, $t0, 1010101010101010
1010101010101010 0000000000000000 1010101010101010

ori

0000000000000000

1010101010101010

1010101010101010
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Addresses in Branches and Jumps

Instructions:
bne $t4,$t5,Label , , beq $t4,$t5,Label j Label Next instruction is at Label if $t4 $t5 Next instruction is at Label if $t4 = $t5 Next instruction is at Label

F Formats:

I J

op op

rs

rt

16 bit address

26 bit address

Questions: Above addresses are not 32 bits !!

How do we extend them to 32 bits? H How do d we h handle dl this hi with i hl load d and d store instructions? i i

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Addresses in Branches

Instructions:
bne $t4,$t5,Label beq $t4,$t5,Label Next instruction is at Label if $t4 $t5 Next instruction is at Label if $t4 = $t5

Formats:
op rs rt 16 bit address

Could specify a register (like lw and sw) and add it to address

use Instruction Address Register (PC = program counter) most branches are local (principle of locality)

Jump p instructions just j use high g order (4) ( ) bits of PC

32-bit Jump address = PC[31..28} + Instr[25..0] + [00] Address boundaries of 256 MB

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Overview of MIPS

simple instructions, all 32 bits wide very structured, structured no unnecessary baggage only three instruction formats
R I J op op op rs rs rt rt rd shamt funct

16 bit address

26 bit address

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To summarize:
MIPS assembly language C t Category
add

I t ti Instruction

E Example l add $s1, $s2, $s3 sub $s1, $s2, $s3

M Meaning i $s1 = $s2 + $s3 $s1 = $s2 - $s3 $s1 = $s2 + 100 $s1 = Memory[$s2 + 100] Memory[$s2 + 100] = $s1 $s1 = Memory[$s2 + 100] Memory[$s2 + 100] = $s1 $s1 = 100 * 2
16

C Comments t
Three operands; data in registers

Arithmetic

subtract

Three operands; data in registers

addi $s1, $s2, 100 lw $s1, 100($s2) load word sw $s1, 100($s2) store word lb $s1 $s1, 100($s2) Data transfer load byte sb $s1, 100($s2) store byte load upper immediate lui $s1, 100
add immediate branch on equal

Used to add constants Word from memory to register Word from register to memory Byte from memory to register Byte from register to memory Loads constant in upper 16 bits

beq bne slt slti j jr jal

$s1, $s2, 25 $s1, $s2, 25 $s1, $s1 $s2, $s2 $s3

if ($s1 == $s2) go to PC + 4 + 100 if ($s1 != $s2) go to PC + 4 + 100 if ($s2 < $s3) $s1 = 1; 1 $s1 else =0 else $s1 = 0

Equal test; PC-relative branch

branch on not equal

Not equal test; PC-relative

Conditional b branch h

set t on less l than th

C Compare l less th than; f for b beq, b bne

set less than immediate jump

$s1, $s2, 100 if ($s2 < 100) $s1 = 1; 2500 $ra 2500

Compare less than constant

Unconditional jump

jump register jump and link

Jump to target address go to 10000 For switch, procedure return go to $ra $ra = PC + 4; go to 10000 For procedure call
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Floating point instructions

Mips has separate floating point registers $f0, $f1, $f2, And special instructions that operate on them: add.s sub.s mul s mul.s div.s c.x.s bc1t lwc1 swc1 add.d sub.d mul d mul.d div.d c.x.d d bc1f
single ( (.s) s) or double ( (.d) d)

Compare two registers

Branch if true, branch if false

Load and save fp words

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Floating point instructions examples

add.s $f2, $f3, $f4 add.d $f2, $f4, $f6 lwc1 $f1, 100($s2) c.lt.s $f2, $f3 bclt 25 // adds pairs of float registers // $f1 = Memory[$s2+100] M [$ 2 100] // if ($f2 < $f3) cond = 1; else cond = 0 // if (cond==1) goto PC+4+100

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Assembly Language vs. Machine Language

Assembly provides convenient symbolic representat on representation

much

easier than writing down numbers e.g., destination register first

Machine language is the underlying reality Assembly can provide 'pseudoinstructions'

e.g., e.g.,

destination register is no longer first

move $t0, $t1 exists only in Assembly would be implemented using add $t0,$t1,$zero

When considering performance you should count real li instructions! t ti !

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1 . Im m e d ia te a d d re s sin g op rs rt

MIPS addressing modes

Im m e d ia te op rs rt rd . .. fu n c t R e g is te rs R e g is te r

2 . R e g is te r a d d r e ss in g

3 . B a s e a d d r e s s in g op rs rt A d dress M emory

R e g iste r

B y te

H a lfw o r d

W o rd

4 . P C -re la tive a d d re ss in g op rs rt A d dress M emory

PC

W o rd

5 . P se u d o d ir e ct a d d r e s s in g op A d d re ss M emory

PC

W o rd
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More complex stuff

Inequalities Whil statement While t t t Case/Switch statement Procedure

leaf non-leaf / recursive

Stack Memory layout Ch Characters, t Strings St i Arrays versus Pointers

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Inequalities

We have: beq, bne, what about Branch-if-less-than? New instruction:

if slt $t0, $s1, $s2 $s1 < $s2 then $t0 = 1 else $t0 = 0

Can use this instruction to build "blt $s1, $s2, Label"

blt is pseudo instruction you can now build general y g control structures

Note that the assembler needs a register to do this, use conventions for registers

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While statement
while (save[i] == k) i=i+j;

Registers allocation: i $s3 base of save[] $s6 k $s5

# calculate address of # save[i]

Loop:

muli add lw bne add j

$t1,$s3,4 $t1,$t1,$s6 $t0,0($t1) $t0 $t0,$s5,Exit $s5 Exit $s3,$s3,$s4 Loop

sll $t1,$s3,2

Exit:

Faster alternative l i
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Case/Switch statement
C Code switch (k) case 0: case 1: case 2: case 3: } { f=i+j; . break; ...............; ...............; ; ...............;

Assembler Code (see book CD for real MIPS code): 1. test if k inside 0-3 2. calculate address of jump table location 3. fetch jump address and jump 4. code for all different cases (with labels L0-L3) L0 L3)

jump table address L0 address L1 address L2 address L3

Note: earlier we showed a different solution for a Pentium/AMD

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MIPS machine code for function calls

$sp is one of the 32 registers. It is designated to be the stack

p pointer. . It contains the memory m m y address of f the top p of f the stack of f used addresses. The stack is inverted: it grows from high to low. call the arguments, arguments and registers that need to Before a subroutine call, be saved are pushed on the stack:
sub sw sw sw $sp, $t1 $t1, $t0, $s0, $sp, 12 8($ 8($sp) ) 4($sp) 0($sp # # # # adjust the stack to make room copy th the argument t i in register i t copy the argument in register copy the argument in register for $t1 $t0 $s0 3 words t to stack t k to stack to stack

The special p instruction jal j jumps p to the subroutine (function), ( ) and at the same time stores the return address in register $ra The return address in $ra is the current value of the program counter + 4.
jal my_function j $ra add $sp, $sp, 12 # store PC+4 in $a, jump to routine my_function # return from function call # adjust the stack pointer, freeing memory.
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Using a Stack
low address em mpty Save $s0 and $s1: subi $sp,$sp,8 sw sw $s0,4($sp) , ( p) $s1,0($sp)

$sp filled Restore $s0 and $s1: lw high address lw $s0,4($sp) $s1,0($sp)

addi $sp,$sp,8 Convention: $ti registers do not have to be saved and restored by callee; They are scratch registers.
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Compiling a leaf Procedure

C code int leaf_example (int g, int h, int i, int j) { int f; f = (g+h)-(i+j); ret rn f return f; } Assembler code: leaf_example: - save registers changed by callee - code for e expression pression f = .... (g is in $a0, h in $a1, etc.) - put return value in $v0 - restore saved registers - return: jr $ra
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Compiling a non-leaf procedure

For non-leaf procedure the callee should: save arguments g registers g (if ( used) ) save return address ($ra) save callee used registers (from $s0-$s7 set) create stack space for local arrays and structures (if any) restore registers, registers saved at beginning beginning, before return (jr $ra) The caller should: save and restore caller life registers (from $t0-$t9) around d function f ti call ll (jal label)
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Compiling a non-leaf procedure

Factorial: n! = n* (n-1)! 0! = 1
C code of recursive factorial: int fact (int n) { if (n<1) return t 1 1; else return (n*fact(n-1)); }
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Compiling a non-leaf procedure

Assembler (callee) code for fact fact: subi sw sw slti beq addi addi jr L1: subi jal lw lw addi mul jr $sp,$sp,8 $ $ra,4($sp) 4($ ) $a0,0($sp) $t0,$a0,1 $t0,$zero,L1 $v0,$zero,1 $sp,$sp,8 $ra $a0,$a0,1 fact $a0,0($sp) $ra,4($sp) $sp,$sp,8 $v0,$a0,$v0 $ra # save return address # and d arg.register i a0 0 # test for n<1 # if n>= 1 goto L1 # return 1 #

# call fact with (n-1) # restore return address # and a0 (in right order!) # return n*fact(n-1)
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How does the stack look for fact(2) ?

low address
$a0 = 0 $ra = ... $a0 = 1 $ra = ... $a0 = 2 $ra = 108

Caller:
100 addi $a0,$zero,2 104 jal fact 108 ....

$sp

filled

high address

Note: no caller save regs ($ti) are used

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Beyond numbers: Characters

Characters are often represented using the ASCII standard ASCII = American Standard COde for Information Interchange g Note: value(a) - value(A) = 32 value(z) - value(Z) = 32

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Beyond numbers: Strings

A string is a sequence of characters Representation alternatives for aap:

including length field: 3aap separate length field delimiter at the end: aap0 (Choice of language C !!)

Example: procedure strcpy:

void strcpy (char x[], char y[]) { int i; i=0; while ((x[i]=y[i]) ((x[i] y[i]) != ! 0) /* copy and test byte */ / / i=i+1; }
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strcpy: MIPS assembly

strcpy: subi sw add L1: add lb add sb addi bne lw add1 dd1 jr $sp,$sp,4 $s0 $s0,0($sp) 0($sp) $s0,$zero,$zero $t1,$a1,$s0 $t2 $t2,0($t1) 0($t1) $t3,$a0,$s0 $t2,0($t3) $s0 $s0,$s0,1 $s0 1 $t2,$zero,L1 $s0,0($sp) $ $sp,$sp,4 $ 4 $ra

# # # # #

i=0 address of y[i] load byte y[i] in $t2 similar address for x[i] store byte y[i] into x[i]

# if y[i]!=0 go to L1 # restore old $s0

Note: strcpy is a leaf-procedure; no saving of args and return address required

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Arrays versus pointers

Array version (initializing array to 0):
clear1 (int array[], int size) { int i; for (i=0; i<size; i=i+1) array[i]=0; }

Pointer version:
clear2 (int *array, int size) { int *p; for (p=&array[0]; p<&array[size]; p=p+1) *p=0; }
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Arrays versus pointers

Compare the assembly results in your book N t the Note th size i of f the th l loop b body: d

Array version: 7 instructions Pointer version: 4 instructions

Pointer version much faster ! Clever compilers perform pointer conversion themselves

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