Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                

NR Set No. 2

Download as pdf or txt
Download as pdf or txt
You are on page 1of 4

Code No: NR220501 NR Set No.

2
II B.Tech II Semester Examinations,December 2010
COMPUTER ORGANISATION
Common to Information Technology, Electronics And Computer
Engineering, Computer Science And Engineering, Computer Science And
Systems Engineering
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks

1. (a) What is the necessity of I/O modules. Explain
(b) What type of commands an I/O interface may receive? Explain. [8+8]
2. (a) Draw a owchart that describes the CPU-I/O Channel communication.
(b) Describe Interrupt Cycle. [10+6]
3. (a) List the micro-operations required to carryout the following instructions.
Assume a simple CPU with single accumulator.
i. Load accumulator
ii. Store accumulator
iii. Add to accumulator
iv. Complement accumulator
(b) What is ICC? What for ICC is used? [12+4]
4. Write the instruction format of POWER-PC processor and explain clearly giving
all signicant features of format design considering all type of instructions. [16]
5. (a) Clearly distinguish between
i. Packed/Unpacked microinstructions
ii. Hard/Soft microprogramming
(b) List and briey explain applications of microprogramming. [10+6]
6. (a) What do you mean by page fault?
(b) Explain how number of page faults can be calculated for the given page trace
using FIFO page replacement strategy. (Assume 3 frames are available in the
memory). [6+10]
7. (a) Compare SRAM with DRAM
(b) Why are the multilevel memories used in a computer system ? [8+8]
8. (a) Describe an instruction execution using a state diagram.
(b) Describe a program of ow of control without and with interrupts.
[8+8]

1
Code No: NR220501 NR Set No. 4
II B.Tech II Semester Examinations,December 2010
COMPUTER ORGANISATION
Common to Information Technology, Electronics And Computer
Engineering, Computer Science And Engineering, Computer Science And
Systems Engineering
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks

1. Write the instruction format of POWER-PC processor and explain clearly giving
all signicant features of format design considering all type of instructions. [16]
2. (a) What is the necessity of I/O modules. Explain
(b) What type of commands an I/O interface may receive? Explain. [8+8]
3. (a) Compare SRAM with DRAM
(b) Why are the multilevel memories used in a computer system ? [8+8]
4. (a) Clearly distinguish between
i. Packed/Unpacked microinstructions
ii. Hard/Soft microprogramming
(b) List and briey explain applications of microprogramming. [10+6]
5. (a) Describe an instruction execution using a state diagram.
(b) Describe a program of ow of control without and with interrupts.
[8+8]
6. (a) List the micro-operations required to carryout the following instructions.
Assume a simple CPU with single accumulator.
i. Load accumulator
ii. Store accumulator
iii. Add to accumulator
iv. Complement accumulator
(b) What is ICC? What for ICC is used? [12+4]
7. (a) What do you mean by page fault?
(b) Explain how number of page faults can be calculated for the given page trace
using FIFO page replacement strategy. (Assume 3 frames are available in the
memory). [6+10]
8. (a) Draw a owchart that describes the CPU-I/O Channel communication.
(b) Describe Interrupt Cycle. [10+6]

2
Code No: NR220501 NR Set No. 1
II B.Tech II Semester Examinations,December 2010
COMPUTER ORGANISATION
Common to Information Technology, Electronics And Computer
Engineering, Computer Science And Engineering, Computer Science And
Systems Engineering
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks

1. Write the instruction format of POWER-PC processor and explain clearly giving
all signicant features of format design considering all type of instructions. [16]
2. (a) Draw a owchart that describes the CPU-I/O Channel communication.
(b) Describe Interrupt Cycle. [10+6]
3. (a) Clearly distinguish between
i. Packed/Unpacked microinstructions
ii. Hard/Soft microprogramming
(b) List and briey explain applications of microprogramming. [10+6]
4. (a) What do you mean by page fault?
(b) Explain how number of page faults can be calculated for the given page trace
using FIFO page replacement strategy. (Assume 3 frames are available in the
memory). [6+10]
5. (a) What is the necessity of I/O modules. Explain
(b) What type of commands an I/O interface may receive? Explain. [8+8]
6. (a) Describe an instruction execution using a state diagram.
(b) Describe a program of ow of control without and with interrupts.
[8+8]
7. (a) Compare SRAM with DRAM
(b) Why are the multilevel memories used in a computer system ? [8+8]
8. (a) List the micro-operations required to carryout the following instructions.
Assume a simple CPU with single accumulator.
i. Load accumulator
ii. Store accumulator
iii. Add to accumulator
iv. Complement accumulator
(b) What is ICC? What for ICC is used? [12+4]

3
Code No: NR220501 NR Set No. 3
II B.Tech II Semester Examinations,December 2010
COMPUTER ORGANISATION
Common to Information Technology, Electronics And Computer
Engineering, Computer Science And Engineering, Computer Science And
Systems Engineering
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks

1. (a) Compare SRAM with DRAM
(b) Why are the multilevel memories used in a computer system ? [8+8]
2. (a) Clearly distinguish between
i. Packed/Unpacked microinstructions
ii. Hard/Soft microprogramming
(b) List and briey explain applications of microprogramming. [10+6]
3. (a) List the micro-operations required to carryout the following instructions.
Assume a simple CPU with single accumulator.
i. Load accumulator
ii. Store accumulator
iii. Add to accumulator
iv. Complement accumulator
(b) What is ICC? What for ICC is used? [12+4]
4. (a) Describe an instruction execution using a state diagram.
(b) Describe a program of ow of control without and with interrupts.
[8+8]
5. (a) What is the necessity of I/O modules. Explain
(b) What type of commands an I/O interface may receive? Explain. [8+8]
6. (a) What do you mean by page fault?
(b) Explain how number of page faults can be calculated for the given page trace
using FIFO page replacement strategy. (Assume 3 frames are available in the
memory). [6+10]
7. (a) Draw a owchart that describes the CPU-I/O Channel communication.
(b) Describe Interrupt Cycle. [10+6]
8. Write the instruction format of POWER-PC processor and explain clearly giving
all signicant features of format design considering all type of instructions. [16]

4

You might also like