103510-RF Amplifier For NXP Contactless Reader IC's

MFRC500, MFRC53x, CLRC632, SLRC400
RF Amplifier for NXP Contactless Reader IC's

Rev. 1.0 01 June 2007
AN103510
Application note
PUBLIC
Document information
Info
Content
Keywords
MIFARE, ICODE, MFRCxxx, RF Amplifier Design, Active Receiver

Design
Abstract
This application note describes the circuit of an external RF amplifier in

order to increase the reading distance of NXP contactless reader ICs.
NXP Semiconductors
Revision history
Rev
Date
Description
1.0
01.06.2007
Initial Version
Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
AN103510
Application note
NXP B.V. 2007. All rights reserved.
Rev. 1.0 01 June 2007
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NXP Semiconductors

1. Introduction
The aim of this document is to provide a solution to increase the RF output power of NXP
contactless reader ICs. The RF amplifier system described in this application note
provides linearity and allows the use of different modulation indexes. Moreover, it
supports a wide bandwidth and its power added efficiency is greater than 30%.
The RF amplifier circuit is designed for following NXP contacless reader ICs: SLRC400
[1], MFRC500 [2], MFRC530 [3], MFRC531 [4] and CLRC632 [5].
1.1 How to use this document

Section 2 shows the necessary blocks of the RF amplification system. Each of these
blocks is briefly explained in section 3. Section 4 contains a schematic of the overall
amplification system and some hints of how to develop an appropriate PCB. Section 5
shows how an external amplification circuitry can improve reader characteristics.
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2. RF Amplification System
The block diagram in Fig 1 shows the complete RF amplifier system placed between the
NXP contactless reader IC and the antenna. The system consists of a transmitting path
(blue) and a receiving path (red).
MFRC500
MFRC53x
CLRC632
SLRC400
TX1
EMCFilter
TX2
EMCFilter
RX
Amplifier
OA 2
RF Power A/B
Amplifier
RF Power A/B
Amplifier
13.56 MHz
Band-Stop Filter
Matching
Network
Matching
Network
ANTENNA
Buffer
OA 1
(1) This solution implements an active amplifier and filter for the receiver part
Fig 1. Block Diagram of RF Amplifier Solution
The main part of the RF amplifier stage in the transmitting path is built around a class
A/B RF amplifier working in a four-quadrant operation. It delivers the amplified current to
the antenna to generate a higher magnetic field.
A filter network before this RF amplifier stage acts as an EMC filter in order to attenuate
higher frequency components to form a sinusoidal waveform out of the square wave
signal coming from the contactless reader IC.
The receiver path is also accomplished by two parts, consisting on a 13.56 MHz
oscillator and a dual operational amplifier (OA). The oscillator acts as a band-stop filter
which decreases the 13.56 MHz carrier, such that the sideband levels can be better
amplified by the amplifier OA 2. OA 1 acts as a buffer amplifier which decouples the
signal from the antenna to the band-stop filter.
2.1 EMC Filter

The NXP contactless reader IC offers the output pins TX1 and TX2 which deliver square
wave signal shapes, where TX2 is phase delayed for 180 compared to TX1. These
signals are converted to sinusoidal waveforms by the EMC filters.
The EMC filter is directly connected to GND and TX1 and to GND and TX2 of the NXP
contactless reader IC. It consists of a series inductance and a parallel capacitance as
shown in Fig 2.
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NOTE: The amplitude of the signal will be increased because of the resonance effect of
the filter. This is desirable since it is the input signal for the A/B power amplifier. The
amplification of the voltage does not solely depend on the values for the coil and the
capacitor but also on the value of the input impedance of the A/B power amplifier. When
a 12V power supply is used, the peak-to-peak value for this signal must not exceed 10V
to prevent chipping.
TX1
L01
1
V1
2
C01
ZIN1
GND
L02
TX2
1
GND
C02
ZIN2
V2
Fig 2. EMC Filter
The filter is a low pass filter with a cut-off frequency of about 15MHz, which transforms
the rectangular signals coming from TX1 and TX2 into sinusoidal signals. The value of
the parallel capacitor is calculated with a predefined value for the cut-off frequency and
the coil.
C=
1
(2 f g ) 2 L
Assuming a value of 560nH for the inductor and 15.8MHz for the cut-off frequency the
required capacitance is determined to be 181pF.
C 01 =
(2 15.8 10 )
Table 1.
6 2
560 10 9
= 181 pF
Components of EMC Filter
Component
Value
C01, C02
Typically 0402, 0603 or 0805 SMD parts with low tolerance (< 2%).
NPO is required. The voltage limit has to be considered.
L01, L02
Typically a small inductance with high Q for general applications.

The frequency range and the maximum allowed current have to be
considered. This inductance should be magnetically shielded.
NOTE: Please refer to the application note [6] for details.

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2.2 RF Power A/B Amplifier

The 13.56MHz amplifier in Fig 3 is working in a four-quadrant operation using a pushpull A/B amplifier and 12V power supply (approximately 200mA required from the DC
source).
VCC
RE1
330
Q1
Q2N3904
D1
D1N4007
C1
Q2
Q3
Q4
Q2N3904
Q2N3904
Q2N3904
R1
R2
R3
R4
47
47
47
47
R5
R6
R7
R8
47
47
47
47
C2
V1
Vout1
100nF
D2
D1N4007
Q2N3906
Q2N3906
Q2N3906
100nF
Q2N3906
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
RE2
330
RE3
330
GND
Q2N3906
Q2N3906
Q2N3906
Q2N3906
R9
R10
R11
R12
47
47
47
47
R13
R14
R15
R16
47
47
47
47
Q2N3904
Q2N3904
Q2N3904
Q2N3904
Q13
Q14
Q15
Q16
D3
D1N4007
C3
C4
V2
Vout2
100nF
D4
D1N4007
RE4
330
100nF
VCC
Fig 3. Push-pull amplifier in A/B operation
The capacitors C1 to C4 are used to block the DC current and should have a value of
100nF to offer low resistance in the 13.56MHz region. D1 to D4 are 1N4007 diodes and
biasing the transistors Q1 to Q16. The resistors RE1 to RE4 build voltage dividers,
biasing the input signals on a 6V potential, which is half the supply voltage of this circuit.
The 47 resistors R1 to R16 synchronize the currents through the transistors, which may
differ due to manufacturing tolerances. Moreover, they match the output impedance of
the amplifier stage to the desired antenna impedance (approximately 25 for each path)
and they provide a current feedback which acts as temperature compensation.
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The collector currents of 2N3904 (NPN) and 2N3906 (PNP) transistors used in this
application are limited to 200mA. Thats why four of them are connected in parallel for
each stage, to increase the overall output current and withstand shorts and open loops.
Table 2.
Components of A/B Power Amplifier
Component
Value
C1C4
DC blocker, 100nF; (Ceramic NP0, tolerance 2%)
RE1RE4
330 (Small 0402, 0603 or 0805 SMD parts)
R1R16
47 (e.g. MRS25, 0.6W)
D1D4
1N4007
Q1Q4,
Q13Q16
2N3904 NPN Transistors or equivalent
Q5Q12
2N3906 PNP Transistors or equivalent
VCC
12V Power supply
2.3 Antenna Design & Matching

The sample antenna used in this application note is shown in Fig 4. The outline of the
rectangular antenna is approximately 10cm x 10cm. In order to match the antenna to
desired impedances some calculations for external passive components have to be
made.
The antenna must be connected to a network analyzer by using an appropriate test
fixture that does not influence the antenna parameters. The analyzer must be calibrated
(open, short and load calibration) and the test fixture compensated (electrical delay)
according to the instrument manual before each measurement.
Settings on the network analyzer:
S11, Chart: Smith Z
Start frequency: 1MHz
Stop frequency: above self-resonance frequency of the antenna
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A
GND
Fig 4. 2-coil antenna
The series equivalent properties as shown in Fig 5 of the antenna have to be measured
first, whereas
Rs Equivalent resistance at f = 1MHz
La Equivalent inductance at f = 1MHz
Rp Equivalent resistance at the self-resonance frequency
fres Self-resonance frequency of the antenna
RDC DC resistance
Rs
Ca
Rp
La
Fig 5. Parallel equivalent circuit for the 2-coil antenna
Measurement results for the sample antenna:
LA = 1.2364 H
RDC = 189m
f res = 23.75MHz
RP = 7.1345k
The parasitic capacitance of the antenna is calculated as follows:
CA =
1
1
=
= 36.34 pF
2
(2 f res ) L A 2 23.75 10 6 2 1.2364 10 6
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At an operating frequency of 13.56MHz the skin effect has an impact on the system and
further calculations. The k-factor, which stands in relation to carrier frequency and selfresonance frequency, is introduced to correct the results.
f res
23.75 10 6
=
= 1.32
f0
13.56 10 6
k=
Thus, the parallel equivalent resistance is determined to be:
R P ' = k R P = 1.32 7.1345 10 3 = 9417.5

The Q-factor of the antenna is either calculated by the series equivalent resistance Rs or
by the parallel equivalent resistance Rp.
Q=
LA
RS
RS =
RP '
LA
( L A )2
RP '
(2 13.56 10
=
1.2364 10 6
9417.5
6
= 1.178
The total series equivalent resistance is calculated by adding the DC resistance to the
series resistance RS:
RA = RDC + RS = 0.189 + 1.178 = 1.367
A
1
LA
CA
2
RA
B
Fig 6. Series equivalent circuit
Q=
LA
RA
2 13.56 10 6 1.2364 10 6
= 77.89
1.367
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A Q-factor of 78 for the sample antenna is too high for proximity reader applications. A
range of 8 to 15 is recommended in order to meet the ISO/IEC 14443-2 (2000) [7]
specification and to achieve best results for high data rate operations. Therefore, an
additional external damping resistor has to be added:
RExtern =
LA
2 13.56 106 1.2364 10 6

1.367 = 11.8
8
RA =
NOTE: For a symmetrical antenna the values of the capacitors will double and the values
of the resistors and inductors will be divided by two. Hence, the parallel equivalent
resistance for one half of the symmetrical antenna is determined as follows:
RP ,total =
(L )2
RS , SUM
6
6 1
2 13.56 10 1.2364 10
2
1.367 + 11.8
2
= 421.365
Fig 7 shows the matching network for the antenna. It consists of one serial and one
parallel capacitor for each branch. The values to be tuned are CM1 and CM2 in order to get
defined matching impedances (25 for each branch). The values of these components
can be estimated according to following equations:
CM1
CM 2
R IN R P ,total
1
L
A
2
1
2 13.56 10 25 421.365
6
114.357 pF
C1 C P 2 =
1
1.2364 10
(2 13.56 10 6 ) 2
2
114.357 10 12 2 36.6 10 12
37.64 pF
NOTE: These calculated values for CM1 and CM2 are first order approximations since
the measurement of the antenna parameters cannot be done accurately. This is due to
the fact that the GND layer on the bottom side of the antenna builds an additional
parasitic capacitor which influences the measured values. However, it should help during
antenna tuning. The proper values have to be determined manually by testing and
measuring.
HINT: Start with the next lower value of the calculation of the conductance and then
increase until the desired impedance is achieved.
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Antenna
Matching Network
Vout1
CM1
Rextern/2
1
Loop1
CM2
2
GND
CM2
Loop2
Rextern/2
Vout2
Fig 7.
CM1
Matching network with C1 and C2
Since both amplifier branches are tuned to 25 and the antenna is symmetrical, the
differential input impedance can be estimated to be 50.
More detailed information about antenna matching and design can be found in [6].
2.4 Receiving Circuit

The receiving path in Fig 8 shows that an oscillator is used to attenuate the 13.56MHz
carrier signal in order to decrease the carrier to side-band level ratio.
R17 and R18 build a voltage divider to handle the high voltage levels of around 15V(PP)
at the antenna (RX_Antenna Pin). Afterwards, a 1:1 buffer amplifier (OA 1) decouples the
signal from the band-stop filter by converting a high impedance at the input to low
impedance at the output. The series resistor R22 is used to limit the current and the
resistor RQ defines the attenuation factor of the band-stop filter. A starting value of
approximately 100 for RQ is recommended. CQ is a tuning capacitance on the
frequency axis. Due to the fact that the carrier level is decreased, a second amplifier
stage (OA 2) can be used to amplify the sideband levels which also have been slightly
damped by the band-stop filter.
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Buffer
OA 1
13.56 MHz
Band-Stop Filter
VCC
R21
33
R25
10k
100n
5.2k
2
R18
1k
U1
GND
C7
R22
100n
330
C8
2
330
U2
R27
OUT
C9
1u
7
3
C5
V+
R17
4 V-
RX_Antenna
C6
1u
4 V- V+
R20
10k
Amplifier
OA 2
VCC
R26
33
OUT
CX1
1n
AD8055an/AD
100n
GND
6
RX1
820
Vmid
RX
RX2
AD8055an/AD
R28
Quarz2
13.56Meg
CQ
5-50p
10k
R19
560
2k
R23
10k
CX2
10k
R24
100n
GND
RQ
100
GND
GND
GND
GND
GND
Fig 8. Receiving circuit with Oscillator and Operational Amplifiers
The output signal of the second amplifier stage is added to a DC offset (Vmid of NXP
contactless reader IC) of 2.5V and fed into the RX pin of the IC.
NOTE: The output signal of the amplifier stage (OA 2) provides the received signal at the
RX pin of the reader IC. It must not exceed an determined peak-to-peak value since
higher values may cause receiving failures (e.g. 3 Vpp for CLRC632).
Table 3.
Components of the Receiving Circuit
Component
U1, U2
Value
Dual Operational Amplifier, Analog Devices AD8056 (two AD8055

in one SOIC housing)
R17
Voltage divider, 5.2k, (Small 0402, 0603 or 0805 SMD parts)
R18
Voltage divider, 1k, (Small 0402, 0603 or 0805 SMD parts)
R19, R20, R24, Voltage divider for offset voltage (6V), 10 k, (Small 0402, 0603 or
R25
0805 SMD parts)
R21, R26
33, (Small 0402, 0603 or 0805 SMD parts)
R22
R23
10k, (Small 0402, 0603 or 0805 SMD parts)
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Component
Value
R27
R28
RQ
1.2k, depending on the desired amplification factor, (Small 0402,

0603 or 0805 SMD parts)
100, depending on the desired attenuation factor, (Small 0402,
0603 or 0805 SMD parts)
13.56MHz oscillator
CQ
Variable capacitor, 5-50pF
C6, C9
Voltage stabilization, 1F, (Ceramic NP0, tolerance 2%)
C5, C7, C8
DC blocker, 100nF, (Ceramic NP0, tolerance 2%)
RX1
RX2
CX1
DC Blocker, 1nF, (Ceramic NP0, tolerance 2%)
CX2
Voltage stabilization, 100nF
VCC
12V Power supply
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3. Design of Overall System

3.1 Schematic
All above mentioned components will be connected to following schematic.
RF A/B POWER AMPLIFIER

RE1
330
Q1
EMC FILTER
Q2N3904
L01
V1
TX1
Q3
Q4
MATCHING
NETWORK
Q2N3904
Q2N3904
Q2N3904
R1
R2
R3
R4
47
47
47
47
R5
R6
R7
R8
47
47
47
47
Q2N3906
Q2N3906
Q2N3906
C2
Vout1
Rextern/2
CM1
2
560nH
100nF
D2
D1N4007
C01
180pF
Q2N3906
1
100nF
Loop1
CM2
Q5
Q6
Q7
Q8
Q10
Q11
Q12
Q17
RE2
330
TVSS
RE3
330
GND
Q2N3906
C02
180pF
D3
D1N4007
L02
C3
TX2
Q2N3906
Q2N3906
R9
R10
R11
R12
47
47
47
47
R13
R14
R15
R16
47
GND
CM2
Loop2
Q2N3906
Rextern/2
CM1
C4
2
560nH
V2
100nF
READER CHIP
D4
D1N4007
47
47
47
Q2N3904
Q2N3904
Q2N3904
Q2N3904
Q13
Q14
Q15
Q16
Vout2
RX_Antenna
100nF
R17
5.2k
VCC
RE4
330
R26
33
AD8055an/AD
100n
330
Q
13,56MHz
R24
10k
R23
10k
2k
100n
GND
GND
AMPLIFIER OA 2
GND
C5
U1
+
3
100n
OUT
4
2
R19
10k
R18
1k
CQ
5-50p
RQ
100
CX2
100nF
GND
C7
6
330
R28
RX2
560
R22
C8
RX
Vmid
GND
R27
R20
10k
V+
V+
OUT
V-
RX1
820
1n
C6
1u
U2
V-
RC 632
R21
33
R25
10k
GND
CX1
VCC
VCC
C9
1u
ANTENNA
D1
D1N4007
C1
Q2
VCC
GND
13.56 MHz
BAND-STOP FILTER
AD8055an/AD
GND
GND
BUFFER OA1
Fig 9. Schematic of RF Amplifier and Receiver Stage
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3.2 Layout
Hints for the design:
The supply voltage should be EMC refined with suitable capacitors.
Spatial separation of the amplifier system and antenna is possible.
Keep tracks short.
Flood the prints with GND layers to avoid loops.
Do not connect the virtual GND of the antenna to the GND of the supply voltage to
avoid common-mode currents.
The following plot Fig 10 shows top layer and bottom layer of a sample print board of the
amplification system.
Fig 10. Top (red) and Bottom (blue) layer for the RF Amplifier System
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4. Results
The following diagrams in Fig 11 shows how the RF amplifier circuitry can improve
proximity reader characteristics.
The magnetic field strength shown in Fig 11 has been increased by the amplification
system compared to the original system described in [6]. The reading distance for
1.5A/m, measured under maximum card loading conditions [8], was increased by 50%.
NOTE: In this case the Q-factor of the antenna in the original system is approximately
twice as high as for the sample antenna used in cooperation with the amplification
system.
H-Field Measurement at Room Temperature

Original vs Amplified
5,0
4,5
4,0
H-Field in A/m (rms)
3,5
3,0
Original H-Field
2,5
Amplified H-Field
2,0
1,5
1,0
0,5
0,0
0
20
40
60
80
100
120
140
Distance in mm to Antenna surface
Fig 11. H-Field versus Reading Distance in mm to the Antenna Surface
Another important feature of the amplification system is that signal shapes according to
ISO/IEC 14443-2 (2000) [7] can be easily achieved as shown in Fig 12.
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Fig 12. Pulse shape for 106 kbit/s (left) and 848 kbit/s (right) both Type-A
The amplification system offers linearity allowing proper ISO/IEC 14443-2 (2000) [7]
Type-B data transmission with standard settings of the reader chip.
Fig 13. Type-B Communication
The sideband level sensitivity must not exceed the limit given in the standard ISO/IEC
CD 14443-2 (2007) [9] for a given value of the field strength. The next plot Fig 14 proofs
that the requirement can be easily met.
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H-Field vs Sensitivity
20,0
18,0
Standard
Upper Sideband Level
16,0
Lower Sideband Level

Sensitivity in mVpp
14,0
12,0
10,0
8,0
6,0
4,0
2,0
0,0
0,0
0,5
1,0
1,5
2,0
2,5
3,0
3,5
4,0
4,5
5,0
H-Feld in A/m
Fig 14. Measured Sensitivity versus H-Field
NOTE: The higher the H-field in the transmitting path, the higher the sensitivity of the
receiving path in order to achieve data transmission and reception in desired quality.
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5. References
[1]
Data Sheet; SL RC400 I Code Reader IC
[2]
MIFARE MF RC500; Highly Integrated ISO 14443A Reader IC
[3]
MIFARE MF RC 530 ISO14443A reader IC
[4]
MIFARE MF RC531; ISO 14443 reader IC
[5]
MIFARE and ICODE CL RC632 Multiple protocol contact less reader IC
[6]
Directly Matched Antenna Design, Application Note
[7]
ISO/IEC 14443-2 (2000)
[8]
ISO10373-6 Identification cards Test methods part 6: Proximity cards
[9]
ISO/IEC CD 14443-2 (2007)
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6. Legal information
6.1 Definitions
Draft The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences
of use of such information.
6.2 Disclaimers
General Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations
or warranties, expressed or implied, as to the accuracy or completeness of
such information and shall have no liability for the consequences of use of
such information.
Right to make changes NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of a NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is for the customers own risk.
Applications Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
6.3 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are property of their respective owners.
MIFARE is a trademark of NXP B.V.
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7. Contents
1.
1.1
2.
2.1
2.2
2.3
2.4
3.
3.1
3.2
4.
5.
6.
6.1
6.2
6.3
7.
Introduction .........................................................3
How to use this document ..................................3
RF Amplification System ....................................4
EMC Filter ..........................................................4
RF Power A/B Amplifier......................................6
Antenna Design & Matching...............................7
Receiving Circuit ..............................................11
Design of Overall System .................................14
Schematic ........................................................14
Layout ..............................................................15
Results ...............................................................16
References .........................................................19
Legal information ..............................................20
Definitions ........................................................20
Disclaimers.......................................................20
Trademarks ......................................................20
Contents.............................................................21
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in the section 'Legal information'.

For more information, please visit: http://www.nxp.com
For sales office addresses, email to: salesaddresses@nxp.com
Date of release: 01 June 2007
Document identifier: AN103510

103510-RF Amplifier For NXP Contactless Reader IC's

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103510-RF Amplifier For NXP Contactless Reader IC's

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Copyright:

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103510-RF Amplifier For NXP Contactless Reader IC's

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Copyright:

Available Formats

MFRC500, MFRC53x, CLRC632, SLRC400

RF Amplifier for NXP Contactless Reader IC's

MIFARE, ICODE, MFRCxxx, RF Amplifier Design, Active Receiver

This application note describes the circuit of an external RF amplifier in

MFRC500, MFRC53x, CLRC632, SLRC400

RF Amplifier for NXP Contactless Reader IC's

NXP B.V. 2007. All rights reserved.

Rev. 1.0 01 June 2007

MFRC500, MFRC53x, CLRC632, SLRC400

1.1 How to use this document

NXP B.V. 2007. All rights reserved.

Rev. 1.0 01 June 2007

MFRC500, MFRC53x, CLRC632, SLRC400

RF Amplifier for NXP Contactless Reader IC's

Fig 1. Block Diagram of RF Amplifier Solution

2.1 EMC Filter

NXP B.V. 2007. All rights reserved.

Rev. 1.0 01 June 2007

MFRC500, MFRC53x, CLRC632, SLRC400

RF Amplifier for NXP Contactless Reader IC's

Fig 2. EMC Filter

Components of EMC Filter

Typically a small inductance with high Q for general applications.

NOTE: Please refer to the application note [6] for details.

NXP B.V. 2007. All rights reserved.

Rev. 1.0 01 June 2007

MFRC500, MFRC53x, CLRC632, SLRC400

RF Amplifier for NXP Contactless Reader IC's

2.2 RF Power A/B Amplifier

Fig 3. Push-pull amplifier in A/B operation

NXP B.V. 2007. All rights reserved.

Rev. 1.0 01 June 2007

MFRC500, MFRC53x, CLRC632, SLRC400

RF Amplifier for NXP Contactless Reader IC's

Components of A/B Power Amplifier

DC blocker, 100nF; (Ceramic NP0, tolerance 2%)

330 (Small 0402, 0603 or 0805 SMD parts)

47 (e.g. MRS25, 0.6W)

2N3904 NPN Transistors or equivalent

2N3906 PNP Transistors or equivalent

12V Power supply

2.3 Antenna Design & Matching

NXP B.V. 2007. All rights reserved.

Rev. 1.0 01 June 2007

MFRC500, MFRC53x, CLRC632, SLRC400

RF Amplifier for NXP Contactless Reader IC's

Fig 4. 2-coil antenna

Fig 5. Parallel equivalent circuit for the 2-coil antenna

Measurement results for the sample antenna:

NXP B.V. 2007. All rights reserved.

Rev. 1.0 01 June 2007

MFRC500, MFRC53x, CLRC632, SLRC400

RF Amplifier for NXP Contactless Reader IC's

Thus, the parallel equivalent resistance is determined to be:

R P ' = k R P = 1.32 7.1345 10 3 = 9417.5

RA = RDC + RS = 0.189 + 1.178 = 1.367

Fig 6. Series equivalent circuit

NXP B.V. 2007. All rights reserved.

Rev. 1.0 01 June 2007