Topology Investigation for Front End DC/DC

Power Conversion for Distributed Power System

Bo Yang

Dissertation submitted to the Faculty of the

Virginia Polytechnic Institute and State University
in partial fulfillment of the requirements for the degree of

Doctor of Philosophy
in
Electrical Engineering

Fred C. Lee, Chairman

Dushan Boroyevich Jason Lai

Guo-Quan. Lu Alex Q. Huang

September 12, 2003

Blacksburg, Virginia

Keywords: distributed power system, DC/DC converter, integrated

magnetic, small signal model, resonant converter

Copyright 2003, Bo Yang

 Topology Investigation for Front End DC/DC Power
Conversion for Distributed Power System
by
Bo Yang
Fred C. Lee, Chairman
Electrical engineering
(Abstract)
With the fast advance in VLSI technology, smaller, more powerful digital
system is available. It requires power supply with higher power density, lower
profile and higher efficiency. PWM topologies have been widely used for this
application. Unfortunately, hold up time requirement put huge penalties on the
performance of these topologies. Also, high switching loss limited the power
density achievable for these topologies.

Two techniques to deal with hold up time issue are discussed in this
dissertation: range winding solution and asymmetric winding solution, the
efficiency at normal operation point could be improved with these methods. To
reduce secondary rectifier conduction loss, QSW synchronous rectifier is
developed, which also helps to achieve ZVS for symmetrical half bridge
converter.

Although with these methods, the efficiency of front end DC/DC converter
could be improved, the excessive switching loss prohibited higher switching
frequency. To achieve the targets, topologies with high switching frequency and
high efficiency must be developed.

Three resonant topologies: SRC, PRC and SPRC, are been investigated for
this application because of their fame of low switching loss. Unfortunately, to
design with hold up requirement, none of them could provide significant
improvements over PWM converter.
 Although the negative outcome, the desired characteristic for front end
application could be derived. Base on the desired characteristic, a thorough search
is performed for three elements resonant tanks. LLC resonant topology is found to
posses the desired characteristic. From comparison, LLC resonant converter could
reduce the total loss by 40% at same switching frequency. With doubled
switching frequency, efficiency of LLC resonant converter is still far better than
PWM converters.

To design the power stage of LLC resonant converter, DC analysis is

performed with two methods: simulation and fundamental component
simplification. Magnetic design is also discussed. The proposed integrated
magnetic structure could achieve smaller volume, higher efficiency and easy
manufacture.

To make practical use of the topology, over load protection is a critical issue.
Three methods to limit the stress under over load situation are discussed. With
these methods, the converter could not only survive the over load condition, but
also operate for long time under over load condition.

Next small signal characteristic of the converter is investigated in order to

design the feedback control. For resonant converter, state space average method is
no longer valid. Two methods are used to investigate the small signal
characteristic of LLC resonant converter: simulation and extended describing
function method. Compare with test results, both methods could provide
satisfactory results. To achieve both breadth and depth, two methods are both
used to reveal the myth. With this information, compensator for feedback control
could be designed.

Test circuit of LLC resonant converter was developed for front end DC/DC
application. With LLC topology, power density of 40W/in3 could be achieved
compare with 15W/in3 for PWM converter.

iii
 To My Wife
Qiaoqiao

iv
 Bo Yang Acknowledgement

ACKNOWLEDGMENT

I would like to thank my advisor, Dr. Fred C. Lee. Till today, I am still

amused by his great intuition, broad knowledge and accurate judgment. The most

precious thing I learned from him is the attitude toward research, which can be

applied to every aspects of life too. Without his guidance and challenging, I will

never be able to achieve this.

I am grateful to my committee: Dr. Dushan Boroyevich, Dr. Jason Lai, Dr.

Alex Q. Huang and Dr. Guo Q. Lu, and Dr. Dan Y. Chen for their valuable

suggestions and numerous help.

It has been a great pleasure to work in the Center for Power Electronics

Systems (CPES). I would like to acknowledge the CPES administrative and

management staff, Ms. Teresa Shaw, Ms. Linda Gallagher, Ms. Trish Rose, Ms.

Ann Craig, Ms. Marianne Hawthome, Ms. Elizabeth Tranter, Ms. Lesli Farmer,

Mr. Robert Martin, Mr. Steve Z. Chen, Mr. Dan Huff, Mr. Gary Kerr, and Mr.

Jamie Evans for their countless help.

I would like to thank my colleagues, Dr. Qiong Li, Dr. Xunwei Zhou, Dr.

Pitleong Wong, Dr. Richard Zhang, Dr. Kun Xing, Dr. Jindong Zhang,

Dr.Fengfeng Tao, Dr. Weiyun Chen, Mr. David Wen, Mr. Deng-Ming Peng, Mr.

Zhou Chen, Mr. Yuanxuan Hu, Dr. Yong Li, Mr. Wenkang Huang, Dr. Sihua

Wen, Mr. Rengang Chen, Miss Jinghong Guo, Mr. Wei Xu, Mr. Zhenxue Xu, Dr.

v
 Bo Yang Acknowledgement

Ming, Xu, Mr. Ho-Pu Wu, Mr. Xiaowu Sun, Mr. Kaiwei Yao, Mr. Yuhui Chen,

Mr. Mao Ye, Mr. Yu Meng, Mr. Yuancheng Ren, Prof. Wei Chen and Prof.

Xiaochuan Jia. Their friendships and help have made my stay at CPES pleasant

and enjoyable.

I am especially indebted to my teammates in the DPS group, Dr. Peter

Barbosa, Dr. Qun Zhao, Dr. Francisco Canales, Dr. Wei Dong, Mr. Bing Lu, Mr.

Yang Qiu, Mr. Liyu Yang, Miss Manjing Xie, Miss Juanjuan Sun, Miss Tina

Sang, and Mr. Dianbo Fu. It was a pleasure to work with such a talented, hard-

working and creative group.

My heartfelt appreciation goes toward my father, Huairui Yang, who has

always encouraged me to pursue higher education. I also want thank my sister,

Jing, for her love and support to me.

With deepest love, I would like to thank my wife, Qiaoqiao, who has always

been there with her love, support, understanding and encouragement for all my

endeavors.

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Bo Yang Table of content

TABLE OF CONTENT
Chapter 1 Introduction.................................................................................... 1
1.1 Background and Objectives.......................................................................................................... 1
1.2 State of the art topologies ............................................................................................................. 6
1.3 Outline of dissertation................................................................................................................. 11
Chapter 2 State of the art topologies and improvements ........................... 18
2.1 Introduction................................................................................................................................... 18
2.2 State of the art topologies and issues ........................................................................................ 19
2.3 Issue with hold up time requirement......................................................................................... 28
2.4 Range winding for wide input range......................................................................................... 36
2.5 Asymmetrical Winding Asymmetrical Half Bridge............................................................... 44
2.6 QSW Synchronous Rectification............................................................................................... 54
2.7 Summary and issues .................................................................................................................... 67
Chapter 3 Integrated Power Electronics Module ....................................... 72
3.1 Introduction................................................................................................................................... 72
3.2 Integrated Power Electronics Module for Front end DC/DC............................................... 75
3.3 Performance evaluation............................................................................................................... 85
3.4 Summary ........................................................................................................................................ 92
Chapter 4 LLC Resonant Converter............................................................ 94
4.1 Introduction................................................................................................................................... 94
4.2 Three traditional resonant topologies ....................................................................................... 95
4.3 LLC resonant converter............................................................................................................. 106
4.4 Operation of LLC resonant converter..................................................................................... 109
4.5 Power stage parameter design of LLC resonant converter................................................. 117
4.6 Extension of LLC resonant topology...................................................................................... 133
4.7 High frequency operation......................................................................................................... 135
4.8 Summary ...................................................................................................................................... 140
Chapter 5 Improvements of LLC Resonant Converter ........................... 142
5.1 Magnetic design for LLC Resonant Converter..................................................................... 142
5.2 Over load protection for LLC resonant converter................................................................ 161
5.3 Integrated power electronics module for LLC ...................................................................... 180
5.4 Summary ...................................................................................................................................... 185
Chapter 6 Small signal analysis and control design of LLC converter .. 187
6.1 Introduction................................................................................................................................. 187
6.2 Extended Describing Function analysis ................................................................................. 191
6.3 Time domain simulation method............................................................................................. 195
6.4 Impact of circuit parameters..................................................................................................... 218
6.5 Test verification.......................................................................................................................... 227
6.6 Compensator design for LLC resonant converter................................................................. 229
6.7 Summary ...................................................................................................................................... 236
Chapter 7 Summary and Future Work ..................................................... 237
7.1 Summary ...................................................................................................................................... 237
7.2 Future work................................................................................................................................. 243
Appendix A. Two and Three Components Resonant Tanks .................... 247
A.1. Two resonant components resonant tank............................................................................... 248
A.2. Three resonant components resonant tank............................................................................. 252
Appendix B Operation modes and DC analysis of LLC resonant converter
269
B.1. Operating modes of LLC resonant converter in Region 1 .................................................. 270

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Bo Yang Table of content

B.2. Operating modes of LLC resonant converter in Region 2 .................................................. 276

B.3. Operating modes of LLC resonant converter in Region 3 .................................................. 282
B.4. DC analysis of LLC resonant converter................................................................................. 284
Appendix C. Small signal characteristic of SRC converter...................... 289
Appendix D. LLC converter model for EDF analysis ............................... 293
D.1. Process of building LLC circuit model for EDF analysis ................................................... 293
D.2. LLC resonant converter model ................................................................................................ 304
Reference ...................................................................................................... 309
Vita ..................................................................................................................... 317

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 Bo Yang List of illustrations

LIST OF ILLUSTRATIONS

Figure 1.1. Distributed power system structure.......................................................................................... 2

Figure 1.2. Trend for server system power level........................................................................................ 4
Figure 1.3. Trend for AC/DC power supply for server............................................................................. 5
Figure 1.4. Trend toward lower profile system .......................................................................................... 5
Figure 1.5. Two stage structure of front-end converter............................................................................. 6
Figure 1.6 Primary inverter topologies ........................................................................................................ 7
Figure 1.7 Secondary rectifier topologies.................................................................................................... 7
Figure 1.8 The state of the art front-end system......................................................................................... 9
Figure 2.1. Two-switch forward converter and operating waveforms .................................................. 20
Figure 2.2. Full bridge converter and operating waveforms .................................................................. 22
Figure 2.3. Schematic of half bridge converter........................................................................................ 24
Figure 2.4. Operating waveforms of symmetrical half bridge converter............................................. 24
Figure 2.5. Operating waveforms of asymmetrical half bridge converter........................................... 25
Figure 2.6. Asymmetrical half bridge with current doubler and waveforms ....................................... 26
Figure 2.7. Loss comparison of three state of the art topologies........................................................... 27
Figure 2.8. Output filter inductor volt-sec comparison of three topologies......................................... 28
Figure 2.9. Capacitance for hold up time and DC bus voltage after hold up time ............................. 30
Figure 2.10. Duty cycle range for asymmetrical half bridge with hold up requirement.................... 31
Figure 2.11. Secondary rectifier voltage and current stress for asymmetrical half bridge................ 32
Figure 2.12. Test efficiency of asymmetrical half bridge....................................................................... 33
Figure 2.13. Duty cycle range for full bridge converter with hold up requirement ........................... 34
Figure 2.14. Circulating current of full bridge with different input voltage........................................ 35
Figure 2.15. Asymmetrical half bridge converter with range winding................................................. 37
Figure 2.16 Circuit diagram for normal operation ................................................................................... 38
Figure 2.17 Circuit diagram for hold up operation .................................................................................. 38
Figure 2.18 Duty cycle range comparison of asymmetrical half bridge with/without range switch
.................................................................................................................................................................. 40
Figure 2.19 Diode voltage stress comparison........................................................................................... 41
Figure 2.20 Diode average current comparison........................................................................................ 41
Figure 2.21 Primary switch RMS current comparis on............................................................................ 42
Figure 2.22 Primary switch turn off current comparison........................................................................ 42
Figure 2.23 Test setup for range winding asymmetrical half bridge .................................................... 43
Figure 2.24 Test efficiency at normal operation for range winding solution...................................... 43
Figure 2.25 Range winding for (a) Full bridge (b) current doubler...................................................... 44
Figure 2.26 Half bridge current doubler with (a) one transformer and (b) Two transformers ......... 45
Figure 2.27 Topology transformation of current doubler....................................................................... 46
Figure 2.28 DC characteristic for different np ratio................................................................................. 47
Figure 2.29 Duty cycle range with different turn ratios.......................................................................... 48
Figure 2.30 Operation waveforms of (a) asymmetrical half bridge and (b) asymmetrical winding
asymmetrical half bridge ..................................................................................................................... 50
Figure 2.31 Diode voltage stress for asymmetrical winding asymmetrical half bridge .................... 51
Figure 2.32 Diode current stress for asymmetrical winding asymmetrical half bridge..................... 51
Figure 2.33 Output current ripple for asymmetrical winding asymmetrical half bridge................... 52
Figure 2.34 Test circuit diagram of asymmetrical winding asymmetrical half bridge ...................... 53
Figure 2.35 Test waveforms of asymmetrical winding asymmetrical half bridge ............................. 53
Figure 2.36 Test efficiency of asymmetrical winding asymmetrical half bridge ............................... 53
Figure 2.37 Rectifier diode voltage stress of different topologies ........................................................ 55
Figure 2.38 Conduction loss comparison of different devices............................................................... 55
Figure 2.39 Rectifier diodes current stress for asymmetrical winding asymmetrical half bridge ... 57
Figure 2.40 Conduction loss comparison of 200V diode and MOSFET ............................................. 57

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 Bo Yang List of illustrations

Figure 2.41 Circuit diagram of half bridge current doubler with synchronous rectifier.................... 58
Figure 2.42 Test waveform of synchronous rectifier for front end converter' .................................... 58
Figure 2.43 Operation waveform of synchronous rectifier for front-end converter........................... 59
Figure 2.44 Operation waveform of QSW synchronous rectifier.......................................................... 60
Figure 2.45 Operating mode 1 of half bridge with synchronous rectifier............................................ 61
Figure 2.46 Operating mode 2 of half bridge with synchronous rectifier............................................ 61
Figure 2.47 Operating mode 3 of half bridge with synchronous rectifier............................................ 61
Figure 2.48 Operating mode 4 of half bridge with synchronous rectifier............................................ 62
Figure 2.49 Operating mode 5 of half bridge with synchronous rectifier............................................ 62
Figure 2.50 Primary loss comparison of QSW and conventional synchronous rectifier................... 64
Figure 2.51 Test circuit of QSW synchronous rectifier .......................................................................... 64
Figure 2.52 Test waveform of QSW synchronous rectifier at light load ............................................. 65
Figure 2.53 Test waveform of QSW synchronous rectifier at heavy load........................................... 65
Figure 2.54 Test efficiency of half bridge with QSW synchronous rectifier...................................... 66
Figure 2.55 Full bridge with QSW synchronous rectifier....................................................................... 66
Figure 2.56 Efficiency comparison of different methods....................................................................... 67
Figure 2.57. Primary switch total loss for different switching frequency............................................ 69
Figure 2.58 Half bridge converter with snubber circuit .......................................................................... 69
Figure 2.59 Test waveform with and without snubber circuit ............................................................... 70
Figure 2.60 Prototype of 200kHz asymmetrical half bridge with discrete components.................... 70
Figure 3.1 Totem pole switches with parasitic inductance and Q2 Vds (100V/div).......................... 73
Figure 3.2 Impact of gate loop parasitic .................................................................................................... 74
Figure 3.3 Schematic of front end DC/DC with asymmetrical half bridge current doubler............. 75
Figure 3.4 System partitioning of front end DC/DC converter.............................................................. 77
Figure 3.5 (a) D2BGA IGBT chip-scale package, (b) schematic of FCOF power switching stage
module structure, and (c) FCOF power switching module prototype. ........................................ 78
Figure 3.6 (a) Schematic of Dimple Array Interconnect, (b) integrated DAI power switching stage
module, and (c) prototype Dimple Array Interconnect power switching stage module........... 79
Figure 3.7 (a) Schematic integration structure of emb edded power module and (b) circuit diagram
.................................................................................................................................................................. 81
Figure 3.8 Assembly process of embedded power module: (a) top view of embedded power stage,
(b) back view of embedded power stage, (c) components attachment on top, (d) patterned
DBC for base substrate, (e) soldered on substrate, and (f) final encapsulated module. ........... 82
Figure 3.9 (a) Spiral integrated LC structure with distributed capacitance and possible external
connection configurations, (b) simplified equivalent circuit, and (c) exploded view............... 83
Figure 3.10 Magnetic integrated for asymmetrical half bridge converter............................................ 84
Figure 3.11 Planar integrated magnetic for current doubler rectifier.................................................... 84
Figure 3.12 Explored view and photo of passive IPEM ......................................................................... 85
Figure 3.13 Gate charge curve of IXFH21N50 (a) Datasheet, (b) simulated...................................... 86
Figure 3.14 V/I characteristic of IXFH21N50 (a) datasheet and (b) simulated.................................. 87
Figure 3.15 Parasitic of (a) discrete MOSFET and (b) Active IPEM ................................................... 87
Figure 3.16 Simulation waveforms of Q1 drain source voltage (a) Discrete, and (b) IPEM ........... 88
Figure 3.17 Active IPEM turn-off loss reduction..................................................................................... 89
Figure 3.18 Voltage overshoots improvement by IPEM ........................................................................ 89
Figure 3.19 Photos of three prototypes to be compared (a) discrete design, (b) integrated magnetic
design and (c) Passive IPEM design.................................................................................................. 90
Figure 3.20 Test efficiency of three prototypes........................................................................................ 90
Figure 3.21 Temperature test setup for three prototypes ........................................................................ 91
Figure 4.1 Half Bridge Series Resonant Converter.................................................................................. 96
Figure 4.2 DC characteristic and operating region of SRC.................................................................... 97
Figure 4.3 Simulation waveforms of SRC................................................................................................. 97
Figure 4.4 Half bridge parallel resonant converter.................................................................................. 99
Figure 4.5 DC characteristic and operating region of PRC.................................................................. 100

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 Bo Yang List of illustrations

Figure 4.6 Simulation waveforms of PRC............................................................................................... 101

Figure 4.7 Half bridge series parallel resonant converter..................................................................... 103
Figure 4.8 DC characteristic and operating region of SPRC................................................................ 104
Figure 4.9 Simulation waveforms of SPRC............................................................................................ 104
Figure 4.10 LCC and LLC resonant tank................................................................................................ 107
Figure 4.11 DC characteristic of LCC resonant converter................................................................... 108
Figure 4.12 DC characteristic of LLC resonant converter.................................................................... 108
Figure 4.13 Half bridge LLC resonant converter................................................................................... 108
Figure 4.14 DC characteristic of LLC resonant converter.................................................................... 111
Figure 4.15 Three operating regions of LLC resonant converter........................................................ 111
Figure 4.16 Simulated operation waveforms in region 1 ...................................................................... 112
Figure 4.17 Simulation waveforms in region 2 ...................................................................................... 113
Figure 4.18 Circuit diagram during mode 1 in region 2........................................................................ 114
Figure 4.19 Circuit diagram during mode 2 in region 2........................................................................ 115
Figure 4.20 Circuit diagram during mode 3 in region 2........................................................................ 116
Figure 4.21 Operating region for design 1 .............................................................................................. 119
Figure 4.22 Simulation waveforms of design 1 with 300V and 400V input voltage....................... 119
Figure 4.23 Operating region for design 2 .............................................................................................. 120
Figure 4.24 Simulation waveforms of design 2 with 300V and 400V input voltage....................... 120
Figure 4.25 Operating region for design 3 .............................................................................................. 121
Figure 4.26 Simulation waveforms of design 3 with 300V and 400V input voltage....................... 121
Figure 4.27 Primary loss for three designs with Vin=400V................................................................. 122
Figure 4.28 Primary loss for three designs with Vin=360V................................................................. 123
Figure 4.29 Primary loss for three designs with Vin=300V................................................................. 123
Figure 4.30 Test circuit for 200kHz LLC resonant converter.............................................................. 125
Figure 4.31 Test waveform of LLC converter at full load and (a) 300V input, and (b) 400V input
................................................................................................................................................................ 126
Figure 4.32 Test efficiency of LLC converter and HB converter at 400V input.............................. 126
Figure 4.33 Test efficiency of LLC and AHB converter at different input voltage and full load . 127
Figure 4.34 Two PWM topologies to be compared (a) AHB, and (b) asymmetrical winding AHB
................................................................................................................................................................ 128
Figure 4.35 Primary side conduction loss comparison.......................................................................... 130
Figure 4.36 Primary switches turn off loss comparison........................................................................ 131
Figure 4.37 Secondary conduction loss comparison.............................................................................. 132
Figure 4.38 Resonant tanks with desired DC characteristic ................................................................. 134
Figure 4.39 Half bridge resonant converter with tank W...................................................................... 135
Figure 4.40 Half bridge resonant converter with tank U ...................................................................... 135
Figure 4.41 Simulation waveform of LLC resonant converter............................................................ 136
Figure 4.42 Switching loss with different Lm for 400kHz LLC resonant converter....................... 137
Figure 4.43 Circuit diagram of 400kHz LLC resonant converter....................................................... 137
Figure 4.44 Integrated magnetic structure for 400kHz LLC resonant converter.............................. 137
Figure 4.45 Magnetic components size comparison (a) 200kHz and (b) 400kHz............................ 138
Figure 4.46 Test circuits of front end DC/DC converter (a) 200kHz AHB, (b) 200kHz LLC, and
(c) 400kHz LLC.................................................................................................................................. 139
Figure 4.47 Test efficiency of 400kHz LLC resonant converter......................................................... 140
Figure 5.1 Magnetic structure for LLC resonant converter.................................................................. 143
Figure 5.2 Discrete magnetic design (a) schematic (b) physical structure ........................................ 144
Figure 5.3 Flux density simulation result (a) Inductor, and (b) Transformer.................................... 144
Figure 5.4 Peak to peak flux density under different input voltage at full load................................ 145
Figure 5.5 Structure with real transformer .............................................................................................. 147
Figure 5.6 Desired magnetic components configuration ...................................................................... 147
Figure 5.7 Magnetic components configuration from real transformer............................................. 148
Figure 5.8 Voltage stress of output diodes D1 D2 (a): desired structure (b) real transformer ....... 148

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 Bo Yang List of illustrations

Figure 5.9 Integrated Magnetic Designs A.............................................................................................. 149

Figure 5.10 Flux density simulation result for Design A...................................................................... 150
Figure 5.11 Center leg flux density for different input voltage........................................................... 150
Figure 5.12 general magnetic structures for Integrated magnetic ....................................................... 152
Figure 5.13 Reluctance model of general integrated magnetic structure ........................................... 153
Figure 5.14 Circuit model of general integrated magnetic structure .................................................. 153
Figure 5.15 Integrated Magnetic Designs B............................................................................................ 154
Figure 5.16 Electrical circuit model of integrated magnetic structure B ........................................... 154
Figure 5.17 Electrical model of connecting dot-marked terminal with unmarked terminal........... 155
Figure 5.18 Two operation modes for LLC resonant converter.......................................................... 155
Figure 5.19 Equivalent-circuit for mode (a)............................................................................................ 156
Figure 5.20 Design curves for integrated magnetic structure B for LLC converter......................... 158
Figure 5.21 Flux density in each leg for integrated magnetic structure B ......................................... 159
Figure 5.22 Efficiency comparison of integrated and discrete magnetic design for LLC converter
................................................................................................................................................................ 160
Figure 5.23 Magnetic size comparison of discrete and integrated magnetic ..................................... 160
Figure 5.24 Simulation waveforms of LLC resonant converter at (a) normal operation, and (b)
short circuit operation ........................................................................................................................ 164
Figure 5.25 Lost of ZVS for LLC resonant converter during over load situation............................ 165
Figure 5.26 High current stress during over load situation for LLC resonant converter................. 165
Figure 5.27 Simplified model of LLC resonant converter during short circuit condition............... 166
Figure 5.28 Short circuit output current at different switching frequency......................................... 167
Figure 5.29 Average output current vs. switching frequency under short circuit............................. 168
Figure 5.30 Change of operating mode with different switching frequency under protection mode
................................................................................................................................................................ 168
Figure 5.31 Test waveform (top to bottom: Q1 gate signal, Transformer primary current and
resonant cap voltage).......................................................................................................................... 169
Figure 5.32 Problems with high switching frequency protection mode............................................. 169
Figure 5.33 Control Method of Variable freq + PWM control............................................................ 171
Figure 5.34 Average output current of LLC converter with variable frequency + PWM control. 171
Figure 5.35 Simulation waveform for D=0.5, 0.4 and 0.2 at short circuit condition....................... 172
Figure 5.36 Simulation waveform with PWM control (from top: gate signal of Q1 and Q3, Vds of
Q1 and primary current Ip)................................................................................................................ 172
Figure 5.37 Test waveform for PWM control (Top: Vds of Q1, middle: gate signal of Q1, and Q2,
bottom: primary current) ................................................................................................................... 173
Figure 5.38 Two LLC resonant converter topologies: (a) Original LLC converter and (b) proposed
clamped LLC converter..................................................................................................................... 174
Figure 5.39 Simulation waveforms for two LLC resonant converter topologies: (a) original LLC
converter and (b) clamped LLC converter ..................................................................................... 175
Figure 5.40 Simulation waveforms under over load condition for (a) original LLC converter and
(b) clamped LLC converter............................................................................................................... 176
Figure 5.41 State plane of original and clamped LLC resonant converter........................................ 177
Figure 5.42 Average output current under over load condition for original LLC converter.......... 177
Figure 5.43 Average output current under over load condition for clamped LLC converter......... 178
Figure 5.44 Design region of clamped LLC resonant converter ......................................................... 179
Figure 5.45 Test waveform of LLC converter under clamping mode ................................................ 179
Figure 5.46 LLC resonant converter with splitting resonant cap and clamping diodes .................. 181
Figure 5.47 Schematics of passive IPEM for AHB and LLC r converter.......................................... 182
Figure 5.48 Capacitor integration for LLC resonant converter........................................................... 182
Figure 5.49 Two passive IPEM structures for LLC resonatn covnerter............................................. 183
Figure 6.1 LLC resonant converter with feedback control................................................................... 188
Figure 6.2 Circuit parameters for extended describing function analysis .......................................... 192
Figure 6.3 Impact of harmonic order on the accuracy of EDF method in region 1.......................... 193

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 Bo Yang List of illustrations

Figure 6.4 Impact of harmonic order on the accuracy of EDF method in region 2.......................... 194
Figure 6.5 Procedure for simulation method to analyze small signal characteristic ........................ 195
Figure 6.6 Circuit setup for first step simulation.................................................................................... 196
Figure 6.7 Circuit setup for second step simulation............................................................................... 196
Figure 6.8 System poles and zeros of LLC in region 1 with different switching frequency.......... 198
Figure 6.9 Input conductance of LLC converter in region 1 ................................................................ 199
Figure 6.10 Output impedance of LLC resonant converter in region 1.............................................. 199
Figure 6.11 Audio susceptibility of LLC converter in region 1 .......................................................... 200
Figure 6.12 System poles and zeros of LLC converter in region 2..................................................... 201
Figure 6.13 Input conductance of LLC resonant converter in region 2.............................................. 201
Figure 6.14 Output impedance of LLC resonant converter in region 2.............................................. 202
Figure 6.15 Audio susceptibility of LLC resonant converter in region 2 .......................................... 202
Figure 6.16 LLC converter setup for small signal analysis .................................................................. 204
Figure 6.17 Operating region of LLC resonant converter.................................................................... 205
Figure 6.18 Bode plot of control to output transfer function for LLC resonant converter.............. 205
Figure 6.19 Bode plot of control to output transfer function of LLC resonant converter in region 1
................................................................................................................................................................ 206
Figure 6.20 Bode plot of control to output transfer function of LLC resonant converter in region 2
................................................................................................................................................................ 207
Figure 6.21 Bode plot of control to output transfer function of LLC resonant converter with load
variation in region 1(fr=250kHz, fs=300kHz) ............................................................................... 210
Figure 6.22 Bode plot of control to output transfer function of LLC resonant converter with load
variation in region 1(fr=250kHz, fs=300kHz) (full load to 25% load) ..................................... 211
Figure 6.23 Bode plot of control to output transfer function of LLC resonant converter with load
variation in region 1(fr=250kHz, fs=300kHz) (25% to no load)................................................ 212
Figure 6.24 Bode plot of control to output transfer function of LLC resonant converter with load
variation in region 2(fr=250kHz, fs=200kHz) ............................................................................... 214
Figure 6.25 Bode plot of control to output transfer function of LLC resonant converter with load
variation in region 2(fr=250kHz, fs=200kHz) (full load to 25% load) ..................................... 215
Figure 6.26 Bode plot of control to output transfer function of LLC resonant converter with load
variation in region 2(fr=250kHz, fs=200kHz) (25% to 10% load)............................................ 216
Figure 6.27 Bode plot of control to output transfer function of LLC resonant converter with load
variation in region 2(fr=250kHz, fs=200kHz) (10% to no load)................................................ 217
Figure 6.28 Simulation setup for output capacitor impact on small signal characteristic ............... 218
Figure 6.29 Bode plot of control to output transfer function with different output capacitance with
switching frequency 300kHz(region 1)........................................................................................... 219
Figure 6.30 Bode plot of control to output transfer function with different output capacitance with
switching frequency 200kHz(region 2)........................................................................................... 220
Figure 6.31 Simulation setup for magnetizing inductance impact on small signal characteristic . 221
Figure 6.32 Bode plot of control to output transfer function with different magnetizing inductance
with switching frequency 300kHz(region 1).................................................................................. 222
Figure 6.33 Bode plot of control to output transfer function with different magnetizing inductance
with switching frequency 200kHz(region 2).................................................................................. 223
Figure 6.34 Simulation setup for resonant tank impedance impact on small signal characteristic 224
Figure 6.35 Bode plot of control to output transfer function with different resonant inductance
with switching frequency 300kHz(region 1).................................................................................. 225
Figure 6.36 Bode plot of control to output transfer function with different resonant inductance
with switching frequency 200kHz(region 2).................................................................................. 226
Figure 6.37 Test setup up for small signal characterization of LLC converter................................. 227
Figure 6.38 Bode plot of control to output transfer function at full load in region 1....................... 228
Figure 6.39 Bode plot of control to output transfer function at full load in region 2....................... 229
Figure 6.40 Compensator for PWM converter....................................................................................... 230
Figure 6.41 Compensator structures for LLC resonant converter....................................................... 230

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 Bo Yang List of illustrations

Figure 6.42 Small signal characteristic of LLC converter in region 2................................................ 231
Figure 6.43 Load impact on small signal characteristic of LLC converter in region 2 ................... 231
Figure 6.44 Small signal characteristic of LLC converter in region 1................................................ 232
Figure 6.45 Load impact on small signal characteristic of LLC converter in region 1 ................... 233
Figure 6.46 Compensator designed for LLC resonant converter......................................................... 234
Figure 6.47 Plant bode plot and loop gain bode plot in region 1......................................................... 234
Figure 6.48 Plant bode plot and loop gain bode plot in region 2......................................................... 235
Figure 6.49 Test result of load change from no load to full load ........................................................ 235
Figure 6.50 Test result of load change from full load to no load ........................................................ 235
Figure 7.1 LLC resonant tank and LLC resonant tank with passive current shaping...................... 244
Figure 7.2 Simulation waveform of LLC resonant converter.............................................................. 244
Figure 7.3 Simulation waveform of LLC resonant converter with passive current shaping.......... 244
Figure A.1 Input type for DC/DC converter........................................................................................... 248
Figure A.2 Input type for DC/DC converter........................................................................................... 248
Figure A.3 Two components resonant tanks ........................................................................................... 249
Figure A.4 DC characteristic of two components tank A ..................................................................... 250
Figure A.5 DC characteristic of two components tank B ..................................................................... 250
Figure A.6 DC characteristic of two components tank C ..................................................................... 251
Figure A.7 DC characteristic of two components tank D ..................................................................... 251
Figure A.8 Components configuration for three components resonant tank..................................... 252
Figure A.9. Resonant tank for components configuration 1................................................................. 253
Figure A.10. Resonant tank for components configuration 2 .............................................................. 253
Figure A.11. Resonant tank for components configuration 3 .............................................................. 253
Figure A.12. Resonant tank for components configuration 4 .............................................................. 254
Figure A.13. Resonant tank for components configuration 5 .............................................................. 254
Figure A.14. Resonant tank for components configuration 6 .............................................................. 254
Figure A.15. Resonant tank for components configuration 7 .............................................................. 255
Figure A.16. Resonant tank for components configuration 8 .............................................................. 255
Figure A.17. Resonant tank for components configuration 9 .............................................................. 255
Figure A.18. Resonant tank for components configuration 10............................................................ 256
Figure A.19. Resonant tank for components configuration 11............................................................ 256
Figure A.20. Resonant tank for components configuration 12............................................................ 257
Figure A.21. Resonant tank for components configuration 13............................................................ 257
Figure A.22. Resonant tank for components configuration 15............................................................ 258
Figure A.23. DC characteristic of tank C ................................................................................................ 260
Figure A.24. DC characteristic of tank D................................................................................................ 261
Figure A.25. DC characteristic of tank G................................................................................................ 261
Figure A.26. DC characteristic of tank H................................................................................................ 262
Figure A.27. DC characteristic of tank K................................................................................................ 262
Figure A.28. DC characteristic of tank L................................................................................................. 263
Figure A.29. DC characteristic of tank O................................................................................................ 263
Figure A.30. DC characteristic of tank S................................................................................................. 264
Figure A.31. DC characteristic of tank U................................................................................................ 264
Figure A.32. DC characteristic of tank V................................................................................................ 265
Figure A.33. DC characteristic of tank W ............................................................................................... 265
Figure A.34. DC characteristic of tank X................................................................................................ 266
Figure A.35. DC characteristic of tank Z................................................................................................. 266
Figure A.36. DC characteristic of tank G1 .............................................................................................. 267
Figure A.37. DC characteristic of tank H1.............................................................................................. 267
Figure B.1 DC characteristic of LLC resonant converter..................................................................... 270
Figure B.2 Waveform of operation mode 1 in region 1 for LLC resonant converter' ..................... 271
Figure B.3 Waveform of operation mode 2 in region 1 for LLC resonant converter' ..................... 273
Figure B.4 Waveform of operation mode 3 in region 1 for LLC resonant converter' ..................... 275

xiv
 Bo Yang List of illustrations

Figure B.5 Waveform of operation mode 1 in region 2 for LLC resonant converter' ..................... 277
Figure B.6 Waveform of operation mode 2 in region 2 for LLC resonant converter' ..................... 279
Figure B.7 Waveform of operation mode 3 in region 2 for LLC resonant converter' ..................... 281
Figure B.8 Waveform in region 3 for LLC resonant converter........................................................... 283
Figure B.9 Simplified topology with fundamental component assumption ...................................... 284
Figure B.10 DC characteristic from simplified model .......................................................................... 286
Figure B.11 DC characteristic from simulation method....................................................................... 286
Figure B.12 Error of simplified circuit model ........................................................................................ 287
Figure C.1 SRC circuit for small signal analysis ................................................................................... 289
Figure C.2 Bode plot of control to output transfer function of Series Resonant Converter............ 290
Figure D.1 Circuit diagram and notification for extended describing function analysis................. 294
Figure D.2 Simulation waveform of LLC converter in region 1 ......................................................... 295
Figure D.3 Topology modes and progressing condition for region 1 ................................................. 296
Figure D.4 Simulation waveform of LLC converter in region 2 ......................................................... 300
Figure D.5 Topology modes and progressing condition for region 2 ................................................. 300

xv
 Bo Yang List of Table

LIST OF TABLES
Table 2-1. Input range of front-end DC/DC converter vs. DC bus capacitance................................. 30
Table 2-2 Difference between two asymmetrical half bridge design ................................................... 33
Table 3-1 Comparison of three prototypes ................................................................................................ 91
Table 3-2 Temperature test results of three prototypes ........................................................................... 91
Table 4-1 Summary of three LLC resonant converter designs ............................................................ 122
Table 4-2 Loss breakdown comparison of AHB and LLC................................................................... 132
Table A-1 Classification of three components resonant tanks ............................................................. 259
Table A-2 Three components resonant tanks with voltage source input............................................ 260

xvi
Bo Yang Chapter 1. Introduction

Chapter 1.

Introduction

1.1 Background and Objectives

With fast advance in very large-scale integrated circuit (VLSI) technology,

more and more transistors can be integrated into smaller silicon chips. As a result,

more powerful, compact digital systems are becoming available. At the same

time, these exciting changes in VLSI also imposed exciting challenges on power

management for these digital systems. The challenges come from several aspects

of changes in digital system. First, as more and more transistors are integrated

into the integrated circuit chip, the power required to operate the chip is

increasing very rapid. Second, with the transistors working at higher frequency,

the supply voltage is reducing with fast transient speed and tight regulation

requirement. Third, as VLSI technology is moving very fast, the power

management requirement is becoming a fast moving target.

Distribute power system (DPS) as shown in Figure 1.1, is been widely used

for server and telecom power systems which represents the most advanced digital

systems. In a distributed power system, power is processed by two stages. First

stage converts AC input to 48V intermediate DC bus. This DC voltage is then

distributed to the load side. The load converter, which is located on the load side,

1
Bo Yang Chapter 1. Introduction

processes the power second time by converting DC distribution bus to whatever

voltage needed by the load.

Figure 1.1. Distributed power system structure

Many advantages of distributed power system prompted its use in these

applications. First, with fast dropping on supply voltage of digital system, it is not

realistic to delivery the power with such low voltage. DPS uses much high voltage

to distribute power. This greatly reduces the loss associated with power

distribution. Second, since the second stage (load converter) is placed very close

to the load. The impact of parasitic is minimized. This converter can have very

fast transient response to provide the fast current slew rate to the load. Third, for a

distributed power system, front-end converter is independent of the load

requirement. Each load converter is also independent to other load. This provides

significant benefit for the fast changing system requirement. With distributed

power system, when technology changes, only the load converter associated with

that load need to be redesigned, the impact on whole system is minimized.

2
Bo Yang Chapter 1. Introduction

Beside these aspects, DPS also provides other benefits. First, DPS is an open

architecture, modularized solution. The power system can be reconfigured as load

system been expended or upgraded. It is a system which can grow as needed.

Second, with modularized design, high reliability can be achieved with N+1

redundancy [A7].

Because of these advantages of DPS, it is been widely adopted for different

applications [A4][A5][A6][A8]. DPS is been adopted exclusively in high end

sever system and telecommunication system. Even for the most cost sensitive

application like Personal Computer, DPS concept is been partly adopted. For

today's personal computer, a hybrid power system is used. For critical

components like CPU and Video Adapter, the distributed power system concept is

used. For less critical components like modem-card or network-card, it still use

centralized power system structure. With increased clock speed, very soon the

memory will also have dedicated power supply. More DPS structure could be

expected.

Although for DPS, the front-end converter is not so closely related to the load,

still other aspects of the load requirement imposes lot of new challenges to the

front-end converter. The major impacts come from following aspects. First, as

integration level increases with surprising speed, more and more transistors are

integrated to the system with faster switching frequency. The digital system is

becoming more and more power hungry and compact. As a supporting subsystem,

3
Bo Yang Chapter 1. Introduction

people tend to give fewer budgets for the power supply system. So the

requirement for the power system is to provide higher power with smaller

volume. Another significant difference, which is driving the industry, is the

profile. For the digital system, all the components now can be build with very low

profile. So people expect to build the system with low profile too. With lower

profile, more computational power could be build into smaller rack; this will

reduce the system and maintains cost. This calls for a power supply to have

compatible profile with digital components. Traditional systems normally have a

profile of 1.5U to 2U (1U=1.75inch), now the industry is moving toward 1U

power system. These trends could be observed in Figure 1.2, Figure 1.3 and

Figure 1.4.

In Figure 1.2 [A1], the trend for computer server system power requirement is

shown. For high-end server system, the power level will increase by factor of 6 in

recent 5 years.

(From IBM Power Technology Symposium 2002, by Dr. Thai Q. Ngo, IBM)
Figure 1.2. Trend for server system power level

4
Bo Yang Chapter 1. Introduction

In Figure 1.3[A1], the trends for power density, efficiency and lifetime are

shown. Within next several years, the power density needs to increase by a factor

of 2. Efficiency needs to increase by more than 5%. To achieve this efficiency

improvement, 30 to 50% reduction of system loss is required.

(From IBM Power Technology Symposium 2002, by Dr. Thai Q. Ngo, IBM)
Figure 1.3. Trend for AC/DC power supply for server

In Figure 1.4[A1], the need for 1U system is showed for 2000 and 2001. As

seen in the picture, within one years time, the need for 1U system doubled. As for

now, more and more server system are built with 1U profile as can be seen in all

the major server manufactures like DELL, APPLE, GATEWAY etc.

(From IBM Power Technology Symposium 2002, by Anthony Stratakos, Volterra)

Figure 1.4. Trend toward lower profile system

5
Bo Yang Chapter 1. Introduction

From above discussions, we can see that the trends for front-end system are

strongly affected by the digital system evolutions. The power density is expected

to double. Loss is expected to reduce by more than 30%. And profile is expected

to reduce by 50%. Next the state of the art technology will be reviewed and paths

to achieve these goals will be discussed.

1.2 State of the art topologies

Inside front-end converter, two-stage approach is widely adopted as shown in

Figure 1.5. With two-stage approach, there are two power conversion stages

inside the front-end converter. First stage converts AC input to a loosely regulated

400V intermediate DC bus with power factor correction. Second stage, front-end

DC/DC converter, will convert 400V DC into a tightly regulated 48V DC bus,

which will be distributed to the load converter. For a single-phase system, 1kW

system is the most popular power level because of its flexibility for 2 to 3 kW

system. Also, at this power level, the choice of power devices is around the

optimal.

Figure 1.5. Two stage structure of front-end converter

In this dissertation, the design challenges, issues and solutions for the second

stage – Front-end DC/DC converter in a 1kW system will be discussed.

6
Bo Yang Chapter 1. Introduction

Most front-end DC/DC converter designs evolve around full-bridge, two-

switch forward, and half-bridge converters, as shown in Figure 1.6. Among the

possibilities and for the power level under consideration (1 kW), half-bridge

converter and full bridge converter provide the best combination of simple

structure, low device stress and soft switching capability. Most industry products

use these two topologies.

Figure 1.6 Primary inverter topologies

Figure 1.7 Secondary rectifier topologies

7
Bo Yang Chapter 1. Introduction

Figure 1.7 shows possible configurations for secondary-side rectification. It is

well understood that certain combinations of primary- and secondary-side

topologies are deemed less desirable. Each secondary-side rectification has its

advantages and disadvantages, which will be discussed in detail in chapter 2.

In Figure 1.8, a state of the art front-end system use full bridge and center

tapped rectifier is shown. The magnetic components and heat sinks in the system

are outlined. The upper half part of the picture is dedicated to PFC converter and

lower part is the front end DC/DC converter. For DC/DC part, it is clearly that

heat sink and magnetic are the biggest parts, which occupied more than 80% of

the total system volume. To improve power density and profile, size reduction of

heat sink and magnetic components are necessary.

Several methods could be used to reduce the heat sink and magnetic:

High switching frequency: higher switching frequency could result in

volume reduction of passive components.

High efficiency: thermal management is a big part of the system. To

achieve high power density, reduction on the volume for thermal

management is an effective way.

8
Bo Yang Chapter 1. Introduction

Figure 1.8 The state of the art front-end system

However, these two methods don’t come together easily. With high switching

frequency, efficiency often will suffer. The reduced efficiency is because of high

switching loss and also the reverse recovery of the secondary-side diodes. The

diode re-verse recovery causes voltage overshoot and ringing across the devices,

which impacts on the selection of device breakdown voltage. The loss due to

diode reverse recovery is also a great part of the total loss. Snubbers (such as

those with active clamping or saturable cores) are used to deal with this problem.

Nevertheless, these solutions also have limitations. Due to the large current in the

secondary side, the conduction loss of the diode is another important part of the

overall loss. The use of Schottky diodes can reduce the reverse-recovery problem.

For the front-end dc–dc converter, the secondary diode voltage stress is normally

close to 200 V. As a result, it is difficult to find suitable Schottky diodes for such

a high voltage, and then other solutions are required.

9
Bo Yang Chapter 1. Introduction

Other than high switching loss, several other obstacles prevent us from

switching so fast. High stress and high EMI noise caused by parasitic components

are two major problems too.

Another obstacle for front end DC/DC converter design is the hold up time

requirement: when the input AC line is gone, system needs to work for 20ms with

full power. With hold up time, the result is wide input range for front end DC/DC

converter. The performance at high input voltage is critical to system power

density and efficiency while performance at low input voltage is not so important.

For current state of the art topologies, however, this wide input range greatly

impairs the performance of the converter at high input voltage.

To overcome these obstacles and develop a high switching frequency, high

efficiency solution to achieve high power density and low profile, following

techniques need to be improved:

Advanced devices and material: at high switching frequency, the size of the

magnetic component is limited by the magnetic loss. With better magnetic

material, the size of the magnetic components could be significantly reduced.

Loss on power semiconductor is the biggest part in total system loss. With

better devices like CoolMOS, this loss could be reduced so that less thermal

stress is imposed to the thermal management.

Advanced packaging techniques: this includes advanced passive packaging and

advanced active packaging. With advanced packaging technique, several

10
Bo Yang Chapter 1. Introduction

aspects of improved could be expected. First, the utilization of space could be

improved. With integration of capacitor into magnetic components, the total

volume is greatly reduced. Second, with advanced packaging of active

devices, the electrical performance of the system could be improved which

will results to higher efficiency, lower noise. Third, advanced packaging

could provide better thermal performance, which will help to reduce the

volume of thermal management.

Advanced power converter topology: for those state of the art topologies, high

turn off loss and low efficiency at normal operating condition limits the

ability of higher switching frequency and efficiency. With more advanced

topology, switching loss need to be minimized so that high switching

frequency could be achieved with high efficiency. Also, a desired topology

need to be able to be optimized at high input voltage so that hold up time

requirement will not impose serious penalty.

1.3 Outline of dissertation

This dissertation is divided into five chapters. They are organized as

following.

First chapter is background review of 1kW front-end DC/DC power converter

in Distributed Power System. The trends for this application are high power

density, high efficiency and low profile. To achieve these targets, high switching

frequency, high efficiency topology needs to be developed. Soft switching

11
Bo Yang Chapter 1. Introduction

topologies like phase shift full bridge and asymmetrical half bridge has been the

standard industry practice. For these topologies, the switching frequency is

pushed to 200kHz. Then the turn off loss will be so high that increase frequency

will not improve the power density. To achieve the future target, higher switching

frequency is a must. This calls for more advanced technology.

The primary target of this dissertation is to develop technique to achieve high

frequency, high efficiency front-end converter that could be optimized at high

input voltage while be able to cover wide input range.

Chapter 2 presents several techniques developed to improve the performance

of state of the art topologies. One problem for the state of the art topologies is the

hold up requirement. With hold up requirement, front-end DC/DC converter

needs to be designed with wide input range. Within the range, only the

performance at high input voltage is critical. Unfortunately, for all those

topologies, wide range design always penalizes the performance at high input

voltage.

Range winding solution and asymmetrical winding asymmetrical half bridge

are two methods developed for wide input range issue. Quasi Square Wave

synchronous rectifier is developed to reduce the secondary side conduction loss.

Range winding solution provides the best performance possible for the state of

the art topologies. Adding extra winding and devices could divide wide input

12
Bo Yang Chapter 1. Introduction

range divided into two ranges. The converter could be optimized for a narrow

range and use range winding to deal with wide input range. This method can be

applied to any topology.

Although range winding solution is effective, it needs extra windings, diodes,

switches and control circuit. For asymmetrical half bridge converter,

asymmetrical winding asymmetrical half bridge is a simpler and effective

solution. With this solution, the duty cycle at high input voltage could be

extended. With extended duty cycle, the voltage stress of output rectifier diodes

could be reduced. With lower voltage rated diodes, the conduction loss and

switching loss could be reduced greatly. This method is simple and effective, but

it cannot be extended to other topologies like phase shift full bridge. Also, the

output current will be discontinuous with this method.

Quasi-square-wave synchronous rectification is a method to implement

synchronous rectifier in front-end application. Compare 200V diode and

MOSFET, 50% reduction of conduction loss could be achieved at 20A output

current. For 300V MOSFET, the benefit will be very limited. To use 200V

devices, symmetrical half bridge is chosen. Two issues make the result not so

promising: body diode reverse recovery problem of synchronous rectifier and

hard switching of primary switches. Quasi-square-wave operation mode solved

these two problems with minimized penalty. With QSW operation, the body diode

of synchronous rectifier will never conduct, which totally prevented the reverse

13
Bo Yang Chapter 1. Introduction

recovery problem. Secondary inductor current also helps the primary switches to

achieve zero voltage switching at whole load range.

Although these techniques could improve the performance of the state of the

art topologies, the high stress on the power devices and high switching loss

problem is not been answered yet.

Chapter 3 investigated advanced packaging technology, which could help

reduce the stress and loss due to parasitic components. Passive integrated

technology is also been discussed which could provide significant improvement

on power density of passive components. Two integrated power electronics

modules were developed for front end DC/DC converter: active IPEM, which

integrated totem pole switches and drivers; passive IPEM, which integrated all the

passive components in front end DC/DC converter except the output filter

capacitor. With IPEMs, the power density of front end DC/DC converter is

improved by more than 3 times.

With advanced packaging technology, the performance of front end DC/DC

converter could be improved, yet still the high switching loss and hold up time

problem impose huge penalty on front end DC/DC converter design. Advanced

topology still is needed to solve these two problems.

Chapter 4 investigated the resonant topologies for this application. First many

traditional resonant topologies are been investigated. They are Series Resonant

14
Bo Yang Chapter 1. Introduction

Converter (SRC), Parallel Resonant Converter (PRC) and Series Parallel

Resonant Converter (SPRC). All three topologies possess same problem as those

PWM topologies: performance cannot be optimized at high input voltage for wide

input range. At high input voltage, circulating current and switch turn off current

reaches maximum.

Another resonant topology: LLC resonant converter, fortunately, seems to be

exactly what fits this application. With LLC resonant converter, first the

circulating energy is minimized at high input voltage. The turn off current of

switches is controllable and could be minimized. This topology is also capable of

cover wide input range. Compare with state of the art topologies, 3%

improvement of efficiency could be achieved. It is almost 40% reduction of the

loss. With DC analysis, the operating region and design of LLC resonant

converter is presented.

Chapter 5 discussed two improvements for LLC resonant converter. To meet

the profile and power density challenges, magnetic design is the most critical part

in the system. A novel integrated magnetic structure is presented for LLC

resonant converter. With integrated magnetic, all the magnetic components of a

LLC resonant converter are integrated into one magnetic core. High power

density can be achieved.

Overload protection is another problem been addressed in this dissertation. To

make practical use of this topology, methods to deal with abnormal situation is as

15
Bo Yang Chapter 1. Introduction

important as the efficiency. Three methods to deal with over load situation were

discussed. With increase switching frequency, the output current could be limited

with the penalty of larger magnetic core size. With hybrid control of PWM and

variable frequency control, previous problem could be prevented. The problem is

lost of soft switching capability. The last method, which is a modified LLC

resonant topology by adding clamp diodes to the resonant capacitor, can

effectively control the output current with fast response.

With above analysis, an open loop LLC resonant converter could be designed

work very well. Next step is to close the voltage feedback loop. To do this, an

understanding of the small signal characteristic of LLC resonant converter is

essential.

Chapter 6 is dedicated to the small signal modeling of LLC resonant

converter. Traditional state space averaging method can no longer apply for

resonant converter. Several different methods have been reported for this topic.

Many of them made lot of simplifications, which makes the result not accurate. In

this dissertation, two methods are used to extract the small signal model of LLC

resonant converter. One method is based on simulation. It treats the converter as a

black box. By inject small signal perturbation and monitor the output response at

different perturbation frequency and operating point, a complete small signal

characteristic of LLC resonant converter could be gained. This method is easy to

implement and accurate as long as the circuit model is accurate. The drawback of

16
Bo Yang Chapter 1. Introduction

this method is lack of intuition and time consuming. Another method is used as a

complementary to the simulation method: extended describing function method

proposed by Dr. Eric Yang. It is a general modeling tool for periodical operating

system based on COSMR software package. With this method, a small signal

model could be derived with zeros and poles identified. Compare these two

methods, ETD method is fast but need state space model of the circuit in every

situation while simulation method is accurate and easy but time consuming.

Finally, based on the information gathered from above analysis, the feedback

control could be designed for LLC resonant converter.

With these analysis and test verification, LLC resonant converter is been

proved to be an excellent candidate for front-end DC/DC conversion. The analysis

and design are also been explored, although this exploration is far from

completion, it enables industry to appreciate this topology as a possible for next

generation front-end DC/DC converter.

17
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Chapter 2.

State of the art topologies and improvements

2.1 Introduction
In the first chapter, the trends for distributed power system were discussed.

High power density, high efficiency and low profile are the key driving forces for

technology development for this application. To achieve these targets, high

switching frequency and high efficiency power conversion is necessary.

In this chapter, first three state of the art topologies will be evaluated in detail.

The issues of these converters will be discussed for this application. For the state

of the art topologies, it almost reached the limit along this path with current

technology. Switching loss and wide input range put lot of burden on these

topologies, which prevented these topologies from increasing switching frequency

and reaching higher efficiency.

Several techniques will be developed to improve the state of the art

topologies. First two techniques, range winding technique and asymmetrical

winding asymmetrical half bridge technique, are developed to deal with wide

input range problem caused by hold up requirement.

18
Bo Yang Chapter 2. State of the Art Topologies and Improvements

For this application, with output current around 25A, secondary rectifier

conduction loss is the biggest part in the total loss. Quasi Square Wave (QSW)

Synchronous Rectifier technique is developed to reduce the secondary rectifier

conduction loss.

Range winding solution is a universal solution for wide input range problem.

The concept could be implemented to any isolated topologies. For asymmetrical

winding solution, it is limited to asymmetrical half bridge converter only. With

modified control scheme, it could also be used for full bridge converter. For QSW

synchronous rectification, currently it is demonstrate with symmetrical half

bridge, it could also be used for phase shift full bridge, asymmetrical winding

asymmetrical half bridge and range winding solution. With the fast advance in

power MOSFET technology, it could also be extended to asymmetrical half

bridge if 300V MOSFET could outperform 300V diodes.

2.2 State of the art topologies and issues

2.2.1 Two-switch-forward converter

The schematic and waveform of two-switch forward (2SF) converter is shown

in Figure 2.1 [A9][A10][A11]. The operation of two-switch-forward converter

could be divided into three modes: energy transfer stage, transformer reset stage

and dead time stage. In energy transfer stage, both primary switches are turned

on; energy is transferred from input to output. In transformer-reset stage, two

primary diodes will conduct and apply reversed input voltage to the transformer

19
Bo Yang Chapter 2. State of the Art Topologies and Improvements

winding to reset the transformer. When transformer is totally reset, converter will

come into dead time stage with no current in the primary side while secondary

side is freewheeling.

Two-switch forward got lot of interests and appreciations because of one

reason: robust. Since two primary switches are not connected in totem pole

configuration, they are turned on at the same time. This solved shoot through

problem. For Half Bridge and Full Bridge converter, the primary switches are

connected in totem pole structure. Whenever the two switches are turned on at the

same time due to electromagnetic noise or radiation, it will be a destructive

failure. For two-switch forward, this problem is solved, which is very critical for

airspace power supply since they will be exposed to high-energy radiation. But to

get this benefit, high price need to be paid.

Figure 2.1. Two-switch forward converter and operating waveforms

The major disadvantages of two-switch forward are hard switching and large

filter inductor.

20
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Low efficiency is due to several reasons. First, two-switch forward is a hard

switching converter; the switches are hard turn-on and turn-off. This will increase

the switching loss for high frequency operation. Second, two-switch forward has

higher conduction loss compare with half bridge and full bridge converters. This

is because the energy transfer only happens during two switches are on. Because

of transformer reset requirement, the maximum duty cycle can only reach 0.5.

Which means at best, only half of the time this converter can transfer energy to

the output; this will increase the RMS current through the primary switch. With

same reason, the voltage-second on output inductor is much higher in two-switch-

forward converter compared with half bridge and full bridge converter.

Because of these penalties of two-switch forward, it is not so widely used for

this application now. For some application requires high reliability applications, it

still been considered.

2.2.2 Phase Shift Full Bridge converter

The schematic and operating waveforms of phase shift full bridge converter

are shown in Figure 2.2 [A12][A13][A14][A15][A16]. Phase shift full bridge

converter, as one of the most popular topology for this application, has many

good characteristics. It is a soft switching converter. All four switches on primary

side can achieve Zero Voltage Switching (ZVS) with proper design. This is very

helpful for high frequency operation. This topology has lower volt-sec on the

output filter inductor. Phase shift full bridge can achieve smallest volt-sec for

21
Bo Yang Chapter 2. State of the Art Topologies and Improvements

same design specification compared with two-switch forward and half bridge

converter.

Figure 2.2. Full bridge converter and operating waveforms

Another benefit of phase shift full bridge is its capability to cover wide power

range. For power from several hundreds watts to kilowatts, full bridge converter

can perform very well. In recent years, even for low power application like

Voltage Regulator Module, full bridge topology is been investigated and showed

benefits.

There are several disadvantages for phase shift full bridge though. First, it is

more complex than the other two topologies. With four switches on primary side,

control and driver circuit will be more complex. Another problem is the leakage

inductance. To achieve ZVS, large leakage inductance is needed. With large

leakage inductance, the duty cycle loss due to charge and discharge leakage

inductance will be significant. This will limit the choice of transformer turns ratio,

which will affect the performance of whole converter. Even with large leakage

inductance, still ZVS cannot be achieved at light load. There are many papers

22
Bo Yang Chapter 2. State of the Art Topologies and Improvements

discussed different methods to expend ZVS region for phase shift full bridge, but

they are not been widely adopted due to complexity.

Another issue for phase shift full bridge is the circulating current. As seen in

the waveforms, during every switching cycle, there is a time interval during which

two up switches or low switches are turned on at the same time. This will short

the transformer primary side. During this time interval, secondary is freewheeling

and no energy transfer from input to output. Primary current during this period is

pretty high. This current circulates through the primary two switches and

transformer winding. It will increase the conduction loss. Smaller the duty cycle,

more circulating current will be.

Although some drawbacks for phase shift full bridge, it is still a popular

topology for this application. Its capability to operate at high frequency and wide

power range enable it to be used for multi applications.

2.2.3 Half bridge converter

As shown in Figure 2.3, half bridge converter has only two switches on the

primary side [A17][A18][A19][A20][A21]. For half bridge converter, with

different control signal, the converter operates very differently. The different

operating waveforms are shown in Figure 2.4 and Figure 2.5. When the two

switches are driven with symmetrical signals, which are identical to each other

with 180-degree phase shift, the converter is called symmetrical half bridge. For

the one with complementary driving signals, it is called asymmetrical half bridge.

23
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.3. Schematic of half bridge converter

For symmetrical half bridge, it is hard switching topology. Leakage

inductance is detrimental to the performance of converter. Normally snubber

circuit is needed to absorb the ringing problem caused by leakage inductance

during the period when both switches are off. For symmetrical half bridge, the

power level it limited because of these limitations.

Figure 2.4. Operating waveforms of symmetrical half bridge converter

24
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.5. Operating waveforms of asymmetrical half bridge converter

Asymmetrical half bridge is a very interesting topology. It has some unique

characteristics. First, asymmetrical half bridge is a soft switching converter.

Primary two switches can achieve ZVS with help of leakage inductance. Since the

two switches works complementarily, there is no ringing problem caused by

leakage inductance. Also, since energy is transferred from input to output during

whole switching period, there is no circulating current as seen in phase shift full

bridge.

For asymmetrical half bridge, there are several drawbacks too. One problem is

that the voltage stress on the secondary rectifier is asymmetrical and related to

duty cycle. In some situations, the voltage stress on the output filter diodes could

reach very high, which will limit the choice of diodes. Since asymmetrical half

bridge also utilizes leakage inductance to achieve soft switching, there is similar

problem as discussed for phase shift full bridge, which is lost of ZVS during light

load condition.

25
Bo Yang Chapter 2. State of the Art Topologies and Improvements

For asymmetrical half bridge, the transformer is biased according to different

duty cycle. So the design of asymmetrical half bridge transformer need take this

into consideration.

Asymmetrical half bridge is very popular for power level less than 1kW

application because its simplicity compared with phase shift full bridge.

Current doubler is a topology for secondary rectifier. It is widely used for low

voltage, high current applications because of reduced transformer winding loss

and easy to implement magnetic integration concept. For front-end DC/DC

application, the secondary current can reach 25A. With current doubler and

magnetic integration, higher efficiency and higher power density can be achieved.

Figure 2.6. Asymmetrical half bridge with current doubler and waveforms

For asymmetrical half bridge with current doubler, its operation is same as

traditional asymmetrical half bridge. For current doubler asymmetrical half

bridge, since the two inductor Lf1 and Lf2 current could be different, the

transformer doesn't need to be biased. With current doubler structure, the

transformer loss could be reduced.

26
Bo Yang Chapter 2. State of the Art Topologies and Improvements

2.2.4 Comparison of three topologies

Figure 2.7 shows the loss comparison of these topologies for primary

switches. Two switch forward and symmetrical half bridge converters have much

higher loss compared with full bridge and asymmetrical half bridge converter.

Since two-switch forward and symmetrical half bridge converter are hard

switching converters, the operating frequency cannot be pushed too high. This

will limit the achievable power density.

Figure 2.7. Loss comparison of three state of the art topologies

Figure 2.8 shows the comparison of volt-second on output filter inductor for

these topologies. For half bridge and full bridge, when duty cycle reaches

maximum, the volt-sec on the output filter inductor will be very small, this will

reduce the required inductor size if same current ripple is assumed. For two

switch forward, however, even with maximum duty cycle, the volt-sec is still very

large due to the discontinuous energy transfer property of the converter. As seen

27
Bo Yang Chapter 2. State of the Art Topologies and Improvements

in Figure 2.8, two-switch forward converter has almost 5 times volt-sec on the

output filter inductor compared with half bridge and full bridge converter.

Figure 2.8. Output filter inductor volt-sec comparison of three topologies

From above comparison, two-switch forward and symmetrical half bridge

converter are hard switching converters, which are not suitable for high frequency

operation. For full bridge converter, and asymmetrical half bridge converters, they

both have pros and cons. Full bridge converter could provide some improvement

on output filter inductor volt-sec, but high circulating current and complex

structure are its drawbacks. Half bridge converter has simple structure, although

the volt-second on output filter inductor is a little bit higher than full bridge. In

next part, the impact of hold up time on these two converters will be discussed.

2.3 Issue with hold up time requirement

Hold up time requirement is one special requirement for front-end application.

It requires the front-end system to provide full power output for one AC line

28
Bo Yang Chapter 2. State of the Art Topologies and Improvements

cycle, which is 20ms ,after the AC line is lost. This hold up time will ensure the

digital system to have enough time to respond to power failure.

With 1kW output power and 20ms hold up time requirement, the energy

needed to store in the system will be at least 20Joule. Observing the system, there

is no much choice but to use intermediate 400V DC bus capacitors as the energy

storage component. This is because of several reasons. First, this intermediate bus

is highest voltage bus; it is more efficient to put capacitor here to store more

energy. Second, this bus voltage is loosely regulated; it can have a large variation.

For 48V output, it needs to be tightly regulated, so it is not possible to use energy

on the 48V DC bus capacitors.

During hold up time, energy is drawn from the 400V DC bus capacitor. With

energy drawn from it, the voltage on these capacitors will drop. After the hold up

time, the voltage on the bus capacitor will be much less than normal operating

voltage that is 400V. This will be a design trade off to be made. With smaller bus

capacitor, this variation will be larger. Although the size of the bus cap can be

reduced, the performance of the front-end DC/DC converter will be greatly

penalized due to the wide input range. While with big bus capacitor, the

performance of front-end DC/DC could be optimized; the size and cost of bus cap

will be a penalty.

In Figure 2.9, the relationship between capacitance needed for hold up time

and lowest input voltage the bus will drop after hold up time is showed. For 400V

29
Bo Yang Chapter 2. State of the Art Topologies and Improvements

DC bus, 450V electrolytic capacitor is used. For this voltage rated capacitor,

330uF is most cost and volume effective. The choice will be how many 330uF

capacitors will be needed.

Figure 2.9. Capacitance for hold up time and DC bus voltage after hold up time

Table 2-1 shows the capacitance used and the input voltage range for the

front-end DC/DC converter. It is easy to see that 660uF is a good choice, which is

also the value used by many industry products.

Table 2-1. Input range of front-end DC/DC converter vs. DC bus capacitance

With 660uF bus capacitor used, the input voltage range of the front-end

DC/DC converter will be 300 to 400V. During the whole lifetime of the

converter, it worked with input voltage around 400V. Only in very rare power

30
Bo Yang Chapter 2. State of the Art Topologies and Improvements

failure, the converter will work down to 300V input. The question is how much

penalty is paid for 400V input operation in order to operate the converter at 300V

input. Next part asymmetrical half bridge and phase shift full bridge will be

analyzed on this aspect.

2.3.1 Asymmetrical half bridge with hold up time design

For asymmetrical half bridge, the maximum duty cycle is 0.5. When duty

cycle is 0.5, the converter reaches highest gain too. Because of the duty loss due

to leakage inductance, the maximum achievable duty will be set to 0.45.

Figure 2.10. Duty cycle range for asymmetrical half bridge with hold up requirement

To cover input voltage from 300V to 400V, the highest gain need to be

designed at 300V. With duty cycle equals to 0.45, transformer turns ratio is

decided accordingly. When input voltage increase to 400V, duty cycle will reduce

to reduce the gain and keep output voltage regulated. The duty cycle will be less

than 0.25 when input voltage is 400V as shown in Figure 2.10. From this we can

31
Bo Yang Chapter 2. State of the Art Topologies and Improvements

see, to design with hold up time requirement, the duty cycle of the converter will

be very small during normal operation. Next, the impact of small duty cycle at

normal operation on the performance will be discussed.

For asymmetrical half bridge shown in Figure 2.6, the secondary side rectifier

diodes voltage stress will be related to input voltage and duty cycle as:

ns ns
VD1 = ⋅ (1 − D) ⋅ Vin and VD 2 = ⋅ D ⋅ Vin .
np np

Average current flow through each diode will be:

I D1 = (1 − D) ⋅ I O and I D 2 = D ⋅ I O

Figure 2.11. Secondary rectifier voltage and current stress for asymmetrical half bridge

As seen from Figure 2.11, when input voltage is 400V, the voltage stress for

D1 reaches maximum because of high input voltage and small duty cycle. Also,

most of the load current will be carried by D1 too. The maximum voltage is over

32
Bo Yang Chapter 2. State of the Art Topologies and Improvements

210V, so 300V diodes has to be used for the secondary rectifier. The highest

voltage rating shottky diode available is 200V. With 300V diodes, the forward

voltage drop and reverse recovery characteristic is much worse than 200V shottky

diode. This will increase the conduction and switching loss.

Figure 2.12. Test efficiency of asymmetrical half bridge

Figure 2.12 shows the test efficiency of asymmetrical half bridge for two

cases. In first case, the converter is designed just to operate from 360V to 400V.

In the other case, the converter is designed according to hold up time requirement

with 300V to 400V input range. The differences between these two designs are

shown in Table 2-2.

Table 2-2 Difference between two asymmetrical half bridge design

Input Xfmer Switching

Secondary diode Primary Switch
Range turns ratio Frequency
MUR2002 IXFH22N50
Case 1 360-400V 10:6 200kHz
200V Shottky Diode 500V 20A
STTH3003 IXFH22N50
Case 2 300-400V 10:7 200kHz
300V Fast recovery diode 500V 20A

33
Bo Yang Chapter 2. State of the Art Topologies and Improvements

From test results we can see, because of this wide input range, efficiency at

400V drops more than 3%, which means more than 60% increase in loss because

of wide input voltage range.

2.3.2 Phase shift full bridge with hold up time design

For phase shift full bridge, with hold up time requirement, its duty cycle range

is shown in Figure 2.13. When input voltage drops to 300V, duty cycle reaches

the maximum. When input voltage is 400V, duty cycle is only around 0.34.

Figure 2.13. Duty cycle range for full bridge converter with hold up requirement

For phase shift full bridge, the secondary rectifier voltage stress is not a big

concern. The major problem is the high circulating current during normal

operation. As seen in Figure 2.14, during each switching cycle, there is a free

wheeling period. Secondary current freewheels through secondary diodes in this

time interval. Primary also has high current circulating through primary two

switches. This primary circulating current will increase conduction loss and

34
Bo Yang Chapter 2. State of the Art Topologies and Improvements

should be minimized to achieve high efficiency. Unfortunately, to design for hold

up time, the duty cycle at 400V is very small, less than 0.35. This means during

each switching cycle, the current circulating for almost one third of the time.

Figure 2.14. Circulating current of full bridge with different input voltage

2.3.3 Conclusion

From above analysis, following conclusion could be drawn:

1. For front-end DC/DC application, to design for hold up time, its input

voltage range will be wide. With 660uF bus capacitor, the input voltage of front-

end DC/DC converter will be 300 to 400V.

2. For phase shift full bridge, to design for this specification, more than one

third of the primary current is circulating without transfer energy.

3. For asymmetrical half bridge, the secondary rectifier voltage stress will

increase to very high due to wide input range requirement.

4. From test results, it can be seen that more than 60% loss increase will

occur because of wide input range requirement.

35
Bo Yang Chapter 2. State of the Art Topologies and Improvements

A desired front-end DC/DC converter should have following characteristic:

• Could be optimized at high input voltage while still cover wide input

range

• High efficiency and high switching frequency, so that high power density

and low profile could be achieved with high switching frequency.

2.4 Range winding for wide input range

As discussed in the previous part, to deal with hold up time requirement, front

end DC/DC converter need to cover wide input range. Within the input range, the

converter will work at high input voltage for the whole lifetime. Only during

20ms hold up time, the converter will operate at low input voltage down to 300V.

The performance at high input voltage is critical to system while the performance

at hold up time is not a consideration as long as the converter still functional.

Unfortunately, the PWM converter is working at better condition with low input

voltage. As input voltage increases, duty cycle will reduce and the converter is

working in worse condition. To design for wide input range, the efficiency at high

input voltage will drop significantly. As shown in first chapter, with wide input

range design, the efficiency at high input voltage is around 92%. If the converter

is designed just for a narrow input range, the efficiency can reach 95%.

Range winding solution is a method to deal with this problem. The concept of

range winding solution is to change the transformer turns ratio according to

different input voltage so that the transformer could be optimized for high input

36
Bo Yang Chapter 2. State of the Art Topologies and Improvements

voltage. In the following part, asymmetrical half bridge with range winding will

be discussed as an example to demonstrate the operation of range winding

concept.

Figure 2.15. Asymmetrical half bridge converter with range winding

As shown in Figure 2.15, range-winding solution is built upon original

asymmetrical half bridge converter by adding extra windings, diodes and switch.

By adding those extra components, another freedom is added to the converter.

With turn on or off the range switch Qr, the transformer winding turns ratio could

be changed. In this way, the gain of the converter could be regulated through two

ways, duty cycle and range switch.

When range switch Qr is turned off, the converter will have a gain:

Vin ⋅ (1 − D) ⋅ D ⋅ nS
Vo = , Which is same as an asymmetrical half bridge with
nP

transformer turns ratio np: ns.

With the range switch turned on, the range winding will be added to the

secondary, the converter will have a different gain:

37
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Vin ⋅ (1 − D) ⋅ D ⋅ (n S + nsr )
Vo =
nP

Figure 2.16 Circuit diagram for normal operation

Figure 2.17 Circuit diagram for hold up operation

As shown in those equations, with range winding turned on, the transformer

turns ratio will be reduced. The converter will have higher gain with lower turns

ratio. By detect the input voltage of front end DC/DC converter, when it drops

below given level, the range switch will be turned on, and the converter will have

higher gain to cover lower input voltage. During normal operation, the range

switch is turned off, the range winding and diodes will not affect the operation.

38
Bo Yang Chapter 2. State of the Art Topologies and Improvements

With range winding solution, the inner transformer turns ratio (np:ns) could be

optimized for high input voltage so that the converter will operate with large duty

cycle at normal operation. At hold up time, the range switch will be turned on to

increase the gain to cover wider input range.

To demonstrate the benefits of this solution, design examples of traditional

asymmetrical half bridge and asymmetrical half bridge with range winding are

performed and compared through analysis and experiments.

For a traditional asymmetrical half bridge, to design for input voltage range

from 300V to 400V, the transformer turns ratio is choose to be 10:7 (np:ns). With

this turns ration, the duty cycle at 300V will be 0.45. The maximum duty cycle is

set to 0.45 considering the duty loss caused by leakage inductance for soft

switching. When input voltage is 400V, duty cycle is less than 0.25.

For asymmetrical half bridge with range winding, the transformer turns ratio

(np:ns) is designed to be 10:6. The range winding nsr is just one turn. With turn

ratio 10:6, the converter will be able to cover a input range from 360V to 400V.

At 400V, the duty cycle is 0.34. When input voltage drops to below 360V, range

switch will turn on and the converter will have same gain characteristic as

traditional asymmetrical half bridge with turns ratio of 10:7. Next the effect of

range winding will be explored.

39
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.18 Duty cycle range comparison of asymmetrical half bridge with/without range switch

In Figure 2.18, the duty cycle of two converters at different input voltage are

compared. For traditional asymmetrical half bridge, the duty cycle at 400V is less

than 0.25. With range winding, the duty cycle is extended to 0.34, which is about

40% improvement over traditional asymmetrical half bridge. With extended duty

cycle, the stress on all components will be changed.

First, as shown in Figure 2.19, the voltage stress on the rectifier diodes is

reduced with range winding solution. Without range winding, the voltage stress

on the rectifier diodes is more than 210V, normally 300V diode has to be used.

For range winding solution, the voltage stress on the range winding is reduced to

160V; 200V shottky diode can be used. With shottky diode, forward voltage drop

and reverse recovery loss are reduced significantly. For traditional asymmetrical

half bridge, the secondary conduction loss is around 25W at full load condition.

For range winding asymmetrical half bridge, the secondary conduction loss is

reduced to 17W with shottky diodes. In traditional asymmetrical half bridge, the

diode reverse recovery problem is very severe, snubber circuits have to be added

40
Bo Yang Chapter 2. State of the Art Topologies and Improvements

to reduce the ringing caused by reverse recovery current. With shottky diodes, the

reverse recovery problem could be eliminated and snubber could be eliminated.

This will improved the efficiency at high switching frequency. As shown in

Figure 2.20, the current stress on the two rectifier diodes are also more balanced

during normal operation condition, which is beneficial for thermal design.

Figure 2.19 Diode voltage stress comparison

Figure 2.20 Diode average current comparison

41
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Another benefit comes from the decreasing of primary RMS current and turn

off current with extended duty cycle. As shown in Figure 2.21 and Figure 2.22,

the RMS current and turn off current of the primary switches are reduced with

range switching solution. With reduced RMS current, primary conduction loss

could be reduced. With reduced turn off current, switching loss could also be

reduced.

Figure 2.21 Primary switch RMS current comparison

Figure 2.22 Primary switch turn off current comparison

42
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Test circuits were built for these two cases. In Figure 2.24, the test efficiency

for both converters is shown at normal operation condition.

Figure 2.23 Test setup for range winding asymmetrical half bridge

Figure 2.24 Test efficiency at normal operation for range winding solution

From the test efficiency result, it can be seen that range winding can improve

the efficiency at normal operation condition significantly. The drawback is extra

winding on the transformer and several extra devices.

43
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Range winding concept could also be extended to other topologies like full

bridge, and current doubler structure as shown in Figure 2.25.

(a)

(b)
Figure 2.25 Range winding for (a) Full bridge (b) current doubler

2.5 Asymmetrical Winding Asymmetrical Half Bridge

With range winding solution, the performance of front end DC/DC converter

could be improved significantly at high input voltage condition. This method

could be extended to other isolated DC/DC topologies. The drawback of range

44
Bo Yang Chapter 2. State of the Art Topologies and Improvements

winding solution is that extra windings, diodes, switch and control circuit are

needed, which makes this solution very complex. For asymmetrical half bridge

with current doubler, another simpler yet effective solution is possible:

asymmetrical winding asymmetrical half bridge.

For asymmetrical half bridge with current doubler, it has one transformer and

two inductors as shown in Figure 2.26. This topology could be transformed into a

two-transformer version with same operation and characteristic. The transform is

demonstrated in Figure 2.27. Each step of the transformation is reversible, so

these two topologies are exactly the same when the two transformers have same

turns ratio as the single transformer.

(a)

(b)
Figure 2.26 Half bridge current doubler with (a) one transformer and (b) Two transformers

45
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.27 Topology transformation of current doubler

With two transformers, another dimension of freedom is provided to the

designer. With different turns ratio for these two transformers, some interesting

phenomenon could be observed.

For traditional asymmetrical half bridge, the equation for duty cycle in

relationship with input, output voltage and turns ratio is:

Vin ⋅ (1 − D) ⋅ D
Vo =
np

For two-transformer asymmetrical half bridge, the duty cycle will be:

Vin ⋅ (1 − D) ⋅ D
Vo =
n p1 ⋅ D + n p 2 ⋅ (1 − D)

These equations are drawn in Figure 2.28. When the two transformers have

same turns ratio, maximum gain is achieved at duty cycle equals to 0.5. This is

same characteristic for one transformer asymmetrical half bridge. When the two

transformers have different turns ratio, the maximum gain will be shifted from

duty cycle equals to 0.5. When np1 is larger than np2, the maximum gain will

46
Bo Yang Chapter 2. State of the Art Topologies and Improvements

shift to smaller duty cycle. When np1 is smaller np2, the maximum gain will shift

to larger duty cycle.

Figure 2.28 DC characteristic for different np ratio

The design goal for front end DC/DC converter is to optimize the performance

at high input voltage. To achieve this goal, we would like to extend the duty cycle

at high input voltage. From this prospective, np1 smaller than np2 is preferred.

With np1 smaller than np2, the maximum gain will shift to duty cycle larger than

0.5 and the DC characteristic will tilt toward right. With this effect, the duty cycle

at high input voltage will be extended too.

The duty cycle for the single transformer asymmetrical half bridge is:

Vin − Vin2 − 4 ⋅ Vin ⋅ Vo ⋅ np

D=
2 ⋅ Vin

47
Bo Yang Chapter 2. State of the Art Topologies and Improvements

The duty cycle for two transformers asymmetrical half bridge is:

Vin + Vo ⋅ (np 2 − np1) − Vin2 + Vo2 ⋅ (np 2 − np1) 2 − 2 ⋅ Vin ⋅ Vo ⋅ (np1 + np 2)

D=
2 ⋅ Vin

In Figure 2.29 duty cycle range for different np1 to np2 ratio are shown. With

smaller np1 to np2 ratio, the duty cycle at 400V could be shifted closer to 0.5.

Now the question is what ratio of np1 to np2 should be chosen. To answer this

question, the impacts of different np1 to np2 ratio need to be investigated. In the

following part, the secondary diode voltage stress, current stress, output current

ripple and inductor current will be analyzed.

Figure 2.29 Duty cycle range with different turn ratios

For asymmetrical half bridge, because of the high voltage stress on the

rectifier diode, high voltage rating diodes have to be used. This increases the

conduction loss and switching loss of secondary rectifier significantly. In fact, the

48
Bo Yang Chapter 2. State of the Art Topologies and Improvements

secondary rectifier contributes almost half of the total loss. If the voltage stress of

secondary diodes could be reduced so that lower voltage diodes could be used, the

efficiency could be improved significantly.

For two transformer asymmetrical winding asymmetrical half bridge, the

voltage stresses of the secondary diodes are:

D ⋅ Vin np 2
VD1 = + Vo ⋅ (1 − )
np1 np1

(1 − D) ⋅Vin np1
VD1 = + Vo ⋅ (1 − )
np 2 np 2

In these equations, when np1 equals to np2 is used, it will be the voltage stress

for traditional asymmetrical half bridge. Next the current of the two current

doubler inductors will be analyzed. From the charge balance for the primary DC

blocking capacitor, the current of two output inductors could be derived as:

D ⋅ I o ⋅ np1
I L1 =
D ⋅ np1 + (1 − D) ⋅ np 2

(1 − D) ⋅ I o ⋅ np 2
I L2 =
D ⋅ np1 + (1 − D) ⋅ np 2

49
Bo Yang Chapter 2. State of the Art Topologies and Improvements

(a)

(b)
Figure 2.30 Operation waveforms of (a) asymmetrical half bridge and (b) asymmetrical winding

asymmetrical half bridge

np1
I1 = I L 2 + I L1
np 2

np 2
I 2 = I L1 + I L2 .
np1

Above I1 and I2 is also the current stress on the two output diodes. It can be

seen that the two diodes have very different current stress. One diode will see

very high current while the other one only pass through very small current.

Above equations are drawn in Figure 2.31 to Figure 2.33.

50
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.31 Diode voltage stress for asymmetrical winding asymmetrical half bridge

Figure 2.32 Diode current stress for asymmetrical winding asymmetrical half bridge

51
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.33 Output current ripple for asymmetrical winding asymmetrical half bridge

From above analysis, we can see that the voltage stress on the output diodes is

reduced with asymmetrical winding solution. The penalty is the discontinuous

output current and unbalanced current stress on the output diodes. This unbalance

will also show in the power transfer ratio of the two transformers.

By balancing all these aspects, np1 to np2 ratio of 1:3 is chosen. With this

ratio, the voltage stress of two diodes could be limited below 150V so that 200V

shottky diodes could be used.

Figure 2.34 to Figure 2.36 shows the test circuit, test waveform and

efficiency. From the test result, efficiency could be improved by 1.5% with this

solution. The performance improvement of this solution is not as good as range

winding solution, but because of its simplicity, it is a good solution for

asymmetrical half bridge converter.

52
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.34 Test circuit diagram of asymmetrical winding asymmetrical half bridge

Figure 2.35 Test waveforms of asymmetrical winding asymmetrical half bridge

0.96
Traditional Asy. HB
Asymmetrical Winding
0.95

0.94
Efficiency

0.93

0.92

0.91

0.9
0 5 10 15 20 25
Load Current (A)

Figure 2.36 Test efficiency of asymmetrical winding asymmetrical half bridge

53
Bo Yang Chapter 2. State of the Art Topologies and Improvements

2.6 QSW Synchronous Rectification

2.6.1 Synchronous Rectifier for front end DC/DC Converter

In low voltage, high current application, secondary rectifier conduction loss is

dominant in total system loss. With advanced power MOSFET technology, the

conduction loss of a MOSFET is much less than diodes. Synchronous rectifier

has been a must technology for low voltage, high current application. For front

end DC/DC application, output current is higher than 20A. With diode rectifier,

the conduction loss is a big part in total converter loss too. For example, with

300V diode in asymmetrical half bridge, the conduction loss of secondary diodes

is about 25W, which is more than 30% of total loss. In this part, the synchronous

rectification for this application will be discussed.

For front end DC/DC application, the voltage stress on the rectifier diodes is

much higher than low voltage application. To verify the viability of synchronous

rectification in front end DC/DC application, conduction loss for different devices

will be compared first. For front end DC/DC converter, output voltage is 48V.

The voltage stress for secondary diodes is shown in Figure 2.37. For asymmetrical

half bridge, voltage stress on the diodes is higher than symmetrical half bridge

and full bridge. With a safe margin, the device chosen for asymmetrical half

bridge are 300V devices while for range winding, asymmetrical winding,

symmetrical half bridge and full bridge, 200V devices could be used. Searching

the available devices, following devices are been used for comparison:

54
Bo Yang Chapter 2. State of the Art Topologies and Improvements

300V diode: STTH3003 from IXYS, Vf=1.2V with trr=40ns.

300V MOSFET: MTW32N25E from On-Semi, Rdson=80mohm.

200V diode: MUR202000, shottky diode with Vf=0.9V.

200V MOSFET: MTY55N20E from On-Semi,, Rdson=28mohm.

Figure 2.37 Rectifier diode voltage stress of different topologies

Figure 2.38 Conduction loss comparison of different devices

55
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.38 shows the conduction loss for different devices with load change.

As seen in the graph, 200V MOSFET could provide much improved performance

with current in 20A range over 200V diode. For 300V devices, single MOSFET

cannot provide much different, only with more MOSFET in parallel so that the

conduction loss can be reduced. It doesn't make much sense to parallel two or

more MOSFET here since the thermal is manageable with only one device. To get

improved performance with same amount of devices, 200V will be more

meaningful. With voltage stress shown in Figure 2.37, it can be seen that

asymmetrical half bridge will not get much benefit from synchronous

rectification. For asymmetrical winding asymmetrical half bridge, range winding,

full bridge and symmetrical half bridge converter, 200V devices could be used. In

these topologies, synchronous rectifier might be beneficial.

For range winding solution, with synchronous rectifier, the converter will

become very complex. Also the improvement will be limited since performance

of 200V diode is not so bad.

For asymmetrical winding asymmetrical half bridge, it is possible to use

synchronous rectifier. The problem is the unbalanced current stress on the two

rectifier diodes. As shown in Figure 2.39, two rectifier diodes see very different

current stress. Without parallel devices, synchronous rectifier will not show much

improvement over one diode. With two 200V MOSFET parallel as one

56
Bo Yang Chapter 2. State of the Art Topologies and Improvements

synchronous rectifier, it is possible to reduce the conduction loss with the price of

more devices as shown in Figure 2.40.

Figure 2.39 Rectifier diodes current stress for asymmetrical winding asymmetrical half bridge

Figure 2.40 Conduction loss comparison of 200V diode and MOSFET

For symmetrical half bridge and full bridge converter, they will be good

candidates to demonstrate the benefits of synchronous rectifier. In this part,

symmetrical half bridge will be used to demonstrate this technique as shown in

57
Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.41. All the method discussed here could be used for full bridge

converter.

Figure 2.41 Circuit diagram of half bridge current doubler with synchronous rectifier

Figure 2.42 Test waveform of synchronous rectifier for front end converter'

Figure 2.42 shows the test waveform for symmetrical half bridge with

synchronous rectifier. From the waveform, a huge current spike and voltage

ringing could be observed. All these spikes are caused by the reverse recovery of

body diodes of synchronous rectifier as shown in Figure 2.43

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

The two synchronous rectifiers are working complementary with primary

switches. Before Q2 is turned on, S1 has to be turned off first; otherwise a short

circuit will exist. To guarantee the safe operation, a dead time is inserted between

turning on of Q2 at t3 and turning off of S1 at t2. During the dead time,

synchronous rectifier S1 is turned off. The current will flow through the body

diode of synchronous rectifier S1. When Q2 is turned on at t3, the body diode of

S1 will be forced turn off. Since the body diode of MOSFET is very slow, a huge

reverse recovery current will appear. This reverse recovery current will also cause

voltage ringing on the synchronous rectifier.

Figure 2.43 Operation waveform of synchronous rectifier for front-end converter

With the problem identified, the solution will be a method, which could

prevent the conduction of the body diode of synchronous rectifier. Quasi Square

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

Wave (QSW) synchronous rectification is proposed to solve this problem. The

concept of QSW synchronous rectification is shown in Figure 2.44.

2.6.2 QSW Synchronous Rectifier

The idea is by reducing the filter inductor, the ripple current of each inductor

will increase, at some point, the ripple will be large enough so that the direction of

the current will change during each switching cycle. As seen in the graph, if the

inductor current goes to negative, at time t2 when the synchronous rectifier S1 is

turned off, the current is flowing through drain to source. This current cannot go

through the body diode. So when synchronous rectifier is turned off, the body

diode will not conduct. This way, the conduction of body diode is prevented.

Figure 2.44 Operation waveform of QSW synchronous rectifier

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.45 Operating mode 1 of half bridge with synchronous rectifier

Figure 2.46 Operating mode 2 of half bridge with synchronous rectifier

Figure 2.47 Operating mode 3 of half bridge with synchronous rectifier

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.48 Operating mode 4 of half bridge with synchronous rectifier

Figure 2.49 Operating mode 5 of half bridge with synchronous rectifier

Another benefit is Zero Voltage Switching. To use 200V MOSFET,

symmetrical half bridge is used. With symmetrical half bridge, ZVS cannot be

achieved. With QSW synchronous rectification, we can achieve ZVS for the

primary switches. At time t2, synchronous rectifier S1 is turned off. Since the

current is negative, it cannot go through the body diode. Then this current will be

flow through transformer. This current then reflects to primary side of the

transformer and it will discharge the output capacitor of primary switch Q1 and

Q2 so that ZVS could be achieved.

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

With QSW synchronous rectification, reverse recovery problem of body

diodes of synchronous rectifier could be solved. Primary switches also can

achieve ZVS. But to achieve QSW operation mode, the inductor current ripple

will be very large. The question is how much increasing of conduction loss will

be caused by large current ripple.

For secondary two synchronous rectifiers, the current flowing through them is

the sum of two inductor currents as seen in Figure 2.44. Since the two inductor

currents are out of phase to each other. When they add up, the ripple will be much

smaller. So for secondary side, the large current ripple will not show up. The

question is the primary side two switches. For this technique, the primary

switches will see the current ripple of each individual inductor. So conduction

loss of primary switches will increase. But in this application, the primary

conduction loss is not significant in total loss. As shown in Figure 2.50 although

the primary conduction loss will increase about 35%, still better efficiency could

be expected because of reduced conduction loss of secondary side and zero

voltage switching for primary switches.

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.50 Primary loss comparison of QSW and conventional synchronous rectifier

Figure 2.51 shows the test circuit of half bridge with QSW synchronous

rectifier. It is working as symmetrical half bridge.

Figure 2.51 Test circuit of QSW synchronous rectifier

The test waveform is shown in Figure 2.52 for light load and in Figure 2.53

for heavy load. QSW operation mode could be identified from the negative

current. There is no current spike in QSW operation mode. The efficiency test

results are shown in Figure 2.54. With QSW synchronous rectification, the

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efficiency at full load could reach 95%. For synchronous rectifier without QSW,

after push output current over 10A, the devices will be destroyed by excessive

reverse recovery loss.

Figure 2.52 Test waveform of QSW synchronous rectifier at light load

Figure 2.53 Test waveform of QSW synchronous rectifier at heavy load

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.54 Test efficiency of half bridge with QSW synchronous rectifier

QSW synchronous rectification could effectively eliminate body diode reverse

recovery problem of synchronous rectifier. With current doubler output filter, the

current ripple on synchronous rectifier will not increase significantly compared

with non-QSW mode. This method could be implemented to other topologies too.

Figure 2.55 shows the diagram of Phase shift full bridge with QSW synchronous

rectifier. In other application where synchronous rectifier is used, this method

could also provide a simple solution to the body diode reverse recovery issue.

Figure 2.55 Full bridge with QSW synchronous rectifier

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

2.7 Summary and issues

In this chapter, several techniques are presented to improve the performance

of half bridge converter. The target is to improve the efficiency at normal

operation mode.

Figure 2.56 Efficiency comparison of different methods

Range winding solution can effectively improve the efficiency at high input

voltage and use range winding to cover wide input range. It enables the design to

be concentrated only on the performance of our interest and gives best

performance possible. However, to implement range winding solution, extra

components are needed which makes this solution very complex.

Asymmetrical winding solution is a simpler yet effective solution for

asymmetrical half bridge converter. This method doesn't need extra components.

With asymmetrical winding, the duty cycle at high input voltage could be

extended. With extended duty cycle, the voltage stress of output rectifier could be

reduced so that shottky diode could be used. With shottky diode, conduction loss

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

and switching loss could be reduced. There are some side effects of this method.

With asymmetrical winding, the output current will be discontinuous. This

requires more output capacitor. Also, the current stress is unbalanced for

secondary devices. In the design, this should be taken into consideration.

The QSW synchronous rectification technique, which enables the using of

synchronous rectification in this application, could reduce the conduction loss and

also help primary switches to achieve zero voltage switching. With QSW mode,

the body diode of synchronous rectifier will never conduct. Primary switches can

achieve zero voltage switching at whole load range. Currently, because of the

limitation of device, only when the voltage stress is lower than 200V,

synchronous rectifier shows benefit over diode rectifier. These limits the

topologies could use this technology. With more advanced power MOSFET

technology, this limitation could be raised to high voltage. It will enable wider

range of application for QSW synchronous rectification. The other problem with

QSW synchronous rectifier is the high turn off current for primary switches,

which will introduce high switching loss. This makes QSW synchronous rectifier

not suitable for high switching frequency.

Compare the efficiency and complexity, range winding provides highest

efficiency at normal operation with relatively simple circuit.

Although these methods could improve the efficiency of front-end converter

at normal operation, to achieve high power density and low profile, high

switching frequency operation is also necessary. But for both the state of the art

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topologies, switching loss is a big obstacle for high frequency operation. Here the

switching loss just take turn off loss of primary power MOSFET into

consideration. From Figure 2.57, if switching frequency increases to 400kHz,

switching loss will be much higher. This will require more space for thermal

management of the power devices. This is a big limitation for PWM converter to

achieve high power density.

Figure 2.57. Primary switch total loss for different switching frequency

Figure 2.58 Half bridge converter with snubber circuit

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

Figure 2.59 Test waveform with and without snubber circuit

Another problem for the state of the art topologies is the reverse recovery

problem of secondary rectifier diodes. As seen in Figure 2.59, with diode

reverse recovery, the current stress and voltage stress is a serious problem. With

saturable core snubber shown in Figure 2.58, the problem could be reduced as

shown in Figure 2.59. The problem is for snubber circuit; thermal problem and

high loss prevent them to operate with high switching frequency. With 200kHz

switching frequency, the temperature of the saturable core is already 85 degree.

Figure 2.60 Prototype of 200kHz asymmetrical half bridge with discrete components

Figure 2.60 shows the prototype of a 200kHz asymmetrical half bridge

converter. Magnetic and capacitor occupied huge space in the system. Non

uniform profile also wasted lot of space. In fact, the active switches and the

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Bo Yang Chapter 2. State of the Art Topologies and Improvements

driver also take lot of space in the system. In next chapter, the advanced

packaging technology will be discussed for this converter. As will be

demonstrated in next chapter, with advanced packaging technology, the power

density of the converter could be significantly improved.

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Chapter 3

Integrated Power Electronics Module

3.1 Introduction
To achieve high power density, low profile, the fundamental approach of

electrical power processing is steadily moving toward high switching frequency.

From previous analysis, high switching loss and high stress limited the ability to

operate front end DC/DC converter at higher switching frequency.

From the history of power electronics, the technology improvements in power

semiconductors have been the driving force for this problem. Moving from

bipolar to MOSFET technology has greatly increased switching speed. For

current semiconductor technology, very fast devices are available. For the power

MOSFET used in front end application, they could be switched with mega hertz

frequency range. The limiting factor now is the packaging technology. Because of

the parasitic inductance and capacitance due to the packaging technology, the

switching action has to be slowed down to limit the stress and undesirable noise

problem. This limited the ability to reduce the switching loss of the devices.

For a typical front-end converter, individual power devices are mounted on

the heat sink. Driver, sensors and protection circuits are implemented on a PCB,

which is mounted close to power devices. The power devices are packaged with

wire bonding technology. This kind of package has several limitations: first, the

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parasitic related to the wire bond and PCB connection is very large; second, with

wire bond technology, three-dimensional integration is not possible which limits

the electromagnetic layout and thermal management. Some manufacturers have

taken a more aggressive approach by integrate power semiconductors in die form

on one common substrate with wire bonding. This approach provides some

improvement by putting devices closer, but it doesn’t resolve the limitations of

traditional packaging technology.

Figure 3.1 shows the circuit diagram and switching waveform of a totem pole

switches with interconnect parasitic considered with wirebond technology. When

the MOSFET is switched at high current, those parasitic will introduce high stress

on the devices. High voltage spike and ringing exists when turning off the switch.

As switching speed increasing, the voltage overshoot will increase.

Figure 3.1 Totem pole switches with parasitic inductance and Q2 Vds (100V/div)

Another problem comes from the gate related parasitic. As shown in Figure

3.2, the gate driver loop shares Ls with power path. This will greatly impact the

switching performance of switches. During turn off of upper switch Q1, Ls will

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introduce a voltage VLs in the gate loop. This voltage will slow down the turn off

speed thus introduce higher switching loss.

Figure 3.2 Impact of gate loop parasitic

Other than these electrical performance impacts of current packaging

technology, thermal and noise problem will also greatly impact the capability of

these technology for higher switching frequency.

From above discussion we can see, while power devices are still one of the

major barriers for future power system development, it doesn’t currently pose the

fundamental limitations to power conversion technology. It is rather packaging,

control, thermal management and system integration issues that are the major

barriers limiting the fast growth of power conversion applications. To address

these issues, advanced packaging technology is essential.

Another important issue for high power density is the packaging of passive

components like magnetic and capacitors, which occupied biggest part of the

system. With trend of low profile, planar magnetic is a must technology. With

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planar magnetic, passive integration technique could be realized with high power

density, low profile and better thermal performance.

In this part, the planar metalization device connection, which allows three-

dimensional integration of power devices, and integration of power passives to

increase the power density, as these dominate the physical size of the system, will

be discussed.

3.2 Integrated Power Electronics Module for Front end DC/DC

Figure 3.3 shows a diagram for a front-end DC/DC converter for distributed

power system with asymmetrical half bridge and current doubler configuration.

Figure 3.3 Schematic of front end DC/DC with asymmetrical half bridge current doubler

From previous discussion, we know that the parasitic inductance in the

switching commutation path is important to the switching losses and the ringing

amplitude. By integrating bare dies of switching devices together using planar

integration technology, it can be expected that the parasitic inductance due to

packaging be greatly reduced. To further reduce the impact of parasitic

inductance, decoupling capacitor is needed. In discrete-component-based design,

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Bo Yang Chapter 3. Integrated Power Electronics Module

the high frequency decoupling capacitor is paralleled with the DC link electrolytic

capacitor and physically installed at the device terminals. By integrating the

capacitor into the package, the interconnection from the capacitor to DC/DC

switch is simplified and the decoupling effect is improved. Besides the concern of

the parasitic inductance in the power path during switching commutation, the

common source inductance between gate driver path and the main power path

affects switching loss greatly too. During turn-off, the voltage drop on the

common source inductance dynamically reduces gate voltage slew rate applied to

the gate of MOSFET die, the switching speed is slowed down and this limits the

switching loss reduction. Integrating the gate driver circuitry along with the

devices further reduces the effective gate driver loop inductance.

In the front-end DC/DC converter, the size and dimensions of the passive

components strongly affects the total size and volume of the converter. To

achieve low profile of the converter, a planar magnetic component is always

preferred. To further increase the power density and reduce the profile, there is a

demand for the integration of passive components into one planar module, which

is known as passive IPEM. The original work of an integrated inductor-capacitor

structure led to the development of a planar technology to integrate inductors,

capacitors and transformers (L-C-T) for resonant converter applications The

integration of passive components for PWM AHB DC/DC converter is another

application of L-C-T technology for DC/DC converters.

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Figure 3.4 System partitioning of front end DC/DC converter

From above discussion, the front end DC/DC system could be divided into

several blocks as shown in Figure 3.4. One block is the active switches and their

drivers that include all the paths sensible to parasitic inductance. Another block is

the passive components. With these two blocks, the most critical components for

electrical performance and power density are included. Because of the different

materials used for these blocks, it is difficult to integrate all these components into

one module. Here two IPEMs are been identified and developed: active IPEM and

passive IPEM.

3.2.1 Active IPEM

For active IPEM, our target is to develop a packaging technology, which

provides three-dimensional planar packaging. With three-dimensional planar

structure, low profile system could be achieved. Also, with real three-dimensional

planar structure, thermal characteristic could be improved. As high switching

frequency is our target for system design, lower parasitic is another important

criteria for desired packaging technology. Several technologies were been

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developed in CPES. They are Die Dimension Ball Grid Array, Dimple Array

Integration, and Embedded Power technology.

Flip-chip-on-flex (FCOF) power switching stage modules consist of discrete

power chip packages with some of the gate driver components. These chip

packages are named Die-Dimensional Ball Grid Arrays (D2BGAs) that comprise

a power chip, inner solder bumps, high-lead solder balls, and molding resin.

Figure 3.5(a) shows a D2BGA package. The cross section of the package

structure is illustrated in Figure 3.5(b). The chip-scale packaged devices are

flipping soldered to a patterned flexible substrate. An organic underfill material is

introduced into the gap between the packages and substrate to enhance

mechanical adhesion and reliability by distributing stresses caused by the

mismatched coefficients of thermal expansion between the chip and substrate. To

complete the electrical circuitry and achieve good thermal performance, the

backsides of the power chips are soldered on to a patterned direct bond copper

(DBC) substrate. Finally, the power stage is encapsulated. The photo in Figure

3.5(c) shows a prototype of the packaged FCOF switching power stage module.

Figure 3.5 (a) D2BGA IGBT chip-scale package, (b) schematic of FCOF power switching stage

module structure, and (c) FCOF power switching module prototype.

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Aiming at enhancing thermal fatigue reliability of solder bumping

interconnects in power packaging applications, we have developed the Dimple

Array Interconnect (DAI) technique. DAI packaging involves the use of copper

flex/sheet with arrays of preformed dimples, which serve as both electrical

interconnections and heat removal paths. As shown in Figure 3.6(a), the key

feature of DAI is its dimpled metal interconnects, which are convex valleys on

metal sheet protruding from one side, that enable easy forming of solder joints

with underlying devices. The resultant smooth fillets in solder bumps could

significantly reduce thermally induced stresses and strains. An integrated DAI

power switching stage module is schematically shown in Figure 3.6(b). The DAI

module is realized by solder-attaching DAI power devices, such as diodes and

IGBTs, onto DBC substrate, followed by underfilling and encapsulation. Because

only one type of solder is needed to form the dimple solder joint, there are more

options to select a solder of different melting temperatures for the surface mount

(SMT) gate driver and control components. The prototype Dimple Array

Interconnect Power DAI power switching is shown in Figure 3.6(c).

Figure 3.6 (a) Schematic of Dimple Array Interconnect, (b) integrated DAI power switching stage

module, and (c) prototype Dimple Array Interconnect power switching stage module.

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Embedded power technology has been developed for integrated packaging of

integrated power electronics modules (active IPEMs), which are usually

comprised of power switches and associated electronics circuitry. Figure 3.7(a)

shows the conceptual structure of the embedded power packaged module. It

consists of three levels: electronic components, a multiple embedded power chip

stage, and a base substrate (from top to bottom). These three parts are soldered

together to build a final module. The electronics circuitry includes a gate driver

and control and protection components. The base substrate provides electrical

interconnection and cooling of power chips. The core element in this structure is

the embedded power stage that comprises the ceramic frame, power chips (silicon

in the figure), isolation dielectrics and metalized circuit. Inside the power stage,

multiple bare power semiconductor dies, featuring vertical semiconductor

structures with topside and backside electrode pads, are directly buried in a

ceramic frame. Table I summarizes the fabrication steps of an embedded power

module. They are the ceramic cutting, device mounting, dielectric printing and

metalization. One of the features of this technology is its mask based processing.

The metalized base substrate is patterned using photolithography, the dielectric

polymer is applied with a screen-printing method, and the chip-carrier ceramic

frame is fabricated by computer controlled laser machining.

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(a) (b)
Figure 3.7 (a) Schematic integration structure of embedded power module and (b) circuit diagram

Compare these three technologies; first two technologies are still based on

traditional packaging concept with different interconnection method. Embedded

power technology is one step further in three-dimensional packaging, which is a

true planar structure with compatible process as planar integration technology. It

is used to build the IPEM for distributed power system.

Figure 3.7(b) shows the schematic diagram based on the totem-pole structure

with high- and low-side drivers and control. The half-bridge consists of two

MOSFET devices and gate drivers using three ICs. Figure 3.8 depicts the

assembly processes following the embedded power stage and the final packaged

module. Figure 3.8(a) and (b) present the top and bottom views of the embedded

power stage. Figure 3.8(c) shows components mounted on the topside of the

metalized pattern. An Al2O3 DBC substrate with 10mil-thick Cu on both sides of

25 mil-thick ceramic was used as the base substrate, which was pattern etched on

one side (Figure 3.8(d)), while the other side is attached directly to the heat

spreader. Figure 3.8(e) shows the power stage solder-mounted to the substrate.

Finally, after the gate driver had been mounted and connected to the power stage,

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the entire module was encapsulated with protruding input/output pins (Figure

3.8(f)). The completed module measures 30x27x10mm.

Figure 3.8 Assembly process of embedded power module: (a) top view of embedded power stage,
(b) back view of embedded power stage, (c) components attachment on top, (d) patterned DBC for
base substrate, (e) soldered on substrate, and (f) final encapsulated module.

3.2.2 Passive IPEM

In order to integrate the electromagnetic power passive components into

modules, passive integration technology was developed. The technology can be

best described by first considering a simple bifilar spiral winding as shown in

Figure 3.9. This structure consists of two windings (A-C and B-D), separated by a

dielectric material. This resultant structure has distributed inductance and

capacitance and is best described as an electromagnetically integrated LC

resonant structure for which the equivalent circuit characteristics depend on the

external connections. With more winding layers, more complex integrated

structures can be realized. This has been demonstrated with an integrated structure

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as shown in Figure 3.9. With this technology, the classical term “parasitic”

therefore no longer applies and all the higher order impedances are rather referred

to as structural impedances. This technology mostly been implemented in

resonant converter applications. Here, it is also been used in the asymmetrical half

bridge front end DC/DC converter. In this application, the planar passive

integration technology, together with planar integrated magnetic technology, were

combined to integrated all the high frequency passive components.

Figure 3.9 (a) Spiral integrated LC structure with distributed capacitance and possible external

connection configurations, (b) simplified equivalent circuit, and (c) exploded view.

For asymmetrical half bridge converter, two integration steps are used to

integrate all the passive components except output filter capacitor into one

structure.

The schematic of the passive components in asymmetrical half bridge with

current doubler is shown in FIG. There are two filter inductor, two transformers,

and on DC blocking capacitor. Integrated magnetic concept could be used to

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integrate all the magnetic components into one magnetic structure. This integrated

is realized as shown in FIG. It is discussed in detail in [C17][C18][C20]. With

two E cores, the two transformers could be constructed on the two outer legs. Its

magnetizing inductance is used to build the filter inductors.

Figure 3.10 Magnetic integrated for asymmetrical half bridge converter

As low profile is another important aspect for front end DC/DC converter

development, planar magnetic design is preferred to reduce passive components

profile. FIG shows the design of planar integrated magnetic. It is built with two

planar E cores and one I core. In this structure, I core has the same function as the

center leg in previous design.

Figure 3.11 Planar integrated magnetic for current doubler rectifier

With planar integrated magnetic, next the passive integration method will be

applied to integrate the DC blocking capacitor into the structure. As shown in

FIG, the DC blocking capacitor is implemented in transformer T1 by using the

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hybrid winding technology, The hybrid winding is implemented using copper

traces on both sides of the winding and a dielectric layer placed in the middle to

enhance the capacitive component of the winding. The transformer T2 is

implemented according to conventional planar low-profile transformer

technology. The inductances of the current doubler are realized by the

magnetizing inductances of both transformers. Figure 3.12 shows a picture of the

final passive IPEM implemented for the AHB DC/DC converter.

Figure 3.12 Explored view and photo of passive IPEM

3.3 Performance evaluation

With the use of IPEMs, the front-end converter design takes advantage of the

modular design. Besides to the benefit of easy assembly and the reduced overall

volume, the active IPEM itself also offers electrical performance improvements,

such as the switching loss reduction and the lower voltage stress. Since it is

difficult to directly measure the losses in the devices after being installed in the

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converter, the simulation based on SaberTM is used to analyze the effects of the

parasitic reduction in the front-end converter.

To build the simulation model, the device models for the power devices are

first verified. SaberTM provides the modeling tool for the power MOSFETs and

some manufacturers provide the model for some devices. However no any

manufactures guarantee the accuracy of their models. Therefore efforts must be

taken to verify the model accuracy for the expected operating conditions. Since

the switching stress and losses are of major concern, the gate charge and the V/I

characteristics are obtained in simulation to compare with the data sheet. As

shown Figure 3.13 and Figure 3.14, the model matches the data sheet quite well.

Figure 3.13 Gate charge curve of IXFH21N50 (a) Datasheet, (b) simulated

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Figure 3.14 V/I characteristic of IXFH21N50 (a) datasheet and (b) simulated

Next, the parasitic parameters of discrete approach and IPEM are extracted

based on the impedance measurement method. The resultant parasitic inductance

is shown in Figure 3.15. Compare these two models: first all the parasitic

inductances are greatly reduced; second, in active IPEM, the gate loop doesn’t

share inductance with power loop. These two aspects will provide significant

improvement on electrical performance.

(a) (b)
Figure 3.15 Parasitic of (a) discrete MOSFET and (b) Active IPEM

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The switching circuit for the active IPEM and the discrete components is

built, which includes the parasitic inductances insides the device package and gate

driver circuitry. The gate driver pulse is set as ideal square waveform. At 1kW

power level, the peak switched current is about 10A. Figure 3.16 shows the

simulated waveform of drain source voltage. With active IPEM, the voltage

overshoot is reduced to 416V compared with 460V for discrete version. The turn-

off loss is reduced from 48uJ to 25uJ by using IPEM. Considering 200kHz

operation of DC/DC converter, the turn-off loss is reduced by 8W with 4ohm gate

resistance. This translated into about 1% efficiency increase of the front-end

converter and 10% loss. Figure 3.17 and Figure 3.18 shows the improvements of

active IPEM for different gate resistance.

(a)

(b)
Figure 3.16 Simulation waveforms of Q1 drain source voltage (a) Discrete, and (b) IPEM

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Figure 3.17 Active IPEM turn-off loss reduction

480
470 IPEM
460 Discrete
450
Vds (V)

440
430
420
410
400
390
0 2 4 6 8 10
Rg (Ω)

Figure 3.18 Voltage overshoots improvement by IPEM

With passive IPEM, all the passive components except output filter capacitor

are integrated into one single package. This could greatly reduce the volume of

passive components. Another benefit is from planar design. With planar structure,

thermal characteristic of the passive IPEM is improved significantly compared

with traditional magnetic structure. In following part, three prototypes were built

and compared. They are shown in Figure 3.19. All three prototypes are

asymmetrical half bridge with current doubler. First prototype is based on discrete

passive design. Second prototype use integrated magnetic technology. Third

prototype is built with passive and active IPEM. With discrete passive

components, the total volume of passive components is 343cm3. By applying

integrated magnetic concept, it is reduced to 258cm3. With passive IPEM, all the

passive components except output filter capacitors are integrated. A volume of

87cm3 is achieved, which is five times improvement as shown in Table 3-1.

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(a)

(b)

(c)
Figure 3.19 Photos of three prototypes to be compared (a) discrete design, (b) integrated magnetic

design and (c) Passive IPEM design

Figure 3.20 Test efficiency of three prototypes

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Table 3-1 Comparison of three prototypes

(a)

(b)

(c)
Figure 3.21 Temperature test setup for three prototypes

Table 3-2 Temperature test results of three prototypes

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Another benefit from passive IPEM is improvements on thermal

characteristic. These three prototypes are tested. Figure 3.21 shows the test setup.

For each structure, 5 thermal couplers are embedded into the structure. Table 3-2

shows the test results. Compare these three prototypes, one significant

improvements of IPEM is the uniform distribution of temperature, which means

better thermal characteristic. For discrete version, with more material, although

the lowest temperature is lower, hot spot shows even higher temperature than

passive IPEM. With integrated magnetic design, the volume is reduced, but hot

spot temperature is much higher than discrete version. With passive IPEM, the

structure volume is reduced by 5 times; at the same time the temperature is even

lower than the discrete version.

3.4 Summary
In this chapter, the advanced packaging for front end DC/DC converter is

discussed. To achieve high power density and low profile, high switching

frequency is necessary. Currently, the power MOSFET could be switches at very

high frequency. The high stress and loss limited the ability to use these devices at

high switching frequency. These problems are mainly caused by the parasitic

components in the circuit. Thermal management also imposes a limitation on the

power density achievable with current packaging technology.

Two IPEMs are identified for front end DC/DC converter: active IPEM and

passive IPEM. Active IPEM mainly focused on the improvements on parasitic

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and thermal issues, while passive IPEM is focused on improved the power density

of passive components with advanced passive integration technology.

With embedded power technology, two switches in totem pole configuration,

gate driver and filter capacitor are integrated with planar 3D packaging. With

active IPEM, the parasitic inductance is reduced to less than 10% or discrete

devices. With reduced parasitic, voltage stress and switching loss are significantly

reduced.

Passive IPEM is constructed with combination of different technologies:

integrated magnetic, planar magnetic and passive integrate technologies. With

passive IPEM, three passive components: transformer, filter inductor and DC

blocking capacitor, are integrated into one single package. With passive IPEM,

the power density of passive components is improved by 5 times. At the same

time, thermal characteristic is significantly improved. The temperature in the

passive structure is uniformly distributed.

With active IPEM and passive IPEM, the power density and profile of the

front end DC/DC converter are improved.

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Chapter 4

LLC Resonant Converter

4.1 Introduction
In previous chapters, the trends and technical challenges for front end DC/DC

converter were discussed. High power density, high efficiency and high power are

the major driving force for this application. Hold up time requirement poses big

penalty to the system performance. Two methods were proposed in chapter 2 to

solve this problem and improve the efficiency. Range winding solution could

improve the performance at high input voltage significantly, but with extra

devices, windings and control circuit. Asymmetrical winding solution provides a

simpler solution, but could only apply to asymmetrical half bridge topology. Also

it introduced other problems like discontinuous output current and unbalanced

stress.

To catch up with and move ahead of the trend, higher switching frequency,

higher efficiency and advanced packaging are the paths we are taking now.

Within all these issues, a topology capable of higher switching frequency with

higher efficiency is the key to achieve the goal.

With the techniques proposed in chapter 2, the performance at normal

operation could be improved. But none of these methods dealt with the switching

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loss problem of PWM converter. Even with Zero Voltage Switching technique,

the turn on loss could be minimized; turn off loss still limits the capability of the

converter to operate at higher switching frequency.

Resonant converter, which were been investigated intensively in the 80's [B1]-

[B7], can achieve very low switching loss thus enable resonant topologies to

operate at high switching frequency. In resonant topologies, Series Resonant

Converter (SRC), Parallel Resonant Converter (PRC) and Series Parallel

Resonant Converter (SPRC, also called LCC resonant converter) are the three

most popular topologies. The analysis and design of these topologies have been

studied thoroughly. In next part, these three topologies will be investigated for

front-end application.

4.2 Three traditional resonant topologies

In this part, these three topologies will be evaluated for front end DC/DC

application. The major goal is to evaluate the performance of the converter with

wide input range. For each topology, the switching frequency is designed at

around 200kHz.

4.2.1 Series resonant converter

The circuit diagram of a half bridge Series Resonant Converter is shown in

Figure 4.1 [B8]-[B13]. The DC characteristic of SRC is shown in Figure 4.2. The

resonant inductor Lr and resonant capacitor Cr are in series. They form a series

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resonant tank. The resonant tank will then in series with the load. From this

configuration, the resonant tank and the load act as a voltage divider. By changing

the frequency of input voltage Va, the impedance of resonant tank will change.

This impedance will divide the input voltage with load. Since it is a voltage

divider, the DC gain of SRC is always lower than 1. At resonant frequency, the

impedance of series resonant tank will be very small; all the input voltage will

drop on the load. So for series resonant converter, the maximum gain happens at

resonant frequency.

Figure 4.1 Half Bridge Series Resonant Converter

For front end DC/DC application, a SRC is designed to meet the

specifications with following parameters:

Transformer turns ratio: 5:2,

Resonant inductance: 37uH,

Resonant capacitance: 17nF.

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Figure 4.2 DC characteristic and operating region of SRC

Figure 4.3 Simulation waveforms of SRC

With above parameters, the range of Q is from 6 (Full load) to 0 (No load).

With above design, the operating region of the converter is shown in Figure 4.2 as

shaded area. Simulation waveform is shown in Figure 4.3. From the operating

region graph and simulation waveforms, several things could be observed:

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Operating region is on the right side of resonant frequency fr. This is because of

zero voltage switching (ZVS) is preferred for this converter. When switching

frequency is lower than resonant frequency, the converter will work under zero

current switching (ZCS) condition. In fact, the rule is when the DC gain slope is

negative; the converter is working under zero voltage switching condition.

When the DC gain slop is positive, the converter will work under zero current

switching condition. For power MOSFET, zero voltage switching is preferred.

It can be seen from the operating region that at light load, the switching

frequency need to increase to very high to keep output voltage regulated. This

is a big problem for SRC. To regulate the output voltage at light load, some

other control method has to be added.

At 300V input, the converter is working close to resonant frequency. As input

voltage increases, the converter is working at higher frequency away from

resonant frequency. As frequency increases, the impedance of the resonant tank

is increased. This means more and more energy is circulating in the resonant

tank instead of transferred to output.

From simulation waveforms, at 300V input, the circulating energy is much

smaller than 400V input situation. Here the circulating energy is defined as the

energy send back to input source in each switching cycle. The more energy is

sending back to the source during each switching cycle, the higher the energy

needs to be processed by the semiconductors, the higher the conduction loss.

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Also from the MOSFET current we can see that the turn off current is much

smaller in 300V input. When input voltage increases to 400V, the turn off

current is more than 10A, which is around the same level as PWM converter.

With above analysis, we can see that SRC is not a good candidate for front

end DC/DC converter. The major problems are: light load regulation, high

circulating energy and turn off current at high input voltage condition.

4.2.2 Parallel resonant converter

The schematic of parallel resonant converter is shown in Figure 4.4 [B14]-

[B17]. Its DC characteristic is shown in Figure 4.5. For parallel resonant

converter, the resonant tank is still in series. It is called parallel resonant converter

because in this case the load is in parallel with the resonant capacitor. More

accurately, this converter should be called series resonant converter with parallel

load. Since transformer primary side is a capacitor, an inductor is added on the

secondary side to math the impedance.

Figure 4.4 Half bridge parallel resonant converter

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Figure 4.5 DC characteristic and operating region of PRC

The parameters of parallel resonant converter designed for front end DC/DC

application are:

Transformer turns ratio: 9:1,

Resonant inductance: 58uH,

Resonant capacitance: 11.7nF.

With above parameters, the range of Q for this converter is 3 (Full load) to ∞

(No load). The operating region of PRC is shown in Figure 4.5 as shaded area.

Simulation waveform is shown in Figure 4.6. From the operating region graph

and simulation waveforms, several things could be observed:

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Figure 4.6 Simulation waveforms of PRC

1. Similar to SRC, the operating region is also designed on the right hand side

of resonant frequency to achieve Zero Voltage Switching.

Compare with SRC, the operating region is much smaller. At light load, the

frequency doesn't need to change too much to keep output voltage regulated. So

light load regulation problem doesn't exist in PRC.

Same as SRC for PRC, the converter is working close to resonant frequency at

300V. At high input voltage, the converter is working at higher frequency far

away from resonant frequency.

From simulation waveforms, at 300V input, the circulating energy is smaller

than 400V input situation. Compare with SRC, it can be seen that for PRC, the

circulating energy is much larger. Also from the MOSFET current we can see

that the turn off current is much smaller in 300V input. When input voltage

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increases to 400V, the turn off current is more than 15A, which is even higher

than PWM converter.

For PRC, a big problem is the circulating energy is very high even at light load.

For PRC, since the load is in parallel with the resonant capacitor, even at no

load condition, the input still see a pretty small impedance of the series resonant

tank. This will induce pretty high circulating energy even when the load is zero.

With above analysis, we can see that PRC is not a good candidate for front

end DC/DC converter too. The major problems are: high circulating energy, high

turn off current at high input voltage condition.

4.2.3 Series parallel resonant converter

The schematic of series parallel resonant converter is shown in Figure 4.7

[B18]-[B20]. The DC characteristic of SPRC is shown in Figure 4.8. Its resonant

tank consists of three resonant components: Lr, Cs and Cp. The resonant tank of

SPRC can be looked as the combination of SRC and PRC. Similar as PRC, an

output filter inductor is added on secondary side to math the impedance. For

SPRC, it combines the good characteristic of PRC and SRC. With load in series

with series tank Lr and Cs, the circulating energy is smaller compared with PRC.

With the parallel capacitor Cp, SPRC can regulate the output voltage at no load

condition. The parameters of SPRC designed for front end DC/DC application

are:

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Figure 4.7 Half bridge series parallel resonant converter

Transformer turns ratio: 6:1,

Resonant inductance: 72uH,

Series resonant capacitor Cs: 17.7nF,

Parallel resonant capacitor Cp: 17.7nF,

Range of Q: 1 (Full load) to ∞ (No load)

The DC characteristic and operating region of SPRC are shown in Figure 4.8.

Simulation waveform is shown in Figure 4.9. From the operating region graph,

several things could be observed:

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Figure 4.8 DC characteristic and operating region of SPRC

Figure 4.9 Simulation waveforms of SPRC

2. Similar to SRC and PRC, the operating region is also designed on the right

hand side of resonant frequency to achieve Zero Voltage Switching.

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From the operating region graph, it can be seen that SPRC narrow switching

frequency range with load change compare with SRC.

Compare the switching waveforms, the input current in much smaller than PRC

and a little larger than SRC. This means for SPRC, the circulating energy is

reduced compare with PRC.

Same as SRC and PRC,, the converter is working close to resonant frequency at

300V. At high input voltage, the converter is working at higher frequency far

away from resonant frequency.

Same as PRC and SRC, the circulating energy and turn off current of MOSFET

also increase at high input voltage. The turn off current is more than 10A.

With above analysis, we can see that SPRC combines the good characteristics

of SRC and PRC. Smaller circulating energy and not so sensitive to load

change. Unfortunately, SPRC still will see big penalty with wide input range

design. With wide input range, the conduction loss and switching loss will

increase at high input voltage. The switching loss is similar to that of PWM

converter at high input voltage.

By analysis, design and simulation of SRC, PRC and SPRC, the conclusion is

that these three converters all cannot be optimized at high input voltage. High

conduction loss and switching loss will be resulted from wide input range. To

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achieve high switching frequency and higher efficiency, we have to look for some

other topologies.

4.3 LLC resonant converter

Three traditional resonant topologies were analyzed in above part. From the

results, we can see that all of them will see big penalty for wide input range

design. High circulating energy and high switching loss will occur at high input

voltage. They are not suitable for front end DC/DC application.

Although above analysis give us negative results, still we could learn

something from it:

For a resonant tank, working at its resonant frequency is the most efficient

way. This rule applies to SRC and PRC very well. For SPRC, it has two resonant

frequencies. Normally, working at its highest resonant frequency will be more

efficient.

To achieve zero voltage switching, the converter has to work on the negative

slope of DC characteristic.

From above analysis, LCC resonant converter also could not be optimized for

high input voltage. The reason is same as for SRC and PRC; the converter will

work at switching frequency far away from resonant frequency at high input

voltage. Look at DC characteristic of LCC resonant converter, it can be seen that

there are two resonant frequencies. One low resonant frequency determined by

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series resonant tank Lr and Cs. One high resonant frequency determined by Lr

and equivalent capacitance of Cs and Cp in series. For a resonant converter, it is

normally true that the converter could reach high efficiency at resonant frequency.

For LCC resonant converter, although it has two resonant frequencies,

unfortunately, the lower resonant frequency is in ZCS region. For this application,

we are not able to design the converter working at this resonant frequency.

Although the lower frequency resonant frequency is not usable, the idea is how to

get a resonant frequency at ZVS region. By change the LCC resonant tank to its

dual resonant network, this is achievable.

As shown in Figure 4.10, by change L to C and C to L, a LLC resonant

converter could be built. The DC characteristics of these two converters are

shown in Figure 4.11 and Figure 4.12. The DC characteristic of LLC converter is

like a flip of DC characteristic of LCC resonant converter. There are still two

resonant frequencies. In this case, Lr and Cr determine the higher resonant

frequency. The lower resonant frequency is determined by the series inductance

of Lm and Lr. Now the higher resonant frequency is in the ZVS region, which

means that the converter could be designed to operate around this frequency.

Figure 4.10 LCC and LLC resonant tank

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Figure 4.11 DC characteristic of LCC resonant converter

Figure 4.12 DC characteristic of LLC resonant converter

Figure 4.13 Half bridge LLC resonant converter

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As a matter of fact, LLC resonant converter existed for very long time [B-10]

[B-24]. But because of lack of understanding of characteristic of this converter, it

was used as a series resonant converter with passive load. Which means it was

designed to operate in switching frequency higher than resonant frequency of the

series resonant tank of Lr and Cr. When operating in this region, LLC resonant

converter acts very similar to SRC. The benefit of LLC resonant converter is

narrow switching frequency range with light load and ZVS capability with even

no load.

In this dissertation, some unexplored operating region of LLC resonant

converter will be investigated. Within these operating regions, LLC resonant

converter will have some very special characteristic, which makes it an excellent

candidate for front end DC/DC application.

To design LLC resonant converter, DC analysis is essential. The detailed DC

analysis is discussed in Appendix B. Two methods were discussed: fundamental

simplification method and simulation method. The error is showed too.

4.4 Operation of LLC resonant converter

The DC characteristic of LLC resonant converter could be divided into ZVS

region and ZCS region as shown in Figure 4.14. For this converter, there are two

resonant frequencies. One is determined by the resonant components Lr and Cr.

The other one is determined by Lm, Cr and load condition. As load getting

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heavier, the resonant frequency will shift to higher frequency. The two resonant

frequencies are:

1
fr1 =
2 ⋅ π ⋅ Lr ⋅ Cr

1
fr 2 =
2 ⋅ π ⋅ ( Lm + Lr ) ⋅ Cr

With this characteristic, for 400V operation, it could be placed at the resonant

frequency of fr1, which is a resonant frequency of series resonant tank of Cr and

Lr. While input voltage drops, more gain can be achieved with lower switching

frequency. With proper choose of resonant tank, the converter could operate

within ZVS region for load and line variation.

There are some interesting aspects of this DC characteristic. On the right side

of fr1, this converter has same characteristic of SRC. On the left side of fr1, the

image of PRC and SRC are fighting to be the dominant. At heavy load, SRC will

dominant. When load get lighter, characteristic of PRC will floating to the top.

With these interesting characteristics, we could design the converter working at

the resonant frequency of SRC to achieve high efficiency. Then we are able to

operate the converter at lower than resonant frequency of SRC still get ZVS

because of the characteristic of PRC will dominant in that frequency range.

From above discussion, the DC characteristic of LLC resonant converter

could be also divided into three regions according to different mode of operation

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as shown in Figure 4.15. Our designed operating regions are region 1 and region

2. Region 3 is ZCS region. The converter should be prevented from entering

region 3. The simulation waveform for region 1 and region 2 are shown in Figure

4.16 and Figure 4.17. In fact, there are many other operating modes for LLC

resonant converter as load changes. Those different modes are listed in Appendix

B.

Figure 4.14 DC characteristic of LLC resonant converter

Figure 4.15 Three operating regions of LLC resonant converter

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In region 1, the converter works very similar to SRC. In this region, Lm never

resonates with resonant capacitor Cr; it is clamped by output voltage and acts as

the load of the series resonant tank. With this passive load, LLC resonant

converter is able to operate at no load condition without the penalty of very high

switching frequency. Also, with passive load Lm, ZVS could be ensured for any

load condition. Here the operation will not be discussed in detail. There are

several other modes of operation for light load condition. They will be discussed

in Appendix B.

Figure 4.16 Simulated operation waveforms in region 1

In region 2, the operation of LLC resonant converter is more complex and

interesting. The waveforms could be divided into clearly two time intervals. In

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first time interval, Lr resonant with Cr. Lm is clamped by output voltage. When

Lr current resonant back to same level as Lm current, the resonant of Lr and Cr is

stopped, instead, now Lm will participate into the resonant and the second time

interval begins. During this time interval, the resonant components will change to

Cr and Lm in series with Lr, which is shown in the waveforms as a flat region. In

fact, that is a part of the resonant process between Lm+Lr with Cr. From this

aspect, LLC resonant converter is a multi resonant converter since the resonant

frequency at different time interval is different. Because of the resonant between

Lm and Cr, a peak on the gain appears at resonant frequency of Lm+Lr and Cr.

Next the operating of LLC resonant converter in region 2 will be discussed in

detail. It is divided into three modes.

Figure 4.17 Simulation waveforms in region 2

Mode 1 (t0 to t1):

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This mode begins when Q2 is turned off at t0. At this moment, resonant

inductor Lr current is negative; it will flow through body diode of Q1, which

creates a ZVS condition for Q1. Gate signal of Q1 should be applied during this

mode.

Figure 4.18 Circuit diagram during mode 1 in region 2

When resonant inductor Lr current flow through body diode of Q1, ILr begins

to rise, this will force secondary diode D1 conduct and Io begin to increase. Also,

from this moment, transformer sees output voltage on the secondary side. Lm is

charged with constant voltage.

Mode 2 (t1 to t2)

This mode begins when resonant inductor current ILr becomes positive. Since

Q1 is turned on during mode 1, current will flow through MOSFET Q1.

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Figure 4.19 Circuit diagram during mode 2 in region 2

During this mode, output rectifier diode D1 conduct. The transformer voltage

is clamped at Vo. Lm is linearly charged with output voltage, so it doesn't

participate in the resonant during this period. In this mode, the circuit works like a

SRC with resonant inductor Lr and resonant capacitor Cr.

This mode ends when Lr current is the same as Lm current. Output current

reach zero.

Mode 3 (t2 to t3)

At t2, the two inductor’s currents are equal. Output current reach zero. Both

output rectifier diodes D1 and D2 is reverse biased. Transformer secondary

voltage is lower than output voltage. Output is separated from transformer.

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Figure 4.20 Circuit diagram during mode 3 in region 2

During this period, since output is separated from primary, Lm is freed to

participate resonant. It will form a resonant tank of Lm in series with Lr resonant

with Cr.

This mode ends when Q1 is turned off. As can be seen from the waveform,

Q1 turn off current at t3 is small compare with peak current. For next half cycle,

the operation is same as analyzed above.

From the simulation waveform we can see, the MOSFETs are turned on with

ZVS. The ZVS is achieved with magnetizing current, which is not related to load

current, so ZVS could be realized even with zero-load. Since this magnetizing

current is also the turn off current of MOSFET. Choosing different magnetizing

inductance could control it. The turn off current could be much smaller than load

current, so turn off loss can be reduce. Also, the secondary side diode current

reduce to zero and stay off, the reverse recovery is eliminated also. With all these,

the switching loss of this converter is very small.

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4.5 Design of LLC resonant converter

4.5.1 Design of power stage parameters

From above analysis, the DC characteristic of LLC resonant converter could

be derived. Based on the DC characteristic, parameters in power stage can be

designed. The parameters need to be designed are:

• Transformer turns ratio: n

• Series resonant inductor: Lr

• Resonant capacitor: Cr

• Resonant inductor ratio: Lm/Lr

The specifications for the design are:

Input voltage range: 300V to 400V, normal operating region (360-400V)

Output voltage: 48V

Maximum load: 2.5Ohm

Maximum switching frequency: 200kHz

With above information, we can begin to choose the parameters.

For front-end application, the target is to optimize the performance at high

input voltage. From previous analysis results, the optimal operating point for this

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converter is when switching frequency equals to the resonant frequency of Lr and

Cr. At this point, the voltage gain of LLC resonant converter is 1. Base on this,

the transformer turns ratio can be choose. For Half Bridge LLC resonant

converter with 400V input and 48V output, the transformer turns ratio can be

choose base on following equations:

n = Vin /( 2 ⋅ Vo)

For Full Bridge LLC resonant converter, the turn’s ratio will be:

n = Vin / Vo

In our design, a half bridge LLC resonant converter is used; the turns ratio

was choose to be 4.

After the transformer turns ratio, the resonant tank can be designed. To

determine the resonant tank, lot of trade offs are involved. Three design examples

will be shown to demonstrate the trade offs.

Design 1:

In this design, the ratio of two resonant inductors is 1, which means the two

resonant inductors are with same value. The characteristic and operating region

are shown in Figure 4.21. The region of Q is from 1(Full load) to 0(no load). Here

Q is defined as: Q=Zo/Rl. Resonant inductor Lr is 27.8uH, resonant inductor Lm

is 27.8uH and Cr is 22.8nF.

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Figure 4.21 Operating region for design 1

Simulation waveform is shown in Figure 4.22.

Figure 4.22 Simulation waveforms of design 1 with 300V and 400V input voltage

Design 2:

In this design, the ratio of two resonant inductors is 4, which means Lm is

four times Lr. The characteristic and operating region are shown in Figure 4.23.

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The region of Q is from 0.5 (Full load) to 0 (no load). Resonant inductor Lr is

17uH and Lm is 70uH. Resonant capacitor is 24nF.

Figure 4.23 Operating region for design 2

Simulation waveform is shown in Figure 4.24.

Figure 4.24 Simulation waveforms of design 2 with 300V and 400V input voltage

Design 3:

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In this design, the ratio of two resonant inductors is 16, which means Lm is

sixteen times Lr. The characteristic and operating region are shown in Figure

4.25. The region of Q is from 0.25 (Full load) to 0 (no load). Resonant inductor Lr

is 7.95uH, Lm is 127uH and Cr is 79.6nF.

Figure 4.25 Operating region for design 3

Simulation waveform is shown in Figure 4.26.

Figure 4.26 Simulation waveforms of design 3 with 300V and 400V input voltage

Summary of three designs:

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Table 4-1 Summary of three LLC resonant converter designs

Q range Fs range Primary RMS Switch turn off Resonant Cap Peak Output
Current current Voltage current
Design 1 1 to 0 175k to 200k 8.1A to 9.2A 7.8A to 5.8A 800V 31A to 43A
Design 2 0.5 to 0 135k to 200k 6.0A to 8.3A 4.1A to 3.2A 440V 31A to 49A
Design 3 0.25 to 0 72k to 200k 5.7A to 10.2A 1.9A to 0.24A 430V 31A to 89A

From the summary, design 3 provides best performance at 400V input, but the

switching frequency range will be much larger. For design 1, the performance at

400V is compromised; the benefit is very narrow switching frequency range. For

this application, since the output voltage of PFC circuit is not tightly regulated, it

has a range from 360 to 400V. The performance at 360V is also a concern. In

Figure 4.27 to Figure 4.29, primary switching and conduction loss are compared

for three designs with different input voltage.

Figure 4.27 Primary loss for three designs with Vin=400V

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Figure 4.28 Primary loss for three designs with Vin=360V

Figure 4.29 Primary loss for three designs with Vin=300V

From these comparisons, although design 3 could provide better performance

at 400V input, its performance degrades very fast as input voltage drops. Design 1

could provide more balanced performance for whole range, but the performance

at 400V input is greatly impaired. Design 2 is choosing for front-end application

with 200kHz design. With design 2, the performance is balanced within input

range. Stress on different devices is reasonable.

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4.5.2 Design trade offs:

In design of power stage, there are some trade offs that will affect the final

results.

First trade off is switching frequency range and switching loss. With smaller

magnetizing inductance, narrower switching frequency range can be achieved, but

switching loss and conduction loss will increase because of high magnetizing

current.

Another trade off to make is switching frequency range and resonant tank

impedance. For same specification, Lr and Cr can have different values, which

will work. Although there is a limit on how small Cr can be in order to keep series

resonant tank work in constant gain region. With larger Cr, the voltage stress on

Cr will be smaller. The problem is that the impedance of the resonant tank will be

small too, which will affect the short circuit performance. With smaller tank

impedance, the higher the shorts circuit current will be and higher switching

frequency is needed to limit the output current.

The problem with low switching frequency is the conduction loss will

increase as switching frequency drops. As shown in first part, the conduction loss

can be doubled when switching frequency change from 200kHz to 150kHz.

From these trade offs, the optimized design should choose as small resonant

capacitor as possible to get enough voltage gain at heavy load. Then Lm should

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be as large as possible to get the voltage gain with desired switching frequency

range.

4.5.3 Test results

Base on the design, a LLC resonant converter is built with those parameters.

The test circuits are shown in Figure 4.30 with the part number of the devices.

Test waveforms are shown in Figure 4.31. The test efficiency is shown in Figure

4.32. Compare with asymmetrical half bridge converter, LLC resonant converter

could improve the efficiency at normal operation point by more than 3%. Figure

4.33 shows the test efficiency at different input voltage. LLC resonant converter

could cover wide input range with much higher efficiency compared with PWM

converter.

(b)
Figure 4.30 Test circuit for 200kHz LLC resonant converter

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(a)

(b)
Figure 4.31 Test waveform of LLC converter at full load and (a) 300V input, and (b) 400V input

Figure 4.32 Test efficiency of LLC converter and HB converter at 400V input

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Figure 4.33 Test efficiency of LLC and AHB converter at different input voltage and full load

4.5.4 Loss comparison

Since our target is to achieve high efficiency, and high frequency. In this part,

the loss of LLC resonant converter is compared with Asymmetrical Half Bridge

and asymmetrical winding asymmetrical half bridge. Comparison is based on

simulations and calculations. All converters are designed with same

specifications:

Vin=300 to 400V, Vout=48V, and Pout=1kW;

Switching frequency for PWM 200kHz and switching frequency for LLC is

from 140kHz to 200kHz.

The design of Asymmetrical half bridge just follows the traditional design

procedure. LLC resonant is as shown in Figure 4.30. The circuit diagrams of both

converters with devices listed are shown in Figure 4.34.

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(a)

(b)
Figure 4.34 Two PWM topologies to be compared (a) AHB, and (b) asymmetrical winding AHB

The devices we used for these converters are:

Primary switches for both converters: IXFN24N50 500V 21A MOSFET

Asymmetrical Half Bridge secondary rectifier: STTH3003, 300V ultra fast

diode, forward voltage drop 1.2V.

Asymmetrical winding AHB: MBR20200, 200V shottky diodes with forward

voltage drop 0.95V.

LLC resonant converter secondary rectifier: IR30CPQ150, 150V shottky

diodes with forward voltage drop 0.65V.

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For PWM Half Bridge converter, the current waveform is highly

asymmetrical at high input voltage. This will increase both the conduction loss

and switching loss when the converter works in this condition. So the efficiency

of the converter will be hurt by wide input range. The small duty cycle will also

increase the voltage stress of the secondary rectifier. Higher voltage rated devices

have to be used which have higher forward voltage drop. Secondary conducting

loss will be a large part of total loss.

For LLC resonant converter, at high input voltage, the input current have

lower peak value and RMS value, so the conduction loss is much lower at high

input voltage. Also, the secondary side voltage stress is fixed at two times output

voltage for LLC resonant converter. Low voltage schottky diodes can be used to

reduce the secondary conduction loss.

For resonant converter, high current stress or voltage stress is always a

concern since the increase of conduction loss will annihilate the benefit get from

reduced switching loss.

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Figure 4.35 Primary side conduction loss comparison

Figure 4.35 shows the primary conduction loss comparison. Because for

PWM converter, at high input voltage, the duty cycle is small, so the RMS current

is even higher than LLC resonant converter. When the input voltage decrease, the

duty will become more symmetrical and the resonant converter will show higher

RMS current and higher conduction loss. But this is not a problem for this case

since our normal working condition input voltage will be within 360V to 400V.

Only during fault condition would the circuit work at so low input voltage. With

LLC resonant converter, primary conduction loss is not a problem.

Figure 4.36 shows the primary switching loss comparison of Half Bridge and

LLC resonant converter based on the datasheet. It can be seen that switching loss

of LLC is 40% lower than PWM converter. This calculation is for 200kHz

switching frequency, if we increase the switching frequency further, this will

make even bigger difference.

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Bo Yang Chapter 4. LLC Resonant Converter

Figure 4.36 Primary switches turn off loss comparison

Another benefit of LLC resonant converter is that the voltage stress on the

secondary rectifier is much lower than asymmetrical half bridge. For

Asymmetrical half bridge converter, the highest voltage stress on secondary diode

will be higher than 250V; 300V diode has to be used. With asymmetrical

winding, the voltage stress could be reduced so that 200V diodes could be used,

still the forward voltage drop is pretty high at 0.95V. For LLC converter, the

voltage stress is limited to two times output voltage, so 150V shottky diode can be

used. In this comparison, STTH3003, which has forward voltage drop of 1.2V, is

used for PWM converter. For LLC converter, we choose 30CPQ150, which has

forward voltage drop of 0.65V. This will reduce the secondary conduction loss

from 25W to 13W. This means 1% efficiency improvement.

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Bo Yang Chapter 4. LLC Resonant Converter

Figure 4.37 Secondary conduction loss comparison

There is still something not included into this analysis: the rectifier diodes

reverse recovery loss. In PWM converter, the diodes commutate at load current

with high dv/dt; this will cause pretty high reverse recovery loss. In LLC resonant

converter, since the diode current resonant to zero, this part of loss is eliminated.

From the test results, there is no ringing on the secondary diodes without any

snubber circuits.

Table 4-2 Loss breakdown comparison of AHB and LLC

Table 4-2 shows the loss breakdown for asymmetrical half bridge and LLC

resonant converter. Without considering secondary reverse recovery loss, LLC

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resonant converter can provide about 2% efficiency improvement over

asymmetrical half bridge.

For both topologies, we can achieve zero voltage turn on, so we assume turn-

on loss could be neglected. In fact, for PWM converter, we are using the energy

stored in leakage inductance to achieve ZVS, so at light load, the converter will

loss ZVS capability. But for LLC resonant converter, we are using magnetizing

inductor to achieve ZVS, so we are able to get ZVS in whole load range.

From previous discussion we can see that with LLC resonant converter, we

can get high efficiency and high switching frequency, which is the key to meet the

trend for this application.

4.6 Extension of LLC resonant topology

As demonstrated in previous part, the benefit of LLC resonant converter

comes from the fact that it has two resonant frequencies and the operating point of

normal operating condition could be positioned at resonant frequency.

In three elements resonant tanks, there are 36 different configurations. The

question is if there is any other resonant tank configuration could provide similar

characteristic so that could result to similar benefits. To answer this question, a

thorough search is performed for three resonant components resonant tank as

shown in Appendix A. Since our application is a voltage source input application.

Only resonant tank could be used for voltage source input are look in detail,

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which consists 23 resonant tank configurations. With in these 23 resonant tank

configurations, three resonant tanks show the desired characteristic as shown in

Figure 4.38. Tank G is the same resonant tank as we used for LLC resonant

converter. It is interesting to notice that the other two resonant tanks also have

two resonant inductors and one resonant capacitor.

Figure 4.38 Resonant tanks with desired DC characteristic

For resonant tank W, a resonant converter could be constructed as shown in

Figure 4.39. With this converter, the series resonant inductor will be on secondary

side. This topology operates same as LLC resonant converter discussed before

except the voltage stress on the output rectifier diodes will be different as will be

discussed in magnetic design in next chapter. With resonant tank U, a half bridge

resonant topology could be constructed as shown in Figure 4.40.

These three topologies have similar characteristic. They will be able to operate

at resonant frequency when input voltage is high while still cover wide input

range.

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Figure 4.39 Half bridge resonant converter with tank W

Figure 4.40 Half bridge resonant converter with tank U

4.7 High frequency operation

LLC resonant converter shows much lower switching loss compared with

PWM converter as shown in previous part. Compare with PWM converter, the

primary switching loss is reduced by more than 50%. Secondary diode commute

naturally so there is no reverse recovery problem at all. All these enable LLC

resonant converter to be able to operate with higher switching frequency. Another

significant difference of LLC resonant converter and PWM converter is that now

switching loss could be controlled.

For PWM converter, switching loss is determined by device and load

condition. To deliver the power, the switches have to turn off significant amount

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of current. For asymmetrical half bridge, it is around 13A of current. This will

introduce very high switching loss. This is also one limitation why PWM

converter could not operate with higher switching frequency.

For LLC resonant converter, switching loss is a controlled parameter. As

shown in Figure 4.41, the turn off current of primary switching is determined by

the choice of resonant inductor Lm. With larger Lm, turn off current will be

smaller, vice versa. This could also be observed from the design examples shown

in previous section.

Figure 4.41 Simulation waveform of LLC resonant converter

In this part, a 400kHz LLC resonant converter is designed to demonstrate the

benefits of LLC resonant converter with high switching frequency. The resonant

tank is scale down as designed for 200kHz LLC resonant converter. For design of

Lm, balance of switching loss and switching frequency range is considered. As

shown in Figure 4.42, with smaller Lm, switching loss will increase. In this case,

40uH Lm is chosen which gives less than 10W switching loss.

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Bo Yang Chapter 4. LLC Resonant Converter

Figure 4.42 Switching loss with different Lm for 400kHz LLC resonant converter

Figure 4.43 Circuit diagram of 400kHz LLC resonant converter

The magnetic design use integrated magnetic concept, which will be discussed

in next chapter.

Figure 4.44 Integrated magnetic structure for 400kHz LLC resonant converter

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Bo Yang Chapter 4. LLC Resonant Converter

The parameters are as following:

Turns ratio: 12:3; Lr: 7uH; Lm: 40uH.

Design results are: np1 = 6, np2 = 10, ns = 3 and gap = 0.5mm.

The magnetic components for 200kHz LLC and 400kHz LLC resonant

converter are shown in Figure 4.45. Both magnetic components use integrated

magnetic concept, which will be discussed in next chapter. With 400kHz

switching frequency, volume of the magnetic component is reduced by more than

40%. The test circuits are shown in Figure 4.46. Compare 200kHz LLC resonant

converter with 200kHz AHB, the power density could be improved by almost

100%. With high frequency, the power density is improved by 200%.

(a) (b)
Figure 4.45 Magnetic components size comparison (a) 200kHz and (b) 400kHz

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Bo Yang Chapter 4. LLC Resonant Converter

(a)

(b)

(c)
Figure 4.46 Test circuits of front end DC/DC converter (a) 200kHz AHB, (b) 200kHz LLC, and

(c) 400kHz LLC

Figure 4.47 shows the test efficiency. With 400kHz switching frequency, the

efficiency is lower than 200kHz. But compare 400kHz LLC resonant converter

with 200kHz PWM converter, the efficiency of LLC resonant converter is still

better. The projected 400kHz PWM converter uses the test data of 200kHz PMW

converter with consideration of switching loss of primary switches at 400kHz. In

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fact, the efficiency will be even lower with consideration of secondary diode

reverse recovery loss.

Figure 4.47 Test efficiency of 400kHz LLC resonant converter

4.8 Summary
In this chapter, resonant topologies were investigated for front end DC/DC

application. The target is to find a topology, which could be optimized at high

input voltage with low switching loss. First three traditional resonant topologies

were designed and simulated for this application. They are: series resonant

converter, parallel resonant converter and series parallel resonant converter.

Unfortunately, all three converters suffered from wide input range problem and

could not be optimized for high input voltage.

LLC resonant topology was introduced by observing the tank characteristic of

series parallel resonant converter. With LLC resonant converter, performance at

high input voltage could be optimized and the converter still could cover wide

input voltage range. Test results shows that with LLC resonant converter, the

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efficiency could be improved by more than 3% compared with PWM converter.

With high switching frequency, LLC resonant converter could achieve 45W/in3

compared with 13W/in3 of PWM converter.

From analysis and test, LLC resonant converter is proved to be able to

improve the performance of front end DC/DC converter significantly. Another

question is that if this is the only resonant tank or there is more resonant tank,

which could provide similar characteristic.

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Chapter 5

Improvements of LLC Resonant Converter

From previous chapter, the characteristic and design of LLC resonant

converter were discussed. In this chapter, two improvements for LLC resonant

converter will be investigated: integrated magnetic design and over load

protection.

5.1 Magnetic design for LLC Resonant Converter

From previous discussion, the power stage could be designed according to the

given specifications. The outcome of the design is the desired values for the

components. For these components, power devices and capacitors are obtained

from manufactures, which already reflect the state of the art technology. Within

all these components, magnetic is the one need to be physically designed and built

by power electronics researcher. In this part, the design of magnetic component

for LLC resonant converter will be discussed.

5.1.1 Discrete design and issues

For a LLC resonant converter, the magnetic components need to be designed

are shown in Figure 5.1. There are three magnetic components: Lr, Lm and

transformer T. From the configuration of Lm and transformer T, it is easy to build

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Lm as the magnetizing inductance of transformer. So in fact, we are trying to

build one resonant inductor and one transformer with magnetizing inductance.

Figure 5.1 Magnetic structure for LLC resonant converter

There are several ways to build them. One is using discrete components, with

one magnetic core to build the resonant inductor and one magnetic core to build

the transformer and magnetizing inductor Lm. The benefit of this method is that

the design procedure is well established.

Next, a discrete design is presented and simulation result is showed to provide

a reference for later integrated magnetic designs. For LLC resonant converter, the

resonant inductor Lr has pure AC current through it, so we use soft ferrite core for

both inductor and transformer.

Figure 5.2 shows the discrete design of the magnetic for LLC resonant

converter. Two U cores were used to build the resonant inductor and gapped

transformer. Fig.6 shows the simulation results of flux density in the core. For

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each U core, the cross-section area is 116.5mm2. Design result: nl=12, np: ns:

ns=16:4:4, gap1=1.45mm and gap2=0.6mm.

(a) (b)

Figure 5.2 Discrete magnetic design (a) schematic (b) physical structure

(a) Inductor

(b) Transformer

Figure 5.3 Flux density simulation result (a) Inductor, and (b) Transformer

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Figure 5.3 shows the flux density in each core at 400V input with switching

frequency at 200kHz. As seen in the graph, the flux densities in both cores are

pretty high. Both cores with high flux density excitation will contribute to the

total core loss. For high frequency, core loss is a major limitation on pushing to

higher frequency and smaller size. Figure 5.4 shows the peak-to-peak flux density

for each core with different input voltage. At low input voltage, the flux density

will increase, but it is not critical because of short operating time.

(a) Inductor

(b) Transformer

Figure 5.4 Peak to peak flux density under different input voltage at full load

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The drawbacks of this method are: 1. Two magnetic cores are needed, which

results in more components count and connections, 2. High magnetic loss caused

by high flux ripple in magnetic structure, 3. Large footprint is needed for the

whole structure.

In recent years, integrated magnetic has been investigated for many different

applications. For asymmetrical half bridge with current doubler, all the magnetic

components could be integrated into one magnetic structure with integrated

magnetic concept [C1][C5]. In this part, the integrated magnetic structure will be

discussed for LLC resonant converter. It integrated all magnetic components into

one magnetic core. Through magnetic integration, the component count and

footprint are reduced, the connections is also reduced. With proper design; flux

ripple cancellation can be achieved, which can reduced the magnetic loss, and

reduce the magnetic core size.

In the next part, the integrated magnetic designs for LLC resonant converter

will be discussed and compared.

5.1.2 Integrated magnetic design

5.1.2.1 Real transformer with leakage and magnetizing inductance

First structure is just use one transformer and uses the leakage inductance as

resonant inductor. The configuration of magnetic components for LLC resonant

converter is exactly the same as a real transformer with magnetizing inductance

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Bo Yang Chapter 5. Improvements of LLC resonant converter

and leakage inductance. It is natural to think about using one real transformer to

get all the needed components. The issues with structure are:

1. The leakage inductance cannot be accurately controlled which will

determine the operating point of the converter,

2. When we build Lr this way, the leakage inductance will not only exist on

primary side, it will also exist on secondary side of the transformer. So the result

get from real transformer will be as in Figure 5.5. Llp and Lls have similar value

when transferred to same side of the transformer.

Figure 5.5 Structure with real transformer

Figure 5.6 Desired magnetic components configuration

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Bo Yang Chapter 5. Improvements of LLC resonant converter

Figure 5.7 Magnetic components configuration from real transformer

(a)

(b)

Figure 5.8 Voltage stress of output diodes D1 D2 (a): desired structure (b) real transformer

When the leakage inductance exists on secondary side, it will increase the

voltage stress on secondary rectifier diode. This requires us to use higher voltage

rating diode, which will increase the conduction loss of the output rectifier. Figure

5.8 shows the simulate waveforms of secondary diodes voltage stress with

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magnetic structure in Figure 5.6 and Figure 5.7. We can see that with inductor on

the secondary side, the voltage stress of the diodes is much higher.

From above discussion, we can see that the desired magnetic structure will

need to provide accurate control of Lr and Lm, at that same time, minimize the

inductance on secondary side, which could not be achieved with just a

transformer with leakage and magnetizing inductance. Next more complex

integrated magnetic structure will be investigated.

5.1.2.2 Integrated magnetic design A

From discrete design, just combine them together with an EE core, we will be

able to integrate the two components into one magnetic component as shown in

Figure 5.9.

Figure 5.9 Integrated Magnetic Designs A

E42/21/20 core is used. The cross-section area of is 233mm2. For the outer

legs, they have same cross-section area as discrete design. Turn number nl, np and

ns is the same as in discrete design. For this design, the inductor and transformer

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design is decoupled. Discrete design procedure still can be used. Figure 5.10

shows the simulation result of for this structure.

Figure 5.10 Flux density simulation result for Design A

It can be seen from the simulation result: for inductor and transformer leg, the

flux density is the same as discrete design. But for center leg, the flux density is

much smaller than discrete case. This will greatly reduce the magnetic loss in the

big part of the magnetic component.

Figure 5.11 Center leg flux density for different input voltage

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Figure 5.11 shows the center leg flux density for whole input voltage range.

Compare with discrete design, the flux density is only half of the transformer leg

and much smaller than inductor leg within all input voltage range.

The problem for this structure is the gapping. In this structure, we are using E

cores. The air gap is on two outer legs while there is no air gap on center leg. This

structure is not good in several aspects: first, this core structure is not a standard.

The standard core normally has air gap on the center leg or no air gap at all.

Second, it is not a mechanical stable structure, very accurate gap filling need to be

provided. Otherwise, the accuracy of the components value will be impacted.

Also, when force is applied which happens when the converter is working, the

core tends to vibrate. This vibration will cause broken of the core.

A desired core structure will have air gap on center leg or same air gap for all

three legs. Following part will try to establish an electrical circuit model for a

general integrate magnetic structure. From the model, we can investigate new

core structures.

5.1.2.3 Extraction of Common Structure for Integrated Magnetic

In the past, lot of research was done on integrated magnetic design for power

converters. Review those paper, we can find that most of them are based on EE

core structure or three legs structure. The difference between different designs is

the placement of windings and air gaps.

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In this part of the paper, the general circuit model of an EE core with four

windings is used as a general structure as shown in Figure 5.12. There are air gaps

on each leg. This is a very commonly used structure, many integrated magnetic

design for PWM converter also used this structure with some change on the air

gap or winding placement [C5].

The reason of choosing this structure for LLC resonant converter is as

following:

To integrate two magnetic components, usually we need three magnetic paths.

In the LLC resonant converter, although we have three magnetic components, Lm

and transformer T can be build with an air-gapped transformer. So in fact we need

integrated two magnetic components: series resonant inductor Lr and gapped

transformer T. An EE core structure will be a reasonable choice.

Figure 5.12 general magnetic structures for Integrated magnetic

The model is derived through duality modeling method [E4]. Through this

method, we can get the electrical circuit model of a physical magnetic structure.

All the components in the model are related to the physical structure of the

magnetic structure. Figure 5.13 shows the reluctance model of magnetic structure

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shown in Figure 5.12. Figure 5.14shows electrical circuit model form this

structure. In the structure, we have two sets of ideal transformer and three

inductors.

Figure 5.13 Reluctance model of general integrated magnetic structure

For the two ideal transformers, they have same turns ratio as in real physical

structure. For the three inductors, they are correspond to each air gap and

reflected to first winding n1. They can also be reflected to other windings as

necessary. The value of each inductors are as following:

Figure 5.14 Circuit model of general integrated magnetic structure

Base on this circuit model, we will investigate more integrated magnetic

structures.

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5.1.2.4 Integrated magnetic design B for LLC resonant converter

As discussed in structure A, the air gapping for structure A is not easy to

implement. In this part, we will investigate structure with same air gap for all

three legs and same winding structure as shown in Figure 5.15.

Figure 5.15 Integrated Magnetic Designs B

The electrical model of this structure can be easily got from general structure.

Compare this structure with general structure; design B has only one winding on

left side leg. By simplify the general model we can get following circuit model of

design B as shown in Figure 5.16.

Figure 5.16 Electrical circuit model of integrated magnetic structure B

Base on the electrical circuit model of the structure, next terminal 2 and 3 are

connected, which gives following circuit model.

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Bo Yang Chapter 5. Improvements of LLC resonant converter

Figure 5.17 Electrical model of connecting dot-marked terminal with unmarked terminal

From circuit model in Figure 5.17, write the input current and voltage

equations and solve them, then we can get the equivalent circuit of the structure.

For this circuit, it has two modes. One mode is n3 is connected to output voltage.

During this mode, the energy is transferred from primary to output. During the

other mode, both secondary windings n3 are not connecting. We will derive the

equivalent circuit for these two modes separately.

(mode a)

(mode b)

Figure 5.18 Two operation modes for LLC resonant converter

For operation mode (a), we can get following equations:

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di1 n2
L1 + v1 = vin
dt n1

di0 n2
L0 + v1 + v1 = vin
dt n1

n1
v1 = Vo
n3

i0 + i1 = iin

From above equations, we can get the relationship of input voltage, input

current and output voltage as following:

L1 ⋅ L0 diin 1 L1
vin = + Vo (n2 + n1 )
L1 + L0 dt n3 L1 + L0

From this equation, we can get the equivalent circuit during this mode as in

Figure 5.19.

Figure 5.19 Equivalent-circuit for mode (a)

In this circuit, Lr, Lm and na are as following:

L1 ⋅ L0
Lr =
L1 + L0

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L1
na = n2 + n1
L1 + L0

To find out Lm, we need to analyze mode (b). Same as analysis for mode (a),

we can get following equations for Lm:

na 2 L1 + L0
Lm = L2 ⋅ 2
⋅
n1 L1 + L2 + L0

From the equivalent circuit, derive the relationship between terminals; the

equivalent circuit above can be simplified into the equivalent circuit, which is the

structure we desired. The relationship between resonant inductor, magnetizing

inductance and transformer turns ratio is shown also. Base on these equations, the

structure can be designed. Following is an example of design: turns ratio 12:3,

Lm=14u and Lm = 60uH. The relationship of above equations could be drawn in

Figure 5.20. For given turns ratio, there are many different ways to choose n1 and

n2 to get the desired na, for example, n1=n2=9, n1=6 and n2=10. The other

constrain will be the desired Lm. For this case, the Lm is 4.5 times Lr. To get this

Lm, the n2 need to be choosing as 10.

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Bo Yang Chapter 5. Improvements of LLC resonant converter

(a) (b)

Figure 5.20 Design curves for integrated magnetic structure B for LLC converter

From above discussion, n1=6, n2=10 and n3=3 give us turns ratio 12:3, Lm/Lr

= 4.5. Next step will be design the air gap, we knows n1 and L1 value. Follow

tradition inductor design equations, the air gap can be designed. Here Lr = 14uH,

from the structure it can be seen that: L1 = L3 = 0.5 L2. From the relationship

above, it can be calculated that we need L1=21uH to give us equivalent Lr=14uH.

With the core cross-section area and turns given, the gap can be easily derived.

In this part, the detailed information of the magnetic is described. For this

converter, the core used is EE56/24/19 from Phillips. The core material is 3F3.

Two outer legs are used to wind the windings. Air gap is 0.55mm for all legs.

Primary windings are built with 8 strands of AWG#27 wires. Secondary side
uses 5mil X 0.9inch copper foil.

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Bo Yang Chapter 5. Improvements of LLC resonant converter

Figure 5.21 shows the simulated flux density on each of the legs. From

simulation result we can see that the flux density on center leg is greatly reduced.

So with this integrated magnetic structure, we can reduce the core loss greatly.

Also, with this structure, the air gap is the same for all legs, which is easier to

manufacture and doesn’t have mechanical problem.

Figure 5.21 Flux density in each leg for integrated magnetic structure B

5.1.3 Test Result

In this part, the test result of integrated magnetic structure B is tested. It is

compared with a discrete design. The test efficiency of integrated magnetic and

discrete magnetic is shown in Figure 5.22. Because of flux ripple cancellation

effect and less turns number, although the size of the magnetic components is

reduced, the efficiency is almost the same for these two designs. In Figure 5.23,

the sizes of these two designs were compared. With integrated magnetic, the

footprint of the magnetic components could be reduced by almost 30%.

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Bo Yang Chapter 5. Improvements of LLC resonant converter

Figure 5.22 Efficiency comparison of integrated and discrete magnetic design for LLC converter

Figure 5.23 Magnetic size comparison of discrete and integrated magnetic

5.1.4 Summary

In this part, the magnetic design for LLC resonant converter is discussed.

Discrete design and three method of integrated design were investigated. For

discrete design, the footprint is pretty large. Also, there is no flux ripple

cancellation effect; the magnetic loss is high in discrete design too. With real

transformer, the magnetic components could be built with one magnetic structure.

The problem is difficult to control the leakage inductance. Another integrated

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magnetic structure is to integrate the two U cores used to build discrete magnetic.

With this method, the problem is the mechanical structure is not a stable structure.

To improve this structure, a general integrated magnetic structure is developed.

With the model, another integrated magnetic structure is developed with same air

gap on all legs. With this magnetic structure, the manufacture is easy. There is no

mechanical problem. Also, flux ripple cancellation could be achieved with this

structure. Compare with discrete design, the integrated magnetic structure could

provide same efficiency with 30% less footprint.

5.2 Over load protection for LLC resonant converter

In previous part of this chapter, the design of power stage was discussed. Base

on these discussions, the power stage of LLC resonant converter could be

designed for given specifications. Magnetic design is also investigated for LLC

resonant converter. Till now we got a converter could convert 400V DC to 48V

DC output with high efficiency and high power density. However, to make

practical use of this converter, there are still some issues to be solved. Over load

protection is one critical issue, which will be discussed in this part.

The purpose of over load protection is to limit the stress in the system during

over load condition. Another function is to limit the inrush current during start up

when output voltage is zero so that the power converter can be protected from

destructive damage under those conditions.

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In some applications, continuous operation in over load condition is required

in order to achieve high system availability. In order to achieve this target, other

than limit the current, healthy operation is also an important consideration, which

means when the converter is running into over load protection mode, the

operation of semiconductor and other components should not cause destructive

damage too, i.e. lost of Zero Voltage Switching, body diode reverse recovery etc.

For traditional PWM converter, during over load condition, duty cycle is

reduced to limit the current. With smaller duty cycle, the current stress could be

limited.

For LLC resonant converter, it is working with variable frequency control at

constant 50% duty cycle. The over load protection is totally different story. To

investigate the over load protection method for LLC resonant converter, following

questions need to be answered. First, the intrinsic response of LLC resonant

converter to over load situation needs to be understood. Second, methods to

improve the intrinsic response need to be developed if the intrinsic response is not

safe or healthy.

In this part of the dissertation, first the intrinsic response of LLC resonant

converter to over load condition will be investigated. Then three different over

load protection methods will be discussed. First method is increasing the

switching frequency. The second method, a combination of variable-frequency-

control and PWM control is used to achieve over load protection. In the last

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method, the power stage is modified to include current limiting function into the

converter. In following sections, each method will be discussed separately.

The parameters for the LLC converter used in this discussion are:

Lr=12uH, Cr=33nF and Lm=60uH, transformer turns ratio: 4:1.

With above specs and parameters, the switching frequency range for the

converter is: 170kHz to 250kHz.

5.2.1 Intrinsic response of LLC resonant converter to over load condition

In LLC resonant converter, the impedance of the resonant tank is pretty low

during normal operation because it is working close to the resonant frequency of

the series resonant tank. This means the current could reach very high level during

over load situation. This characteristic makes over load protection design for LLC

resonant converter very critical.

During over load condition, the load of the converter increases. The worst

scenario will be short circuit of output. In this part, the impact of short circuit

output will be investigated for LLC resonant converter.

The simulation waveforms of LLC resonant converter during normal

operation and over load operation are shown in Figure 5.24. From the simulation

waveforms, lost of ZVS and high current stress could be observed during over

load condition. This could be understood through the characteristic of the

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Bo Yang Chapter 5. Improvements of LLC resonant converter

converter. In Figure 5.25, the DC characteristic of LLC resonant converter is

shown. At normal operation, the converter is working at Point A, when over load

condition happens, the operating point will move to Point B. As seen in the graph,

point A is in ZVS region while point B is in ZCS region. The over load current for

different switching frequency is shown in Figure 5.26, the over load current could

rise to very high.

(a)

(b)

Figure 5.24 Simulation waveforms of LLC resonant converter at (a) normal operation, and (b)

short circuit operation

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Bo Yang Chapter 5. Improvements of LLC resonant converter

Figure 5.25 Lost of ZVS for LLC resonant converter during over load situation

Figure 5.26 High current stress during over load situation for LLC resonant converter

From these results, the major problems for LLC resonant converter during

over load condition are: high current stress, and lost of ZVS.

5.2.2 Method 1: Increasing Switching Frequency

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When converter running into over load protection condition, there are two

ways to limit the current. First way is to reduce the average voltage applied to the

converter. For example, in PWM converter, duty cycle is reduced to limit the

current. By reducing duty cycle, the average voltage applied to converter is

reduced so that the current can be limited. Second way is to increase the

impedance of the power stage of the converter so to limit the current. This method

is useful for variable frequency controlled converters. By moving the switching

frequency away from resonant frequency, the impedance of the resonant tank will

increase so that the current can be limited.

To simplify the problem, let’s look at the worst scenario: short circuit of

output. Under such condition, the LLC resonant converter could be simplified into

a simple series resonant tank as shown in Figure 5.27.

Figure 5.27 Simplified model of LLC resonant converter during short circuit condition

With this model, the switching frequency needed to limit the output current

during short circuit situation could be derived. It is shown in Figure 5.28. As seen

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in the graph, if the desired over load current is 27A, then the switching frequency

need to increase to about 400kHz.

Figure 5.28 Short circuit output current at different switching frequency

Figure 5.29 shows the average for different over load condition. From Fig.2

we can see, by moving switching frequency away from resonant frequency

(250kHz), the output current can be limited. There are two directions to move

switching frequency: move to higher frequency or lower frequency in relationship

to resonant frequency. Since the lower frequency will result in ZCS condition as

shown in Figure 5.30, which is not a desirable working condition for MOSFET,

here we will move switching frequency to higher frequency.

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Bo Yang Chapter 5. Improvements of LLC resonant converter

Figure 5.29 Average output current vs. switching frequency under short circuit

Figure 5.30 Change of operating mode with different switching frequency under protection mode

Figure 5.31 shows the test waveforms for this condition. In the real test,

because of the parasitic parameters, with 358kHz switching frequency, the output

current can be limited under 27A under short circuit condition.

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Figure 5.31 Test waveform (top to bottom: Q1 gate signal, Transformer primary current and

resonant cap voltage)

Figure 5.32 Problems with high switching frequency protection mode

For this method, the converter will be working at pretty high switching

frequency during over load protection mode compare with normal operation

condition. With high switching frequency, there are several considerations:

First the switching loss will increase. As shown in Figure 5.32, during short

circuit condition, current stress reaches the highest. Turn off current also reaches

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the highest. With so high switching frequency, the loss on the device will be very

high which will increase the thermal management requirement.

Second, the stress on the magnetic components will be very unbalanced.

During over load protection, switching frequency reaches highest level while all

the volt-second is applied to the inductor, which means inductor has to be

designed according to this highest. For LLC resonant converter, this frequency

will be almost double of normal operation frequency; this will make the size of

the inductor to be larger.

5.2.3 Method 2: Variable frequency control plus PWM Control

From previous discussion, reduce the voltage applied to the converter can

limit the current too. In the second method, variable frequency control and PWM

control method are combined.

For this method, the converter has two modes: normal operation mode and

protection mode. During normal operation mode, variable frequency control is

used to get high efficiency. During over load protection mode, first switching

frequency is increased to limit the current, when switching frequency reaches the

limit we set, PWM control mode will be used to reduce the voltage applied to

resonant tank as shown in Figure 5.33. With this method, the output current can

be effectively limited. As shown in Figure 5.34, the current can be limited with

duty cycle change. In this graph, when switching frequency is lower than 300kHz,

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variable frequency control is used. When switching frequency reaches 300kHz,

duty cycle control cut in.

Figure 5.33 Control Method of Variable freq + PWM control

Figure 5.34 Average output current of LLC converter with variable frequency + PWM control

In Figure 5.34, a flat area is observed when duty cycle is close to 0.5. In this

flat area, the duty cycle change cannot change the current. The reason is for each

switching cycle, the body diode of the MOSFET will conduct for some time; duty

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cycle change must be larger than the body diode conduction time as shown in

Figure 5.35.

Figure 5.35 Simulation waveform for D=0.5, 0.4 and 0.2 at short circuit condition

Figure 5.36 shows the simulation result with consideration of output

capacitance of MOSFET. The current will resonant instead of stay at zero. Also

can be seen from Fig.10 that the ZVS condition of MOSFET is lost because of

DCM operation of primary current. Figure 5.37 shows the test result.

Figure 5.36 Simulation waveform with PWM control

(from top: gate signal of Q1 and Q3, Vds of Q1 and primary current Ip)

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Figure 5.37 Test waveform for PWM control

(Top: Vds of Q1, middle: gate signal of Q1, and Q2, bottom: primary current)

This method can achieve the current limiting function. The concern is

operating condition. Since ZVS is lost during over load protection mode, the

switching loss will increase and noise on gate driver will be a problem too.

Another issue will be how fast the transition between different modes could be.

Since the current could ramp up very fast, a very fast protection is necessary.

5.2.4 Method 3: LLC resonant converter with clamping diode

In this method, the current limit function is built in the power stage. This

method can provide cycle-by-cycle current limiting function without control

interference. Also, this method provides some other benefits too. Next the detail

of this method will be discussed.

Figure 5.38 shows the original LLC resonant converter and proposed LLC

resonant converter. The proposed LLC resonant converter is different from

previous discussed LLC resonant converter in following aspects: first, the

resonant capacitor is spited into two capacitors. Then, two diodes are put in

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parallel with the resonant capacitor. With this modifications, there are several

benefits could be achieved.

(a)

(b)

Figure 5.38 Two LLC resonant converter topologies: (a) Original LLC converter and (b) proposed

clamped LLC converter

First benefit is achieved through splitting the resonant capacitor. Figure 5.39

shows the simulation waveforms of these two topologies. As seen from the

simulation waveform, with splitting resonant capacitor, the input current will have

lower ripple. This will alleviate the stress put on the high voltage bus capacitor.

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(a)

(b)

Figure 5.39 Simulation waveforms for two LLC resonant converter topologies: (a) original LLC

converter and (b) clamped LLC converter

Another benefit will be over load protection, which is provided by the

clamping diodes. Figure 5.40 shows the simulation waveforms of original LLC

resonant converter and the clamped LLC resonant converter at over load

condition. For original LLC resonant converter, it can be seen that during over

load condition, input current is very high and the peak voltage across resonant

capacitor will increase to very high too. This is because during over load

condition, more current is going through the resonant tank, which will charge the

resonant cap to higher voltage. For LLC resonant converter with clamping diodes,

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first the voltage stress on resonant cap is limited so that a low voltage cap can be

used; another benefit is that by limit the voltage on resonant cap, the energy could

be absorbed by resonant tank is limited as shown in the state plane in Figure 5.41.

Also could be observed from the simulation waveform of clamped LLC

resonant converter, under clamped operating mode, ZVS is still achieved.

Figure 5.40 Simulation waveforms under over load condition for (a) original LLC converter and

(b) clamped LLC converter

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Figure 5.41 State plane of original and clamped LLC resonant converter

The over load current for both topologies are shown in Figure 5.42 and Figure

5.43.

Figure 5.42 Average output current under over load condition for original LLC converter

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Figure 5.43 Average output current under over load condition for clamped LLC converter

Another benefit of this method is that this method doesn’t need active control;

it is very simple to implement. Its response speed is fast, which can provide cycle-

by-cycle current protection. During normal operation, these two diodes will not

conduct, the clamped LLC converter operates exactly same as original LLC

resonant converter in every aspects.

In order to avoid the clamp diodes to impact normal operation condition, the

design is chosen as shown in Figure 5.39. Within the expected operating region of

the converter, the voltage stress on resonant capacitor is designed to be lower than

the clamping voltage. Figure 5.44 shows the design region for clamped LLC

resonant converter. During normal operation condition, the voltage stress on the

resonant capacitor is always lower than the clamp voltage, which is the input

voltage. Figure 5.45 shows the test waveforms with this method. With this

method, the converter is tested with short circuit with output current at 32A at

switching frequency at 200kHz for over 5 minutes.

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Figure 5.44 Design region of clamped LLC resonant converter

Figure 5.45 Test waveform of LLC converter under clamping mode

To use this method, there are several concerns. As described before, because

of these clamping diodes, the current is limited for each switching cycle. The

current can be passed through the resonant tank is related to the input voltage.

Also, since this method limit the amount of current flow through resonant tank in

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each switching cycle, when switching frequency is changing, the average output

current will change too. Let’s look at an example next.

For the given application, when input voltage is 300V, we set the maxim

output current at 27A. When input voltage is 400V, two things changes: input

voltage is higher, switching frequency is higher too. From above analysis, this

will increase the maxim output current. Instead of 25A at 300V, the maxim output

current at 400V will be 34A.

Although with this drawback, the clamping diode is still an effective way to

protect the converter. With these clamping diodes, ZVS is ensured at all

condition. At high input voltage, although the setting point increased, still it gives

us enough time to let the controller to take over and limit the current.

Base on this information, the compensator could be designed and the front end

DC/DC converter is a complete system now.

5.3 Integrated power electronics module for LLC

From above analysis and test results, LLC resonant converter demonstrated

significant improvements over PWM topologies. With high frequency and high

efficiency, the power density of LLC resonant converter is improved by 3 times

compared with asymmetrical half bridge.

As seen in chapter 3, with advanced packaging technology, the power density

and performance of asymmetrical half bridge converter could be improved

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significantly too. In this part, integrated power electronics module for LLC

resonant converter will be discussed.

For active IPEM, it is the same for both asymmetrical half bridge converter

and LLC resonant converter. With smaller turn off current and loss on the active

IPEM, the thermal stress on active IPEM in LLC resonant converter will be much

less. This could results to reduced thermal requirement.

For the passive IPEM for LLC resonant converter, it is different from

asymmetrical half bridge converter. As discussed in previous part, with splitting

resonant capacitor and clamping diodes as shown in Figure 5.46, current limiting

and smooth input current could be achieved. From here, the passive IPEM for

LLC resonant converter could be identified. The passive IPEMs for asymmetrical

half bridge and LLC resonant converter are shown in Figure 5.47.

Figure 5.46 LLC resonant converter with splitting resonant cap and clamping diodes

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Figure 5.47 Schematics of passive IPEM for AHB and LLC r converter

Comparing these two passive IPEMs, they are very different in several ways.

First, passive IPEM for AHB consists two transformers. In LLC passive IPEM,

only one transformer with center-taped secondary is needed. Second, the series

inductor and capacitor have very different value. For LLC resonant converter, the

capacitor is around 40nF while AHB need 1uF capacitor. Third, for LLC passive

IPEM, two capacitors are needed to utilize clamping LLC topology. For

asymmetrical half bridge, only one capacitor is integrated. To integrate two

resonant capacitors into the structure, another dielectric layer is used as shown in

Figure 5.48

Figure 5.48 Capacitor integration for LLC resonant converter

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There are different structures to build passive IPEM for LLC resonant

converter. Two structures are shown in Figure 5.49.

Figure 5.49 Two passive IPEM structures for LLC resonatn covnerter

For the fist method, it uses one planar E core and an I-core. It is build with

transformer with controlled leakage by inserting a leakage layer between primary

winding and secondary winding. The resonant capacitor could be constructed by

building primary winding on dielectric material.

The other method use similar structure as asymmetrical half bridge. With two

planar E core and one I core, with integrated magnetic concept, all the magnetic

components could be integrated into this structure. The resonant inductor winding

will be built on dielectric layer to provide resonant capacitors.

Comparing these two methods, first method is simpler. The issues of this

structure are: first, accurately control the leakage inductance is not easy. For

resonant converter, resonant inductance value to the operating point of the

converter. The value of the inductance needs to be accurately controlled. With this

method, the leakage inductance could not be very accurately controlled. Second,

with this structure, interleaving of winding is impossible. For high frequency

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operating, this could introduce high winding loss in the structure. With method

two, these problems could be solved with more complex structure.

With advanced packaging technology, all the passive components except

output filter capacitor could be integrated into the planar structure. Also, the

active IPEM will reduce the size for primary switches. With advanced integration,

the power density of 400kHz LLC resonant could be further improved.

Figure 5.50 Power density of discrete LLC and projected integrated LLC

For PWM converter, the high thermal stress and requirement of snubber

prevented from integrate secondary rectifier diodes into passive IPEM. With LLC

resonant converter, first the thermal stress on secondary rectifier diodes is greatly

reduced; also, with shottoky diodes and natural commutation, there is no need for

snubber. This gives us opportunity to integrate the secondary switches into

passive IPEM. With this integration, first the system will be built with just two

blocks, which makes the system very simple. With this method, the parasitic

between rectifier and transformer could be minimized which will be beneficial for

high switching frequency operation.

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5.4 Summary

In this part, the over load protection issue of LLC resonant converter is been

investigated. Three ways of over load protection methods are discussed. For each

method, there are some benefits and concerns.

Increasing switching frequency is simple to use and implement. The main

concern is that magnetic design will be greatly affect by how high the frequency

will be. Also, during protection, current stress is very high for primary switches.

The thermal design for primary switch will be suffered to deal with this condition.

For variable frequency + PWM control, some modification on the control

circuit is necessary to implement it. This method will prevent the issues of high

frequency operation in method a. We can choose a lower frequency and use PWM

control to limit the current so that magnetic and semiconductor doesn’t to be over

designed.

The problem of this method is that during protection mode, primary switches

will loss ZVS.

LLC resonant converter with splitting cap and clamping diodes is a very

effective way to limit the output current during over load condition. Basically this

is a passive method to limit the current. With splitting cap, input current ripple

can be reduced greatly. With clamping diodes, the current at over load condition

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Bo Yang Chapter 5. Improvements of LLC resonant converter

can be automatically limited. The voltage stress on the resonant cap is also kept

under a given voltage. ZVS is achieved during over load protection mode.

The problem of this method is that the setting point is a function of input,

output voltage. So for different operating point, this setting value will change. It

reaches minimal at low line and high output voltage and reaches maximum with

high line and low output voltage.

Since each of these three methods has its pros and cons, for different

requirement, different over load protection method should be choose. In some

case, combination of different method could be used to get better performance

too.

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Chapter 6

Small signal analysis and control design of

LLC converter

6.1 Introduction
In previous chapters, the characteristic, design and advantages of LLC

resonant converter were discussed. As demonstrated in chapter 3, LLC resonant

converter has very low switching loss. Because of low voltage stress on secondary

rectifier, low voltage rated diodes could be used, conduction loss is also much

reduced compared with PWM converter. With DC analysis and understanding of

the operation of LLC resonant converter, power stage parameters could be

designed to meet given specifications.

To use LLC resonant converter as front end DC/DC converter, still another

important issue need to be investigated: small signal characteristic. Small signal

characteristic is essential for the feedback loop design. For front end DC/DC

converter, feedback control is needed to provide a tight regulation of output

voltage with load and input variation, which happens all the time for front end

DC/DC converter. In Figure 6.1, the whole converter with control circuit is

shown. For LLC resonant converter, variable frequency control is used. To

achieve variable frequency control, instead of PWM comparator in PWM

controller, a Voltage Controlled Oscillator (VCO) is used to convert control

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

voltage Vc to the variable frequency square wave, which is used to drive the

switches. To design the compensator, we have to know the small signal

characteristic of the converter. In this part, the small signal characteristic of LLC

resonant converter with VCO will be investigated. Base on the small signal

characteristic of LLC resonant converter, the compensator design will be

investigated later.

Figure 6.1 LLC resonant converter with feedback control

For PWM converter, state space average method has been widely used. State

space average method provides simple and accurate solution for up to half

switching frequency. It has been verified and the theoretical system has been well

established. With the small signal model derived from state space average

method, small signal characteristic of PWM converter can be studied and control

circuit can be designed accordingly.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Unfortunately, state space averaging method cannot be applied for frequency

controlled resonant converter. This is because of the totally different ways of

energy processing methods for these two kinds of power converter. For PWM

converter, the natural frequency of the linear network (output filter) is much lower

than the switching frequency. The modulation of the converter is achieved

through the low frequency content in the control signal. With this character, the

average method can provide approximate linear solution of the nonlinear state

equations. The derived model has a continuous form and is accurate up to half of

switching frequency. However, for resonant converter, the switching frequency is

close to the natural frequency of the linear network (resonant tank). The states

contain mainly switching frequency harmonics instead of low frequency content

in PWM converter. The modulation of the resonant converter is achieved by the

interaction between switching frequency and resonant frequency. Since average

method will eliminate the information of switching frequency, it cannot predict

the dynamic performance of resonant converter [D-6][D-7].

In the past, several methods were tried to solve this problem. Among these

methods, some made too many simplifications that the results cannot match with

test results. Some of them are very complex and difficult to use [D-8][D-9].

In this dissertation, two methods were used. One is Extended Describing

Function method developed by Dr. Eric X. Yang. This method is a simplified

version of describing function method. A software package in Matlab is also

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

developed to realize this method. With the software package, small signal

characteristic of a converter could be derived with short simulation time.

Another method used in this dissertation is a simulation-based method. This

method uses simulation tools to emulate the function of impedance analyzer to get

the small signal response of the converter. The method is based on time domain

switching model simulation, which is a necessary for every converter design. So

no extra modeling effort is needed for this method. It could be used to any

periodical operating converter. It is a very effective method to deal with complex

topology, which is difficult to deal with conventional method. Also, the impact of

parasitic could also be easily included into this method.

This chapter is organized in following way. First, two methods: extended

describing function method and simulation-based method, will be introduced.

With these two methods, small signal characteristic of LLC resonant converter

will be studied. Load impact, and resonant tank value impact will be studied with

these tools. Finally, the results from these two methods will be compared with test

results.

With the information of small signal characteristic of LLC resonant converter,

the design of the compensator will be discussed.

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6.2 Extended Describing Function analysis

Dr. Eric X. Yang published extended describing function method in [D-12].

This method is a simplified modeling method based on the describing function

method published by J. O. Groves [D-9]. With this method, the small signal

model of a periodical operating converter could be derived with any order of

harmonics of switching frequency taken into consideration. This method could be

used for PWM converter. With only DC components of state variables taken into

consideration, it is same as state space averaging method. For resonant converter,

since switching frequency and its harmonics also play important roles in the

power transfer process. State space averaging method could not be applied. With

extended describing function, high order harmonics could be included so that an

accurate model could be derived. The detail of extended describing function

method and introduction of the software package could be found in [D-12]. The

process of building the model for extended describing function is discussed in

Appendix D. The model file of LLC resonant converter needed to perform the

analysis are attached in Appendix D too.

In next part, the small signal characteristic of LLC resonant converter will be

discussed using extended describing function method. The circuit parameters used

for this analysis is shown in Figure 6.2.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.2 Circuit parameters for extended describing function analysis

For extended describing function method, the order of harmonics needed for

accurate model is one thing needs to be determined before doing the analysis. For

traditional resonant topologies like SRC and PRC, only the fundamental harmonic

of switching frequency will be sufficient to provide an accurate small signal

model [D-11][D-12]. For LLC resonant converter, though, it is a multi resonant

converter. The fundamental component of switching frequency might not be

enough.

In Figure 6.3, the control to output transfer function is shown for region 1

(switching frequency higher than series resonant frequency). As seen from the

graph, in region 1, fundamental component seems to be enough. With higher

order of harmonics took into consideration, the model will not be improved

significantly. This is understandable since in region 1, LLC converter operates

very similar to SRC.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.3 Impact of harmonic order on the accuracy of EDF method in region 1

In Figure 6.4, same analysis was done in region 2 (switching frequency lower

than series resonant frequency). In region 2, fundamental component is not

enough. With more harmonics considered, the model will be different from only

consider the fundamental component. But after the 5th harmonic, include more

harmonics doesn't make any significant difference anymore. In the later

simulation, we will use 1st, 3rd and 5th harmonic for analysis. This result is also

reasonable because in region 2, LLC resonant converter is working as a multi

resonant converter. During each switching cycle, the resonant frequency changes

as topology modes progress.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.4 Impact of harmonic order on the accuracy of EDF method in region 2

With up to 5th harmonic take into consideration; the small signal characteristic

of LLC resonant converter is derived with extended describing function method.

With this requirement, the simulation time is extended.

Another problem with extended describing function method is that to build the

model, every operating modes of the circuit need to be identified. For LLC

resonant converter, it has many different operating modes as shown in Appendix

B. It would be very difficult to build the model file. Next, time domain

simulation-based method will be discussed, which could solve these problems.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

6.3 Time domain simulation method

This method uses brute force simulation to derive the small signal

characteristic of LLC resonant converter. It emulates the function of a network

analyzer. To perform this analysis, only the switching model of the converter is

needed, there is no other model needed, which makes this method very attractive.

The procedure of this method is shown in Figure 6.5.

Figure 6.5 Procedure for simulation method to analyze small signal characteristic

First step of this method is to simulate the converter at given operating point

(Load condition, switching frequency and input voltage) without perturbation as

shown in Figure 6.6. After simulate to steady state, record all the information

needed as the base information.

Second step is to simulate the converter with perturbation added to where

interested. For example, to investigate the control to output characteristic, a

perturbation will be added to the control voltage as shown in Figure 6.7. This

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

perturbation will be a small amplitude sinusoidal signal with known phase

information. The amplitude is small so that the converter operation modes will not

change with perturbation added. With perturbation injected, make another time

domain simulation to steady state and record all the information interested.

Figure 6.6 Circuit setup for first step simulation

Figure 6.7 Circuit setup for second step simulation

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Next, the results of previous two simulations will be compared. The impact of

the injected perturbation on output variable could be derived. This will give us the

small signal characteristic of the converter at one perturbation frequency. Repeat

above steps for the frequency range interested, a complete small signal

characteristic at given operating condition could be extracted. If other operating

point is interested, change the switching circuit model so that the converter is

operated at new operating point.

As can be seen, this method asks for extensive simulation power. Fortunately,

with advanced software and computer, this is not so time consuming a method.

First, with Simplis software, above process could be automated. The software

could do the sweeping of frequency and operating condition as set. It also

performs the extraction of small signal characteristic after each simulation. With

this software, one bode plot of the converter at given operating condition could be

simulated in two hours.

With simulation method, a SRC was analyzed. The results were shown in

Appendix C.

6.3.1 Small signal characteristic of LLC resonant converter

With extended describing function method, the characteristic in region 1 is

shown in Figure 6.8. It is a three poles and one zero system.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

As seen from the graph, in region 1, there are one beat frequency double pole,

one low frequency pole and one ESR zero. As switching frequency moves close

to resonant frequency, the beat frequency double pole will move to lower

frequency. When the switching frequency is very close to resonant frequency, the

beat frequency double pole will eventually split and becomes two real poles. One

moves to higher frequency and one move to lower frequency as switching

frequency continuous move close to resonant frequency. Finally, the pole moves

to low frequency will combine with the low frequency pole caused by the output

filter and form a double pole. This characteristic is same as could be observed in

SRC converter. In this analysis, the ESR of output capacitor is considered. This

ESR will introduce an ESR zero at fixed frequency.

Figure 6.8 System poles and zeros of LLC in region 1 with different switching frequency

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Audio susceptibility, input conductance and output impedance in region 1 are

also shown in Figure 6.9, Figure 6.10, and Figure 6.11.

Figure 6.9 Input conductance of LLC converter in region 1

Figure 6.10 Output impedance of LLC resonant converter in region 1

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.11 Audio susceptibility of LLC converter in region 1

The characteristic in region 2 is shown in Figure 6.12. In this region, the

system has some very different characteristic. A Right Half Plane Zero is

observable in this region. This RHZ moves with switching frequency.

Fortunately, this RHZ doesn’t shift to very low frequency region even when

switching frequency is very low. This is good since it is not easy to deal with the

RHZ.

In left half plane, there are three poles and one zero. They are pretty stable

compared with poles and zero in region 1. In region 1, when switching frequency

moves close to resonant frequency, one pole moves to higher frequency. When

the converter runs into region 2, as switching frequency further reduces, this pole

will move back to lower frequency, but not so much. In this region, the switching

frequency has less impact on the double pole at low frequency and no impact on

the ESR zero.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.12 System poles and zeros of LLC converter in region 2

Audio susceptibility, input conductance and output impedance in region 2 are

also shown in Figure 6.13, Figure 6.14, and Figure 6.15.

Figure 6.13 Input conductance of LLC resonant converter in region 2

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Figure 6.14 Output impedance of LLC resonant converter in region 2

Figure 6.15 Audio susceptibility of LLC resonant converter in region 2

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From above analysis results, the small signal model of LLC resonant

converter could be extracted. In region 1, this converter is very similar to the

series resonant converter. In region 2, though, it is very different. One RHZ could

be observed in region 2. The poles and zero in left half plane are very stable with

the changing of switching frequency, which is very different from normal

resonant converter.

The problem of this method is that to get accurate small signal model of the

converter, a good model file is needed. This is a very time consuming process

especially when the converter could run into many different operating modes.

Another problem is that the accuracy is depends on the order of harmonics took

into consideration. With higher order of harmonics, the simulation time and

convergence problem will be difficult to deal with. Due to the difficulties to build

the model file, it is not easy to take the parasitic components into consideration. In

next part, the time domain simulation method will be discussed.

Next, simulation based method will be used. The simulation is performed on

LLC resonant converter as shown in Figure 6.16. The resonant frequency of Cr

and Lr is designed at 250kHz. Here full load condition is used to analyze the

small signal characteristic. Later load impact will be investigated.

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Figure 6.16 LLC converter setup for small signal analysis

In Figure 6.18, the small signal characteristic of LLC resonant converter is

shown. The simulation is performed for a switching frequency range from

100kHz to 400kHz to cover all three operating regions. In the small signal

characteristic of LLC resonant converter, three distinctive regions exist

correspond to the three operating regions shown in the DC characteristic. Next the

characteristic of these three regions will be discussed in detail.

For region 1, the converter operates similar as a series resonant converter. The

small signal characteristic is also very similar to SRC. Low frequency pole and

beat frequency double pole could be observed in this region.

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Figure 6.17 Operating region of LLC resonant converter

Figure 6.18 Bode plot of control to output transfer function for LLC resonant converter

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.19 Bode plot of control to output transfer function of LLC resonant converter in region 1

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.20 Bode plot of control to output transfer function of LLC resonant converter in region 2

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

The characteristic in region 2 is shown in Figure 6.20. Region 2 is a very

interesting region. In this region, the DC characteristic is like a PRC. But for the

small signal characteristic of LLC resonant converter is very stable in this region.

As seen in the graph, there is no beat frequency double pole. As switching

frequency changes, the characteristic doesn't change much.

At low frequency, instead of single pole, now it is a double pole. This double

pole moves as switching frequency changes. Since the switching frequency range

is not so wide, with in region 2, this double pole doesn't move too much.

There is a sign of a right half plane zero exists in this region though. From the

graph, it can be seen that at 30k to 40kHz frequency range, the magnitude of the

characteristic changes slope from -40dB/Dec to -20dB/Dec while the phase is

continue reducing. For front-end application, the bandwidth is normally designed

at 2 to 5kHz. This right half plane zero shouldn't impact too much on the feedback

loop design.

Region 3 is ZCS region, which is not a desired operating region for this

application.

From the simulation results, following observation could be made:

1. There is no beat frequency dynamic problem at the boundary between

region 1 and region 2. This gives us opportunity to operate the converter right at

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the resonant frequency of Cr and Lr, which is boundary point between region 1

and region 2.

2. In region 1, the converter behaves very similar to SRC. Beat frequency

double pole and low frequency pole could be observed.

3. In region 2, the small signal characteristic of the converter is pretty stable

with switching frequency change.

4. Between region 2 and region 3, beat frequency dynamic could be observed.

The phase of small signal characteristic will jump for 180 degree across the

boundary.

Above analysis is performed at given load. Next the impact of load change on

the small signal characteristic will be investigated.

6.3.2 Impact of load variation on small signal characteristic

In this part, the impact of load variation on the small signal characteristic of

LLC resonant converter will be investigated. The simulations were performed in

region 1 and region 2.

The small signal characteristic of LLC resonant converter with different load

in region 1 (fs=300kHz > fr=250kHz) is shown in Figure 6.21.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.21 Bode plot of control to output transfer function of LLC resonant converter with load

variation in region 1(fr=250kHz, fs=300kHz)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.22 Bode plot of control to output transfer function of LLC resonant converter with load

variation in region 1(fr=250kHz, fs=300kHz) (full load to 25% load)

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Figure 6.23 Bode plot of control to output transfer function of LLC resonant converter with load

variation in region 1(fr=250kHz, fs=300kHz) (25% to no load)

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From the graph, several things could be observed. With load changes, the

small signal characteristic of LLC resonant converter could be divided into two

regions as shown in Figure 6.22 and Figure 6.23. In the first region, the

characteristic doesn't change much. Within the region, the converter still works in

continuous conduction mode. When load reduced to some level, the converter will

run into DCM as discussed in Appendix B. Then the low frequency pole will

move to lower frequency and beat frequency double pole will move to higher

frequency. At light load, LLC resonant converter could be treated as a first order

system in very wide frequency range.

The small signal characteristic of LLC resonant converter with different load

in region 2 is shown in Figure 6.24. It could be divided into three load ranges

according to different trends in the moving direction of poles and zeros as shown

in Figure 6.25, Figure 6.26 and Figure 6.27.

In first load range, as load decreases, the Q of low frequency double pole will

reduce. The right half plane zero tends to move to higher frequency and

eventually move out of half switching frequency range.

In the second load range, however, the quality factor of low frequency double

pole will increase as load further decrease.

As load continue reduce, the characteristic will come into load range 3. In

load range 3, the low frequency double pole will split. One move to low

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frequency and one move to high frequency, just as could be observed in PWM

converter.

Figure 6.24 Bode plot of control to output transfer function of LLC resonant converter with load

variation in region 2(fr=250kHz, fs=200kHz)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.25 Bode plot of control to output transfer function of LLC resonant converter with load

variation in region 2(fr=250kHz, fs=200kHz) (full load to 25% load)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.26 Bode plot of control to output transfer function of LLC resonant converter with load

variation in region 2(fr=250kHz, fs=200kHz) (25% to 10% load)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.27 Bode plot of control to output transfer function of LLC resonant converter with load

variation in region 2(fr=250kHz, fs=200kHz) (10% to no load)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

From above simulation results, one conclusion is that with light load, one low

frequency pole will exist. This needs to be considered when design the

compensator.

6.4 Impact of circuit parameters

In this part, the impact of some components value on the small signal

characteristic of LLC resonant converter will be shown. The components will be

investigated include: output filter capacitor, magnetizing inductance Lm, and

resonant tank impedance.

6.4.1 Impact of output capacitance

In this part, the small signal characteristic of LLC resonant converter with

different Co will be simulated.

Figure 6.28 Simulation setup for output capacitor impact on small signal characteristic

The converter is shown in Figure 6.28, the resonant frequency is 250kHz. The

simulation will be performed in two switching frequency. One frequency is in

region 1 at 300kHz as shown in Figure 6.29. The other simulation is performed in

region 2, with switching frequency at 200kHz as shown in Figure 6.30.

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From both simulation, Co only impact the low frequency pole and doesn’t

affect high frequency poles.

Figure 6.29 Bode plot of control to output transfer function with different output capacitance with

switching frequency 300kHz(region 1)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.30 Bode plot of control to output transfer function with different output capacitance with

switching frequency 200kHz(region 2)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

6.4.2 Impact of magnetizing inductance

In this part, the small signal characteristic of LLC resonant converter with

different Lm will be simulated.

The converter been simulated is shown in Figure 6.31, the resonant frequency

is 250kHz. Same as for previous case, two switching frequency points will be

choose. One frequency is in region 1 at 300kHz as shown in Figure 6.32. The

other simulation is performed in region 2, with switching frequency at 200kHz as

shown in Figure 6.33.

Figure 6.31 Simulation setup for magnetizing inductance impact on small signal characteristic

From the simulation in region 1, Lm doesn’t affect the small signal

characteristic in this region at all. With Lm changed by 10 times, the small signal

characteristic is almost constant. In region 2, Lm has great impact on the DC gain

of the small signal characteristic. With larger Lm, the right half plane zero also

tends to shift to lower frequency.

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.32 Bode plot of control to output transfer function with different magnetizing inductance

with switching frequency 300kHz(region 1)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.33 Bode plot of control to output transfer function with different magnetizing inductance

with switching frequency 200kHz(region 2)

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6.4.3 Impact of resonant tank impedance

In this part, the small signal characteristic of LLC resonant converter with

different resonant tank impedance will be simulated. The resonant frequency is

kept constant in the simulation. The converter been simulated is shown in Figure

6.34, the resonant frequency is kept constant at 250kHz, which means as Lr been

changed, Cr will be changed accordingly. Same as for previous case, two

switching frequency points will be choose. The 300kHz case is shown in Figure

6.35. The 200kHz case is shown in Figure 6.36.

Figure 6.34 Simulation setup for resonant tank impedance impact on small signal characteristic

As from the simulation, in region 1, as impedance of resonant tank increases,

which means increase Lr and reduce Cr, the DC gain will increase. This is

understandable since with higher impedance, the Q with given load will increase,

then the slope of the DC characteristic will have larger value, which is the DC

gain in small signal characteristic. Another interesting thing is that the first pole

will move with different resonant tank impedance, which means in LLC resonant

converter, the lowest pole is not determined by output filter only. In region 2, the

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similar impact on DC gain could be observed. With larger Lr, one low frequency

pole also moves to higher frequency.

Figure 6.35 Bode plot of control to output transfer function with different resonant inductance

with switching frequency 300kHz(region 1)

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.36 Bode plot of control to output transfer function with different resonant inductance

with switching frequency 200kHz(region 2)

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6.5 Test verification

In this part, a test circuit was built with same parameters as used in the

analysis. The test setup is shown in Figure 6.37.

Figure 6.37 Test setup up for small signal characterization of LLC converter

In Figure 6.38, the results in region 1 with full load are shown for three

methods: test, simulation and extended describing function. From the comparison,

these three results match each other very good.

In Figure 6.39, the results in region 2 with full load are shown for three

methods: test, simulation and extended describing function. From the comparison,

these three results match each other very good.

From the verifications, both methods match test results very well. These two

methods have their pros and cons. For simulation method, it is easy to implement.

With powerful computer and software, it is also fast. The problem is lacking of

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insight of the model of the converter. It just gives the bode plot of the

characteristic of the converter. If more information is needed, extended describing

function method could be helpful. With extended describing function method,

more information about the small signal characteristic of the converter could be

derived. The drawback is that to build the model, a thorough understanding of the

converter is critical. When the operating modes of the converter are too complex,

this will be a painful process.

Figure 6.38 Bode plot of control to output transfer function at full load in region 1

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.39 Bode plot of control to output transfer function at full load in region 2

6.6 Compensator design for LLC resonant converter

From above analysis, we have a complete picture of the small signal model of

LLC resonant converter. Base on this information, the compensator could be

designed.

First, as seen in the characteristic of LLC resonant converter, the phase at DC

is 180-degree instead of 0-degree as seen for PWM converter. This means from

the control voltage point of view, LLC resonant converter is an inverter. As

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control voltage increases, output voltage will decrease. This is because of the fact

that for resonant converter to work under ZVS condition, the output voltage will

decrease when switching frequency increases. For voltage-controlled oscillator,

when its input voltage increases, the frequency will increase. For PWM converter,

duty cycle will increase as control voltage increases, which will increase the

output voltage. For PWM converter, the compensator is a negative feedback as

shown in Figure 6.40. For LLC resonant converter, a positive input compensator

is needed as shown in Figure 6.41 because of the negative transfer function of the

converter.

Z2
Vc1 = − Vo1
Z1
Figure 6.40 Compensator for PWM converter

Z2
Vc 2 = Vo 2
Z1
Figure 6.41 Compensator structures for LLC resonant converter

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For LLC resonant converter, its designed operating region is region 2

(switching frequency lower than series resonant frequency). In this region, the

small signal characteristic of LLC resonant converter is pretty stable with

changing of switching frequency. Although a RHZ exists in this region, it never

moves to very low frequency. The more significant impact is the load change.

With light load, one pole will move to very low frequency. With integrator in the

compensator, this might introduce conditional stable situation.

Figure 6.42 Small signal characteristic of LLC converter in region 2

Figure 6.43 Load impact on small signal characteristic of LLC converter in region 2

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Although region 2 is the designed operating region, converter might operate in

region 1 due to the fact that the intermediate bus is loosely regulated. Load or AC

line transient could cause this voltage rise to as high as 430V. During those

conditions, the converter will operate in region 1. So the characteristic in region 1

also needs to be considered during compensator design. In region 1, the converter

will have a beat frequency double pole and one low frequency pole.

Figure 6.44 Small signal characteristic of LLC converter in region 1

As load changes in region 1, similar phenomenon could be observed as in

region 2. The double pole will split and one moves to high frequency, one moves

to very low frequency.

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Figure 6.45 Load impact on small signal characteristic of LLC converter in region 1

With above information, the compensator could be designed. Since the RHZ

is at pretty high frequency, it will not impact the compensator design so much.

What need to be dealt with are one double pole and one ESR zero. At light load

condition, as one pole will move to low frequency, the low frequency pole need to

be considered. To compensate this system, a compensator with one integrator, 2

poles and 2 zeros is used. The two zeros are placed to compensate the double pole

exists in the system. Another consideration is the low frequency pole due to light

load. With these two considerations, one zero is placed at low frequency to

prevent conditional stable from happening. Another zero is placed around the

double pole. The poles are placed to compensate the ESR zero and provide more

attenuation at switching frequency. The compensator is shown in Figure 6.46.

With this compensator, the loop gain in different operating regions is shown in

Figure 6.47 and Figure 6.48. The test results of LLC resonant converter under

load change are shown in Figure 6.49 and Figure 6.50. The output voltage is

within 5% regulation window during full range load step.

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Figure 6.46 Compensator designed for LLC resonant converter

Figure 6.47 Plant bode plot and loop gain bode plot in region 1

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Bo Yang Chapter 6. Small signal analysis of LLC resonant converter

Figure 6.48 Plant bode plot and loop gain bode plot in region 2

Figure 6.49 Test result of load change from no load to full load

Figure 6.50 Test result of load change from full load to no load

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6.7 Summary
In this chapter, small signal characteristic of LLC resonant converter is been

investigated. Two methods were used to perform the analysis: simulation and

extended describing function method. With simulation, the small signal

characteristic of the converter could be covered with any operation mode. The

drawback is lack of insight of the characteristic. With extended describing

function method, more information could be obtained. The drawback is the needs

of develop the model file, which is not an easy task to cover all operating points.

The best way is to combine the power of these two methods. Then a more

accurate, more efficient and more comprehensive characteristic of any converter

could be obtained.

The results of these two methods match very well. They were also been

verified with test setup.

Base on this information, the compensator could be designed and the front end

DC/DC converter is a complete system now.

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Bo Yang Chapter 7. Summary and future work

Chapter 7

Summary and Future Work

The fast advance in VLSI technology made smaller, more powerful systems

available. At the same time, it calls for high power density, and low profile power

system. To achieve these goals, high switching frequency, high efficiency, and

advanced packaging technology are the paths. It is the goal of this work to

develop technology to meet and exceed these challenges.

7.1 Summary
PWM topologies like asymmetrical half bridge and phase shift full bridge

have been widely used for front end DC/DC application. For these topologies, two

aspects limited the power density and efficiency. One is high switching loss

related to high turn off current. The other one is the problem with hold up time

requirement. With hold up time requirement, the input range of front end DC/DC

converter is very wide. Performance at high input voltage is essential for the

power density of the system since the thermal management is designed according

to high input voltage performance. For PWM converter, with wide input range,

the duty cycle at high input voltage will be minimal. This will cause many

problems: high conduction loss, high voltage stress on semiconductor devices,

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and high switching loss. With wide input range, the performance at high input

voltage is severely impacted.

7.1.1 Improvement of the state of the art topologies

The primary target is to deal with hold up time problem. Two methods were

discussed to solve this problem: range winding solution and asymmetrical

winding solution.

For range winding solution, extra components and windings are needed. With

range winding, converter could be optimized for a much narrower input range so

that the performance at high input voltage could be optimized. During hold up

time, range winding will provide enough gain to work with low input voltage.

This method could be applied to any isolated PWM topologies with similar issue.

For asymmetrical half bridge, asymmetrical winding solution is a simple and

effective solution. With asymmetrical winding, the DC characteristic of

asymmetrical half bridge could be modified. The duty cycle at high input voltage

could be extended. With extended duty cycle, lower voltage rated devices could

be used. This will provide significant improvement on the efficiency. This method

could only be applied to asymmetrical half bridge.

Secondary conduction loss is the biggest part in total system loss, which is

caused by the high forward voltage drop of rectifier. Synchronous rectifier has

been widely used in low voltage high current application because of this problem.

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For front end DC/DC application, it is not so straightforward. Because of high

voltage stress on the rectifier, high voltage devices are needed. When voltage

rating is higher than 200V, it is difficult to find a MOSFET could outperform

diode rectifier. To use 200V devices, symmetrical half bridge is chosen. Another

obstacle is the reverse recovery of the body diodes of synchronous rectifier. For

200V MOSFET, the body diodes are pretty slow. It will introduce high current

spike and ringing which is both dangerous and noisy. Quasi-square-wave

synchronous rectification is introduced to solve this problem. With QSW

operation mode, the conduction of body diodes is totally prevented. It also helps

symmetrical half bridge to achieve ZVS for primary switches. This concept could

be used to other application with body diode reverse recovery problem too.

7.1.2 LLC resonant converter

Although above solutions could improve the efficiency of PWM converter.

None of them deals with high turn off loss of the switches, which limit the

switching frequency, as the result, limit the power density achievable for PWM

topologies.

Resonant topologies are well known for its low switching loss. Three popular

resonant topologies, SRC, PRC and SPRC, were investigated for front end

DC/DC application. Unfortunately, all these topologies see big penalties when

design for hold up requirement. There is no significant improve of performance

compared with PWM topologies.

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Bo Yang Chapter 7. Summary and future work

Although negative outcome of above analysis, the desired characteristic for

front end DC/DC application could be extracted, which enable the converter

working at resonant frequency at high input voltage. Three components resonant

tanks were searched thoroughly. Among 15 three components resonant tanks

suitable for voltage source input, resonant tank with two inductors and one

capacitor seems could provide the desired characteristic.

With the resonant tank, LLC resonant converter could be constructed. It is not

a new topology. But the unique operating mode of this topology enable it to be

optimized at high input voltage while is able to cover wide input range at the

same time. Compare with PWM topologies, LLC resonant converter could reduce

40% loss at same switching frequency.

7.1.3 DC analysis of LLC resonant converter

To design LLC resonant converter, DC analysis is performed. Two methods,

fundamental component simplification and simulation, were used and compared.

Fundamental component simplification method is simple to use and could provide

the intuitive results. The problem is that when switching frequency is away from

resonant frequency the error will be significant, which will prevent us to achieve

optimized design. This calls for simulation method, which could provide very

accurate characteristic, but with longer time to perform. To achieve optimized

design, simulation method is recommended.

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7.1.4 Magnetic integration and over load protection

To achieve high power density, magnetic design is very critical. Integrated

magnetic can reduce the volume of magnetic components with proper design. The

common problem of integrated magnetic structure is not easy to manufacture. A

novel integrated magnetic structure for LLC resonant converter is proposed. With

this structure, all the magnetic components of LLC resonant converter could be

integrated into one magnetic structure. There is no special gapping needed, which

make the structure easy to manufacture and mechanically stable. Flux ripple

cancellation is also achieved with proposed integrated magnetic structure.

Compare with discrete design, 30% reduction on footprint could be expected.

Over load condition is a common fault condition for power converter. To

make practical use of a topology, it has to be able to deal with over load situation.

For LLC resonant converter, it is working close to resonant frequency; the

impedance of resonant tank is very small. This makes over load protection very

important function. Three methods could be used to provide over load protection

for LLC resonant converter: increasing switching frequency, variable frequency

plus PWM control and clamped LLC converter. First two methods is through

active control the switches to change the input voltage or the impedance of

resonant tank to limit the current during over load condition. The clamped LLC

converter uses clamping diodes on resonant capacitor. With clamping diodes,

energy could be passed through resonant tank is limited, which will limit the

stress during over load condition.

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7.1.5 Small signal analysis of LLC resonant converter

With above discussion, the power stage of LLC resonant converter could be

designed. To complete the system, feedback control is needed to provide a

regulated output. Small signal characteristic of LLC resonant converter is needed

to perform this task. For resonant converter, state space averaging method is no

longer valid. Two methods were used to reveal this mystic: time domain

simulation method and extended describing function method.

Time domain simulation method is based on switching circuit model. The

method tries to emulate the function of network analyzer. This method made no

simplification. As long as the switching circuit model is accurate, the result will

be very close to the real circuit. Extended describing function method is a

mathematical method based on describing function method for nonlinear system.

With describing function method, more detailed information about the system

could be revealed. This method could take any harmonic components of switching

frequency into consideration. With these two methods, small signal characteristic

of LLC resonant converter is investigated for different switching frequency and

load condition.

For the small signal characteristic of LLC resonant converter, there are several

interesting phenomenon. When switching frequency is higher than series resonant

frequency, the converter acts very similar to SRC. Between series resonant

frequency and low frequency resonant frequency, small signal characteristic is

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Bo Yang Chapter 7. Summary and future work

more stable compare with previous region. With load change, the change on small

signal characteristic is similar to those could be observed in PWM converter, split

of double pole could be observed. With information about small signal

characteristic of the converter, compensator could be designed.

With the knowledge from this work, LLC resonant converter could be

designed for given specifications. From the prototypes built in CPES, LLC

resonant converter shows great improvement in efficiency and power density.

Compare 200kHz switching frequency design, LLC resonant converter could

improve efficiency by more than 3%. Power density could be improved by almost

100%. With 400kHz design of LLC resonant converter, the power density could

be improved by more than 200% compare with asymmetrical half bridge

converter.

7.2 Future work

7.2.1 Passive integration for LLC resonant converter

Passive components are often the limitation on volume, and cost of the

system. For LLC resonant converter, with integrated magnetic technology, all

magnetic components could be integrated into single magnetic structure. With

planar magnetic, the resonant capacitors could also be integrated into magnetic

structure. This way, all the passive components except output cap could be

integrated. This integration will provide many benefits: high density, less

interconnection, better electric performance.

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With passive integration, more complex resonant tank structure could be

constructed. With more complex structure, other benefits could be expected as

shown in Figure 7.1, Figure 7.2, and Figure 7.3. With another branch in resonant

tank, the primary RMS current could be reduced.

Figure 7.1 LLC resonant tank and LLC resonant tank with passive current shaping

Figure 7.2 Simulation waveform of LLC resonant converter

Figure 7.3 Simulation waveform of LLC resonant converter with passive current shaping

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7.2.2 LLC resonant converter for other application

The most significant benefit of LLC resonant converter for front end DC/DC

application is that it could be optimized for high input voltage. In fact, other than

this, there are several other benefits. First, the voltage stress on the secondary

rectifier is minimized to two times output voltage only. Second, the output

rectifier commutates naturally, there is no reverse recovery problem. Third,

switching loss of LLC resonant converter could be minimized. Fourth, without

output filter inductor, the transient of LLC resonant converter could be very fast.

With all these advantages, LLC resonant converter is a possible candidate for

other applications like isolated point of load converter too.

Higher frequency operation of LLC resonant converter

With LLC resonant converter, switching loss could be minimized. By control

magnetizing inductance Lm, switching loss could also be controlled. This gave us

opportunity to push to higher switching frequency. For some state of the art

magnetic material, the optimal operating frequency could be as high as MHz.

LLC resonant converter enable us to utilize these new material in front end

application. The issue is how to trade off the design between magnetic loss,

volume and operating region of the system.

7.2.3 Small signal modeling of resonant converter

In this work, the small signal characteristic of LLC resonant converter is been

revealed. Still, a simple and easy to use model is not available yet, which is a

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major obstacle for people to accept and appreciate this topology. With extended

describing function method, it is possible to get an equivalent small signal circuit

model when only first order harmonic of switching frequency is considered.

Unfortunately, third or even fifth harmonic are needed to model LLC resonant

converter. There is still need to develop method to derive simple circuit model for

this kind of topologies.

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Bo Yang Appendix A. Two and Three Components Resonant Tanks

Appendix A.

Two and Three Components Resonant

Tanks

In this part, resonant tank with two and three resonant components will be

listed and classified. Since this is a complex task, several boundaries were set to

make it manageable.

First, assume variable frequency control is the control method going to be

used for these tanks,

Second, for the resonant tank, input and output source type will be determined

by tank configuration. For example, the output is must a current source for PRC

since the primary side is capacitor, although PRC with voltage source could also

work. This also means that there is no capacitor in parallel with input terminals

since input is assumed to be voltage source type. Different input and output type

is shown in Figure A.1 and Figure A.2.

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Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.1 Input type for DC/DC converter

Figure A.2 Input type for DC/DC converter

Third, assume the input is voltage source; output could be voltage source or

current source.

A.1. Two resonant components resonant tank

For resonant tank with two resonant components, there are totally eight

different type of resonant tank configurations as shown in Figure A.3.

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Figure A.3 Two components resonant tanks

In this family, tank A is for series resonant converter. Tank C is for parallel

resonant converter. Tank B is another form of parallel resonant converter. Tank E

and Tank G requires a current source input, which is not commonly used for this

application. Tank F could be used for voltage source input, but it is not

meaningful since it cannot regulate power transferred to the load but increase the

circulating energy. Tank H could also be applied to voltage source input, but then

it is no longer a resonant topology because the resonant inductor will be clamped

by input voltage source and never resonant with resonant capacitor. So for two

resonant components resonant tank, tank A, B, C and D will be useful.

The characteristics of these four resonant tanks are shown below. We can see

that tank B has very similar characteristic with tank C that is widely used as

parallel resonant converter.

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Figure A.4 DC characteristic of two components tank A

Figure A.5 DC characteristic of two components tank B

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Figure A.6 DC characteristic of two components tank C

Figure A.7 DC characteristic of two components tank D

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A.2. Three resonant components resonant tank

There are many possibilities for three components resonant tank. In this part,

they will be listed and classified.

With three components, there are seventeen ways to connect them as shown in

Figure A.8.

Figure A.8 Components configuration for three components resonant tank

With in these seventeen configurations, 15, 16 and 17 will result to a reduced

order since two components could be replaced with one. For the other 14

configurations, with different resonant components, different resonant tank could

be constructed. Since we are looking at three components resonant tank, the

possible components used could be two Ls and one C or two Cs and one L. Three

Ls or three Cs will not result to three components resonant tank and will be

eliminated. With fourteen different configurations, there are 36 different resonant

tanks as shown below.

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Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.9. Resonant tank for components configuration 1

Figure A.10. Resonant tank for components configuration 2

Figure A.11. Resonant tank for components configuration 3

253
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.12. Resonant tank for components configuration 4

Figure A.13. Resonant tank for components configuration 5

Figure A.14. Resonant tank for components configuration 6

254
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.15. Resonant tank for components configuration 7

Figure A.16. Resonant tank for components configuration 8

Figure A.17. Resonant tank for components configuration 9

255
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.18. Resonant tank for components configuration 10

Figure A.19. Resonant tank for components configuration 11

256
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.20. Resonant tank for components configuration 12

Figure A.21. Resonant tank for components configuration 13

257
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.22. Resonant tank for components configuration 15

These 36 resonant tanks could be classified in following table. They are

classified according to the input source type and output type. For example, for

resonant tank A, the input and output are directly connected, so the input and

output have to be different type. In the table, it will be list as ITV or VTI, which

means the input is current source and output is voltage source or vice versa.

Another example is tank Y, since the input of the tank is capacitive, so input has

to be current source. The output of the tank is an inductor, so output has to be

voltage source. So tank Y could only be applied to ITV.

For these 36 resonant tanks, there are 23 could be used for voltage source

input. Next we will continue eliminate some of them. For some resonant tank

here, it could not be used to regulate the output. For example, tank A could be

used for VTI configuration. Since the resonant components is in parallel with the

input, they cannot affect the power transferred to output, which means with this

resonant tank, the output could not be regulated with variable frequency control.

258
Bo Yang Appendix A. Two and Three Components Resonant Tanks

For some other resonant tanks, with voltage source configuration, one or more of

the resonant components will not participate in controlling output power. For

example, in tank I, the series resonant branch is in parallel with input. The current

through this branch will not have effect on output power. So it will not behave as

three components resonant converter anymore.

Table A-1 Classification of three components resonant tanks

Tank VTV VTI ITV ITI Topo VTV VTI ITV ITI Topo
A V I 1 S V I 10
B I I 1 T I I 10
C V 2 U V 11
D V I 2 V V I 11
E V 3 W V 11
F I 3 X V I 11
G V 4 Y 11
H V 4 Z V 11
I V 5 A1 V 12
J V I 5 B1 I 12
K V 6 C1 V 12
L V I 6 D1 I 12
M V I 7 E1 I 12
N I I 7 F1 I I 12
O V I 8 G1 V I 13
P I I 8 H1 V I I 13
Q I 9 I1 V I 14
R I I 9 J1 I I 14
Total 9 14 23 9

Base on above rules, tank A, E, I, J, M, A1, C1 and I1 will be eliminated. So

the resonant tank could be used for voltage source input are listed as following:

259
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Table A-2 Three components resonant tanks with voltage source input

Tank VTV VTI Topo

C V 2
D V 2
G V 4
H V 4
K V 6
L V 6
O V 8
S V 10
U V 11
V V 11
W V 11
X V 11
Z V 11
G1 V 13
H1 V 13
6 9

Next the DC characteristic of each resonant tank will be derived.

Figure A.23. DC characteristic of tank C

260
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.24. DC characteristic of tank D

Figure A.25. DC characteristic of tank G

261
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.26. DC characteristic of tank H

Figure A.27. DC characteristic of tank K

262
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.28. DC characteristic of tank L

Figure A.29. DC characteristic of tank O

263
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.30. DC characteristic of tank S

Figure A.31. DC characteristic of tank U

264
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.32. DC characteristic of tank V

Figure A.33. DC characteristic of tank W

265
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.34. DC characteristic of tank X

Figure A.35. DC characteristic of tank Z

266
Bo Yang Appendix A. Two and Three Components Resonant Tanks

Figure A.36. DC characteristic of tank G1

Figure A.37. DC characteristic of tank H1

267
Bo Yang Appendix A. Two and Three Components Resonant Tanks

In above resonant tanks, tank H, X and Z have similar characteristic as

traditional called LCC resonant converter. For resonant tank G, U and W, they

have the characteristic of LLC resonant converter.

268
Bo Yang Appendix B. Operation modes of LLC resonant converter

Appendix B.

Operation modes and DC analysis of LLC

resonant converter

In this part, different operation modes of LLC resonant converter will be

discussed.

LLC resonant converter, as a three resonant components resonant converter,

has many different operating modes. It is a multi resonant converter. During one

switching cycle, the resonant tank configuration changes. With different load

condition, discontinuous conduction mode could happen. In this part, different

operating modes in different operating region and load condition will be listed.

From the DC characteristic of LLC resonant converter, the operating of LLC

resonant converter could be divided into three regions as shown in Figure B.1. As

discussed in chapter 3, region 1 and region 2 are ZVS regions, which are preferred

for high frequency operation. In region 3, the converter is working under ZCS.

For this converter, preferred operating regions are region 1 and region 2 in order

to achieve ZVS.

269
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.1 DC characteristic of LLC resonant converter

B.1. Operating modes of LLC resonant converter in Region 1

In region 1, the converter works very similar as a SRC. But because of the

impact of Lm, there are some new operation modes for LLC resonant converter.

In this region, there are three different operating modes as load changes.

Operating mode 1 in region 1

This mode of operation is same as a SRC. Resonant components Lr and Cr act

as the series resonant tank. During whole switching cycle, Lm is clamped by

output voltage and never participates in the resonant process. This mode also

could be called as continuous conduction mode since the output current is always

continuous.

In this operation mode, Lm just acts as a passive load of series resonant tank

of Lr and Cr. The operating waveforms are shown in Figure B.2.

270
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.2 Waveform of operation mode 1 in region 1 for LLC resonant converter'

271
Bo Yang Appendix B. Operation modes of LLC resonant converter

Operating mode 2 in region 1

As load becomes lighter, the converter will work into mode 2. The different of

mode 2 and mode 1 is that after primary switches been switched, there will have a

time period during which the secondary current is zero, or discontinuous

conduction mode. During this dead time, primary current is clamped to the Lm

current, the resonant tank will be consisted with Cr and Lm in series with Lr.

This mode happens when following condition is met:

Lm
(VIN + VCr ) ⋅ < Vo ⋅ n
Lm + Lr

When above condition is met, when primary switches switched, the voltage

apply to the Lm is the left of above equation. If this voltage is lower than the

output voltage reflected to the primary side, the output diodes would not conduct,

only after Lm current continuous charge Cr so that above condition is broken, the

output filter diodes begin to conduct. Then Lm will be clamped to output voltage

and no longer resonant with Cr.

During this mode, Lm not only acts as the load of SRC, it also participate in

the resonant with Cr. For SRC, there is no DCM in this region.

The operating waveforms are shown in Figure B.3. Because of existence of

Lm, there are more circulating current for LLC at light load compared with SRC.

But the benefit is ZVS is ensured at light load condition.

272
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.3 Waveform of operation mode 2 in region 1 for LLC resonant converter'

273
Bo Yang Appendix B. Operation modes of LLC resonant converter

Operating mode 3 in region 1

If load continuous reduce, the converter will works into mode 3. This mode

looks very similar to mode 2. But in fact, there are two kinds of discontinuous

conduction modes in this operating mode. First DCM happens after the primary

switches been switched as in Mode 2. But during the switching cycle, another

discontinuous mode happens. From the Lr and Lm current, it can be seen that Lr

current resonant and then clamped to Lm current before the switching action of

primary switch. This will introduce a zero current period before primary switch

action.

The operating waveforms of this operating mode are shown in Figure B.4.

From the waveforms, it can be seen that ZVS is still achieved because of Lm.

This is the major benefit of LLC converter been discussed before. With Lm, the

ZVS at light load could be maintained. Also, light load regulation is easier since

Lm is always presents as the load of the SRC.

274
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.4 Waveform of operation mode 3 in region 1 for LLC resonant converter'

275
Bo Yang Appendix B. Operation modes of LLC resonant converter

B.2. Operating modes of LLC resonant converter in Region 2

This region is a very interesting region. Traditional SRC will work into ZCS

when working in this region, so there is no region 2 for SRC. For LLC, with the

presents of Lm, even when switching frequency is lower than resonant frequency

of Lr and Cr, the converter could still work in ZVS condition with higher gain.

In this region, also exist three operating modes with different load conditions.

Operating mode 1 in region 2

This is the designed operating mode for LLC resonant converter at full load.

The waveforms of this operating mode are shown in Figure B.5. The major

characteristic of this operating mode is the two different resonant time periods.

First, when primary switches switched, Lr and Cr will resonant. During this time

period, Lm is clamped by output voltage and is linearly charged. When Lr current

resonant back to the same level as Lm current, second resonant happens, which is

the resonant between Cr and Lm in series with Lr. This resonance will last till the

primary switches been switched again. During second resonant time period, the

output current keeps zero. So the output current in this operation mode is

discontinuous. As seen in the waveforms, ZVS is achieved with Lm current. This

gives us freedom to choose desired turn off current to achieve ZVS while with

low turn off loss.

276
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.5 Waveform of operation mode 1 in region 2 for LLC resonant converter'

277
Bo Yang Appendix B. Operation modes of LLC resonant converter

Operating mode 2 in region 2

In mode 1, the output current is already discontinuous. As load becomes

lighter, another discontinuous mode will exist.

This discontinuous mode is very similar to operating mode 2 in region 1.

When load becomes lighter, the voltage on resonant capacitor Cr will be lower

when primary switches switched. If following condition is satisfied, then the

secondary diodes will not conduct. This will introduce a zero current period on

the output current after primary switching action.

Lm
(VIN + VCr ) ⋅ < Vo ⋅ n
Lm + Lr

As seen in the waveform, the energy flows back and forth from input, which

means most of the current are circulating in this mode. Although this causes

higher conduction loss at light load, it makes the converter operating with ZVS at

very light load. This circulating current is controllable through careful design of

Lm.

278
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.6 Waveform of operation mode 2 in region 2 for LLC resonant converter'

279
Bo Yang Appendix B. Operation modes of LLC resonant converter

Operating mode 3 in region 2

This is a mode in region 2 happens when the load is too heavy. In mode 1, two

resonant periods exist in half switching cycle. In this mode, three modes will exist

in half switching cycle.

First two time intervals are the same as in mode 1. If load is too heavy,

resonant capacitor Cr voltage ripple will increase. If Vcr is high enough to met

following equation, the third resonant period will happen:

Lm
(VCr − Vin ) ⋅ < VO ⋅ n
Lm + Lr

As shown in the waveforms in Figure B.7, after Lr current resonant back to

save level of Lm current, instead of clamped by Lm current, it will resonant to the

other direction. This is because of too high energy is stored in resonant capacitor

Cr that its voltage is high enough to make secondary diodes conduct. With this

mode, the switch turn off current will be less than Lm current. The risk is that the

energy is not enough for ZVS. Also, if Lr current resonant to negative, the

converter will work into region 3.

280
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.7 Waveform of operation mode 3 in region 2 for LLC resonant converter'

281
Bo Yang Appendix B. Operation modes of LLC resonant converter

B.3. Operating modes of LLC resonant converter in Region 3

Region 3 is a ZCS region. In this region, the DC gain characteristic has

positive slope. As seen from the waveforms in Figure B.8, switch is turned off

after its body diode begins to conduct. This is not a preferred operating mode for

MOSFET. In the design, this mode should be prevented.

These different operating modes will happen during the operation of LLC

resonant converter. For the discontinuous operating modes, they will not affect

the ZVS capability of the converter because of presents of Lm. During heavy load

in region 2, the converter will come into ZCS. As discussed in over load

protection, applying clamped LLC resonant topology could prevent this.

282
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.8 Waveform in region 3 for LLC resonant converter

283
Bo Yang Appendix B. Operation modes of LLC resonant converter

B.4. DC analysis of LLC resonant converter

In this part, two aspects will be addressed. First is the DC characteristic. DC

characteristic is the most important information for the converter design. With DC

characteristic, the parameters could be chosen; the design trade offs can be made.

For LLC resonant converter, the DC characteristic will draw the relationship

between voltage gain and switching frequency for different load condition.

Traditionally, fundamental element simplification method was used to

analysis the DC characteristic of resonant converter. The fundamental element

simplification method assume only the fundamental components of switching

frequency is transferring energy. With this assumption, the nonlinear part of the

converter like switches, Diode Bridge could be replaced with linear components.

The simplified converter will be a linear network to analysis. So with this method,

the DC characteristic could be derived very easily. And the result will be a close

form equation, which is easy to use.

For LLC resonant converter, the simplification could be done as shown in

Figure B.9.

Figure B.9 Simplified topology with fundamental component assumption

284
Bo Yang Appendix B. Operation modes of LLC resonant converter

With this simplified circuit model, the DC characteristic could be get as:

Vo j ⋅ ω n ⋅ Ql
=
Vin j ⋅ ω (Q + 1 − 1 ) + Q (1 − ω 2 )Q ⋅ 8
n l l n s
2
ωn 2
π

ω n : Normalized switching frequency

Lr
Zo :
Cr
Lm
Ql : : Ratio of two resonant inductance
Lr
8
R AC : Equivalent Load Resistance Ro ⋅ n 2
π2
Zo
Qs:
Ro

For this method, there are some limitations. Because this method is a

simplified method, error will be generated with different operating point. When

the current waveform is not sinusoidal and contains more high order harmonic,

this method will generate high error. To evaluate this error, a more accurate DC

characteristic is needed. Here simulation is used to derive the accurate DC gain

characteristic. A time domain switch circuit model is built in simulation software.

By changing the switching frequency and load condition, a output voltage can be

get for each point. Sweep load and switching frequency, an accurate DC

characteristic is got. The results of these two methods are shown in following

figures. And the error is also shown.

285
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.10 DC characteristic from simplified model

Figure B.11 DC characteristic from simulation method

286
Bo Yang Appendix B. Operation modes of LLC resonant converter

Figure B.12 Error of simplified circuit model

From the error it can be seen that, when the switching frequency equals to the

resonant frequency, there is no error. When the switching frequency is moving

away from resonant frequency, the error will be high. This can be understood

from waveform also; when the circuit works at resonant frequency, the current

waveform is exactly sinusoidal, so simplified model doesn't have any error. When

switching frequency is away from resonant frequency, high order harmonic

content will increase, which will affect the accuracy of the simplified model.

For the design of LLC resonant converter, the trade offs are more affected by

operating point with maximum gain. With simplified model, large error will be

introduced. Simulation gives accurate results; the issue is that it is time

consuming. A better method is to combine these two methods. During primary

287
Bo Yang Appendix B. Operation modes of LLC resonant converter

design, use simplified model to get a range. To optimize the design, simulation

method is preferred to get a better design.

288
Bo Yang Appendix C. Small signal characteristic of SRC converter

Appendix C.

Small signal characteristic of SRC

converter

C.1. Small signal characteristic of SRC

The circuit parameters for SRC used in the simulation are shown in Figure

C.1. The small signal characteristic get from simulation are shown in Figure C.2.

Figure C.1 SRC circuit for small signal analysis

In the graph, the x-axis is the frequency of the perturbation signal as in bode

plot; y-axis is the magnitude in DB or phase in degree, and z-axis is the running

parameter, which is the switching frequency. This is because for resonant

converter, to regulate the output voltage, the switching frequency will be varied.

For different switching frequency, the small signal model will be different. From

these results, following things can be clearly identified:

289
Bo Yang Appendix C. Small signal characteristic of SRC converter

1. Beat frequency double pole. This is a special characteristic for resonant

converter [5][6]. As switching frequency changes, a double pole with frequency

at the difference of switching frequency and resonant frequency will move

accordingly too. Finally, when switching frequency is close enough to resonant

converter, this double pole will split, one merge with low frequency pole formed

by output cap and load, one move to higher frequency.

Figure C.2 Bode plot of control to output transfer function of Series Resonant Converter

290
Bo Yang Appendix C. Small signal characteristic of SRC converter

2. Beat frequency dynamic. Since the low frequency gain is proportional to

the slope of DC characteristic of series resonant converter. When the operation

frequency moves close to the resonant frequency, the slope gets flat and low

frequency gain drops. When switching frequency equals to resonant frequency,

the gain will be zero. As can be clearly seen on the graph, when switching

frequency is close to resonant frequency, the control to output gain will be very

low. A gap can be observed on the graph.

3. The phase has a 180-degree jump around resonant frequency. This is

because of the change of the DC characteristic slope. Switching frequency lower

than resonant frequency, with increasing switching frequency, gain will

increase, so the phase delay at DC will be zero. When the switching frequency is

higher than resonant frequency, as switching frequency increases, gain will

decrease, which will give 180 degree at DC.

4. Low frequency pole, which is caused by the output capacitor and load.

With lighter load, this pole will move to lower frequency.

There should have an ESR zero if ESR of the output capacitor is considered.

Here in this simulation, ESR is neglected.

From above simulation results, the small signal characteristic of a series

resonant converter is derived. Beat frequency double pole and beat frequency

dynamic are observed. Compare with results reported in [6], a very good match is

achieved. From this result, we can be more confident with the method. These

291
Bo Yang Appendix C. Small signal characteristic of SRC converter

results also will be used as a reference to compare with LLC resonant converter

since it is very similar to SRC in some operating region.

292
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

Appendix D.

LLC converter model for EDF analysis

In this part, the model file and software package for extended describing

function analysis will be listed. This software is written in MATLAB. This

appendix is divided into two parts. First part is the process for building the model

file for extended describing function analysis. In the second part, the LLC model

file for extended describing function analysis at listed. The software package for

extended describing function could be found in dissertation of Dr. Eric X. Yang.

The version used for the analysis is MATLAB 5.0.

D.1. Process of building LLC circuit model for EDF analysis

To build the model of the converter for describing function analysis, first the

operation of the converter need to be understood clearly. The operating stages in

each switching cycle need to be identified. For each operating stage, the state

space needs to be derived. Base on this information, the model file could be build.

In this part, the operating modes of LLC converter at full load condition will

be analyzed in region 1 and region 2. Region 3 is eliminated because of ZCS

operation. At light load condition, the converter might run into DCM. Since DCM

293
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

operation will introduce many more operating modes, it is not included in this

model. The circuit and notifications are shown in Figure D.1.

Figure D.1 Circuit diagram and notification for extended describing function analysis

In this circuit, there are four passive components: Lr, Cr, Lm and Co. Four

states could be chosen for each components as: ILr, ILm, VCr, and VCo. But look at

the topology; the current through output is the difference of two states, ILr and ILm.

Also, the converter changes stage if ILr-ILm changes sign as will shown later. For

simplification, the states were chosen as: ILr-ILm, ILm, VCr, and VCo. As shown in

the circuit, the input variables are Vin and Io. The output variables are Iin and Vo.

With these variables the state equations in each region could be derived in the

form of:

x& = Ax + Bu
y = Cx + Du

294
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

x = (iLr − iLm vCf )

′
iLm vCr
′
where u = (vin io ) .
′
y = (vo iin )

D.1.1. Model of LLC resonant converter in region 1

The simulation waveforms of LLC resonant converter in region 1 are shown

in Figure D.2. The operation in this region could be divided into 4 different modes

as shown in the diagram. The simplified topology in each mode and the condition

for transferring from one mode to next mode is shown in Figure D.3.

Figure D.2 Simulation waveform of LLC converter in region 1

295
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

Figure D.3 Topology modes and progressing condition for region 1

The state equations for each mode are shown as following.

Mode 1

 Rs + R R Rs 1 k k 
− Lr − Lm −
Lr
−
Lr
+
Lr Lm 
 R k 
 0 0 − 
A= Lm Lm 
 1 1 
0 0
 Cr Cr  R = Ro // Rc
 k k 
 − 0 0 −  R
Cf R ⋅ Cf  k=
 Where R + Rc .

296
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

1 R R 
 Lr +
Lr Lm 
 R 
0 − 
B= Lm 
0 0 
0 k 
 Cf 

− R 0 0 k 
C= 
 1 1 0 0

0 R 
D= 
0 0 

Mode 2

 Rs + R R Rs 1 k k 
− Lr − Lm −
Lr
−
Lr
− −
Lr Lm 
 R k 
 0 0 
A= Lm Lm 
 1 1 
0 0
 Cr Cr 
 k k 
 0 0 − 
 Cf R ⋅ Cf 

1 R R 
 Lr − −
Lr Lm 
 R 
0 
B= Lm 
0 0 
0 k 
 Cf 

R 0 0 k 
C= 
 1 1 0 0

297
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

0 R 
D= 
0 0 

Mode 3

 Rs + R R Rs 1 k k 
− Lr − Lm −
Lr
−
Lr
− −
Lr Lm 
 R k 
 0 0 
A= Lm Lm 
 1 1 
0 0
 Cr Cr 
 k k 
 0 0 − 
 Cf R ⋅ Cf 

 1 R R 
− Lr − −
Lr Lm 
 R 
 0 
B= Lm 
 0 0 
 0 k 
 Cf 

 R 0 0 k
C= 
− 1 − 1 0 0 

0 R 
D= 
0 0 

Mode 4

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Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

 Rs + R R Rs 1 k k 
− Lr − Lm −
Lr
−
Lr
+
Lr Lm 
 R k 
 0 0 − 
A= Lm Lm 
 1 1 
0 0
 Cr Cr 
 k k 
 − 0 0 − 
 Cf R ⋅ Cf 

 1 R R 
− Lr +
Lr Lm 
 R 
 0 − 
B= Lm 
 0 0 
 0 k 
 Cf 

− R 0 0 k 
C= 
 − 1 − 1 0 0

0 R 
D= 
0 0 

D.1.2. Model of LLC resonant converter in region 2

The simulation waveforms of LLC resonant converter in region 2 are shown

in Figure D.4. The operation in this region also could be divided into 4 different

modes as shown in the diagram. The simplified topology in each mode and the

condition for transferring from one mode to next mode is shown in Figure D.5.

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Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

Figure D.4 Simulation waveform of LLC converter in region 2

Figure D.5 Topology modes and progressing condition for region 2

300
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

The state equations for each mode are shown as following.

Mode 1

 Rs + R R Rs 1 k k 
− Lr − Lm −
Lr
−
Lr
− −
Lr Lm 
 R k 
 0 0 
A= Lm Lm 
 1 1 
0 0
 Cr Cr 
 k k 
 0 0 − 
 Cf R ⋅ Cf 

1 R R 
 Lr − −
Lr Lm 
 R 
0 
B= Lm 
0 0 
0 k 
 Cf 

R 0 0 k 
C= 
 1 1 0 0

0 R 
D= 
0 0 

Mode 2

301
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

0 0 0 0 
 Rs 1 
0 − Lm + Lr −
Lm + Lr
0 
 1 
A = 0 0 0 
 Cr 
0 k 
0 0 −
 R ⋅ Cf 

 0 0 
 1 
 0 
B =  Lr +0 Lm 0 
 k 
 0 
 Cf 

0 0 0 k 
C= 
1 1 0 0 

0 R 
D= 
0 0 

Mode 3

 Rs + R R Rs 1 k k 
− Lr − Lm −
Lr
−
Lr
+
Lr Lm 
 R k 
 0 0 − 
A= Lm Lm 
 1 1 
0 0
 Cr Cr 
 k k 
 − 0 0 − 
 Cf R ⋅ Cf 

302
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

 1 R R 
− Lr +
Lr Lm 
 R 
 0 − 
B= Lm 
 0 0 
 0 k 
 Cf 

− R 0 0 k 
C= 
 − 1 − 1 0 0

0 R 
D= 
0 0 

Mode 4

0 0 0 0 
 Rs 1 
0 − Lm + Lr −
Lm + Lr
0 
 1 
A = 0 0 0 
 Cr 
0 k 
0 0 −
 R ⋅ Cf 

 0 0 
 1 
− Lr + Lm 0 
B= 0 0 
 k 
 0 
 Cf 

 0 0 0 k
C= 
− 1 − 1 0 0 

303
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

0 R 
D= 
0 0 

With above information, the model file could be written as shown next.

D.2. LLC resonant converter model

Following is the model file for LLC resonant converter. It covers the

operating region 1 and 2. Region 3 is now covered since it is ZCS and not

preferred for this converter. This model file only deals with the normal operation

mode. During very light load condition, the converter might work into different

discontinuous conduction modes. To cover these operation modes, the model file

needs to be extended. The method of building the model file is demonstrated in

chapter 4.

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Name: topo.m -------- LLC topology for continuous condition mode
% Build by: Bo Yang, Dec. 2001
% Function: define converter circuit, operating condition,
% and switching boundary condition
% Input: CP ------------ Circuit Parameters
% x ------------- current state vector
% u ------------- current input vector
% contl --------- control parameters
% cur_mode ------ current topological mode
% t ------------- current time
%
% Output: num_mode ------ # of modes in one cycle
% Para ---------- Circuit Parameters
% x0 ------------ initial condition
% U0 ------------ given input vector
% CTL ----------- Control Parameters
% harm_tbl ------ harmonic table (see Chap.3)
% switching ----- 1 = not cross switching boundary
% -1 = cross switching boundary
% A, B, C, D ---- state matrices of current mode
% Ab,Bb,Cb,Db---- boundary matrices of current mode
%
% Calling: none
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

function [RT1, RT2, RT3, RT4, RT5, RT6, Bb, Cb, Db, Fo, Zo] ...
= topo(CP, x, u, contl, cur_mode, t)

304
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

%%%%%%%%%%%%%%%%%%% State Equation Description %%%%%%%%%%%%%%%%%%

% Input: U = [Vg, Io];
% Output: Y = [Vo, Ig];
% State: X = [Ilr, Ilm, Vcr, Vcf];
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

% define # of mode and dimension of output

num_mode = 4;

% define harmonic table

% dc 1st 2nd 3rd 4th 5th
harm_tbl = [0 1 0 1 0 1 0 1; % Ilr-Ilm -- 1st state
0 1 0 1 0 1 0 1; % Ilm -- 2nd state
0 1 0 1 0 1 0 1; % Vcr -- 3nd state
1 0 0 0 0 0 0 0]; % vo - 4rd state

% define circuit parameters: [Lr; Cr; Lm; Cf; rs; rc; Qs]
Para = [22.5e-6; 28e-9; 60e-6; 20e-6; 0.01; 0.01; 0.5];

% define initial condition

x0 = [0; -5; -300; 190]; % [Ilr-Ilm; Ilm; Vcr; vcf]

% define Input variables

U0 = [200; 0]; % [Vg, Io]

% define control variables

CTL = [0.99*200e3]; % Fs; Frequency control

if nargin == 0,
RT1 = num_mode;
RT2 = Para;
RT3 = x0;
RT4 = U0;
RT5 = CTL;
RT6 = harm_tbl;
return;

elseif nargin == 6,
Lr = CP(1);
Cr = CP(2);
Lm = CP(3);
Cf = CP(4);
rs = CP(5);
rc = CP(6);
Qs = CP(7); % Qs=Zo/R;

Fs = contl(1);

% Some parameters
Zo = sqrt(Lr/Cr); % Zo
Fo = 1/(2*pi*sqrt(Lr*Cr)); % Fo=200 kHz;
R = Zo / Qs;

% Fsn = Fs / Fo;

k = R / (R+rc);
r = k * rc;
Ts = 1/Fs;

% define switching boundary conditions

if cur_mode == 1,

Si=1; % rectifier polarity

St=1; % active bridge polarity

% set crossing boundary flag

305
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

if x(1) < 0.0 ,

switching = -1;
else
switching = 1;
end

% define piecewise linear state equations

A = [(-rs-r)/Lr, -rs/Lr, -1/Lr, -k/Lr;
r/Lm, 0, 0, k/Lm;
1/Cr, 1/Cr, 0, 0;
k/Cf, 0, 0, -k/R/Cf];
B = [1/Lr, -r/Lr;
0, r/Lm;
0, 0;
0, k/Cf];
C = [r, 0, 0, k;
1, 1, 0, 0];
D = [0, r;
0, 0];

% switching boundary condition:

% Ab * x + Bb * u + Cb * t + Db < 0
Ab = [1, 0, 0, 0];

Bb = [0, 0];
Cb = 0;
Db = 0;

elseif cur_mode == 2,

Si=-1;
St=1;

if t > 0.5 * Ts;

switching = -1;
else
switching = 1;
end

% define piecewise linear state equations

A = [0, 0, 0, 0;
0, -rs/(Lm+Lr) -1/(Lm+Lr), 0;
0, 1/Cr, 0, 0;
0, 0, 0, -k/R/Cf];
B = [0, 0;
1/(Lm+Lr) 0;
0, 0;
0, k/Cf];
C = [0, 0, 0, k;
1, 1, 0, 0];
D = [0, r;
0, 0];

Ab = [0, 0, 0, 0];
Bb = [0, 0];
Cb = 0;
Db = 0;

elseif cur_mode == 3,

Si=-1;
St=-1;

if x(1) > 0,
switching = -1;
else,
switching = 1;

306
Bo Yang Appendix D. LLC resonant converter model for extended describing function analysis

end,

% define piecewise linear state equations

A = [(-rs-r)/Lr, -rs/Lr, -1/Lr, k/Lr;
r/Lm, 0, 0, -k/Lm;
1/Cr, 1/Cr, 0, 0;
-k/Cf, 0, 0, -k/R/Cf];
B = [-1/Lr, r/Lr;
0, -r/Lm;
0, 0;
0, k/Cf];
C = [-r, 0, 0, k;
-1, -1, 0, 0];
D = [0, r;
0, 0];

Ab = [-1, 0, 0, 0];
Bb = [0, 0];
Cb = 0;
Db = 0;

elseif cur_mode == 4,

Si=1;
St=-1;

if t > Ts,
switching = -1;
else
switching = 1;
end

% define piecewise linear state equations

A = [0, 0, 0, 0;
0, -rs/(Lm+Lr) -1/(Lm+Lr), 0;
00, 1/Cr, 0, 0;
0, 0, 0, -k/R/Cf];
B = [0, 0;
-1/(Lm+Lr), 0;
0, 0;
0, k/Cf];
C = [0, 0, 0, k;
-1, -1, 0, 0];
D = [0, r;
0, 0];

Ab = [0, 0, 0, 0];
Bb = [0, 0];
Cb = 0;
Db = 0;

end

RT1 = switching;
RT2 = A;
RT3 = B;
RT4 = C;
RT5 = D;
RT6 = Ab;

return;

else,
error('ERROR USE OF TOPO()!!');
end

307
Bo Yang Reference

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Steps,” Proc. IEEE APEC. 2003. p 1137-1142.

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D. Small Signal Modeling

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Periodic Operating Trajectories,” Proc. VPEC Annual Seminar, 1988, pp.
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Proc. IEEE PESC, 1991, pp. 74–79.

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Modeling of Switching Power Circuit,” Proc. VPEC Annual Seminar,
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E. General Textbooks

[E-1] N. Mohan, T. Undeland and W. Robbins, Power Electronics, 1995.

[E-2] Abraham I. Pressman, Switching Power Supply Design, 1991.

[E-3] Rudolf P. Severns, Modern DC-To-DC Switchmode Power Converter

Circuits, 1985.

[E-4] J.K. Watson, Applications Of Magnetism, 1985

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Bo Yang Vita

Vita
The author, Bo Yang, was born in Linwu, Ningxia, P.R. China in 1972. He

received B.S and M.S degrees in Electrical Engineering from Tsinghua

University, Beijing, China respectively.

In fall 1997, the author joined the Virginia Power Electronics Center (VPEC)

- now the Center for Power Electronics Systems (CPES) - at Virginia Polytechnic

Institute and State University, Blacksburg, Virginia. His research interests include

power converter simulation and modeling, magnetic design and modeling,

DC/DC converters, and voltage regulator modules (VRMs).

The author is a member of the IEEE Power Electronics Society.

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