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ADXL50
ADXL50
Monolithic Accelerometer
With Signal Conditioning
ADXL50*
For convenience, the ADXL50 has an internal buffer amplifier
with a full 0.25 V to 4.75 V output range. This may be used to
set the zero-g level and change the output sensitivity by using
external resistors. External capacitors may be added to the resistor network to provide 1 or 2 poles of filtering. No external
active components are required to interface directly to most
analog-to-digital converters (ADCs) or microcontrollers.
FEATURES
Complete Acceleration Measurement System
on a Single Monolithic IC
Full-Scale Measurement Range: 650 g
Self-Test on Digital Command
+5 V Single Supply Operation
Sensitivity Precalibrated to 19 mV/g
Internal Buffer Amplifier for User Adjustable Sensitivity
and Zero-g Level
Frequency Response: DC to 10 kHz
Post Filtering with External Passive Components
High Shock Survival: >2000 g Unpowered
Other Versions Available: ADXL05 (65 g)
The ADXL50 uses a capacitive measurement method. The analog output voltage is directly proportional to acceleration, and is
fully scaled, referenced and temperature compensated, resulting
in high accuracy and linearity over a wide temperature range.
Internal circuitry implements a forced-balance control loop that
improves accuracy by compensating for any mechanical sensor
variations.
GENERAL DESCRIPTION
ADXL50
+3.4V
6
REFERENCE
VREF
OUTPUT
+1.8V
OSCILLATOR
DECOUPLING
CAPACITOR
4
OSCILLATOR
SENSOR
DEMODULATOR
C2
BUFFER
AMP
PREAMP
SELF TEST 7
(ST)
1
COM
C1
C3
+5V
C1
DEMODULATOR
CAPACITOR
VPR
10
R1
VIN
R3
VOUT
R2
*Patents pending.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
Conditions
Min
50
SENSITIVITY
Initial Sensitivity at VPR
Temperature Drift3
+25C
16.1
1.55/1.60
at VPR
NOISE PERFORMANCE
Voltage Noise Density
Noise in 100 Hz Bandwidth
Noise in 10 Hz Bandwidth
at VPR
BW = 10 Hz to 1 kHz
FREQUENCY RESPONSE
3 dB Bandwidth4
3 dB Bandwidth4
Sensor Resonant Frequency
SELF TEST INPUT
Output Change at VPR5
Logic 1 Voltage
Logic 0 Voltage
Input Resistance
+3.4 V REFERENCE
Output Voltage
Output Temperature Drift3
Power Supply Rejection
Output Current
PREAMPLIFIER OUTPUT
Voltage Swing
Current Output
Capacitive Load Drive
BUFFER AMPLIFIER
Input Offset Voltage6
Input Bias Current
Open-Loop Gain
Unity Gain Bandwidth
Output Voltage Swing
Capacitive Load Drive
Power Supply Rejection
ADXL50J/A
Typ
Max
Units
+50
g
% of FS
Degrees
%
19.0
0.75/1.0
21.9
mV/g
% of Reading
1.80
15/35
10
2.05/2.00
V
mV
mV/V
6.6
66
20
12
0.2
1
2
VS = 4.75 V to 5.25 V
800
1300
10
24
0.85
2.0
1.00
32
Hz
kHz
kHz
1.15
0.8
To Common
50
3.350
500
Source or Sink
0.25
30
DC
0
40
40
V
mV
mV/V
A
VS 1.4
V
A
pF
25
20
10
10
5.25
13
V
mA
+70
+85
+125
C
C
C
VS 0.25
4.75
TEMPERATURE RANGE
Operating Range J
Specified Performance A
Automotive Grade*
10
V
V
V
k
mV
nA
dB
kHz
V
pF
mV/V
0.25
1000
POWER SUPPLY
Operating Voltage Range
Quiescent Supply Current
3.450
80
100
10
5
80
200
IOUT = 100 A
3.400
10
1
mg/Hz
mg rms
mg rms
NOTES
1
Alignment error is specified as the angle between the true and indicated axis of sensitivity, (see Figure 2).
Transverse sensitivity is measured with an applied acceleration that is 90 from the indicated axis of sensitivity. Transverse sensitivity is specified as the percent of
transverse acceleration that appears at the V PR output. This is the algebraic sum of the alignment and the inherent sensor sensitivity errors, (see Figure 2).
3
Specification refers to the maximum change in parameter from its initial at +25C to its worst case value at T MIN to TMAX.
4
Frequency at which response is 3 dB down from dc response assuming an exact C1 value is used. Maximum recommended BW is 10 kHz using a 0.007 F capacitor, refer to
Figure 22.
5
Applying logic high to the self-test input has the effect of applying an acceleration of 52.6 g to the ADXL50.
6
Input offset voltage is defined as the output voltage differential from 1.800 V when the amplifier is connected as a follower (i.e., Pins 9 and 10 tied together). The voltage at
Pin 9 has a temperature drift proportional to that of the 3.4 V reference.
*Contact factory for availability of automotive grade devices.
2
All min and max specifications are guaranteed. Typical specifications are not tested or guaranteed.
Specifications subject to change without notice.
REV. B
ADXL50
ABSOLUTE MAXIMUM RATINGS*
Package Characteristics
Package
uJA
uJC
Device Weight
10-Pin TO-100
130C/W
30C/W
5 Grams
ORDERING GUIDE
*Stresses above those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; the functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Model
Temperature
Range
ADXL50JH
ADXL50AH
0C to +70C
40C to +85C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADXL50 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN DESCRIPTION
C2
C1
TOP VIEW
COM
VREF
ST
7
88
ST
VPR
VPR
C1
+5V
VIN
NOTES:
AXIS OF SENSITIVITY IS ALONG
A LINE BETWEEN PIN 5 AND
THE TAB.
10
VOUT
REV. B
C1
3
44
66
VREF
C2
5
SENSITIVITY
CONNECTION DIAGRAM
10-Header (TO-100)
AXIS OF
+5 V
WARNING!
ADXL50
Polarity of the Acceleration Output
The polarity of the ADXL50 output is shown in the Figure 1.
When oriented to the earths gravity (and held in place), the
ADXL50 will experience an acceleration of +1 g. This corresponds to a change of approximately +19 mV at the VPR output
pin. Note that the polarity will be reversed to a negative going
signal at the buffer amplifier output VOUT, due to its inverting
configuration.
TAB
+1g
PIN 5
Mounting Considerations
Z
TRANSVERSE Z AXIS
SIDE VIEW
PIN 5
TAB
AX = AXY (cosX)
TRANSVERSE Y AXIS
TOP VIEW
PIN 5
TAB
Z Axis
Axyz
xy
Ax
X Axis
x
Axy
Y Axis
% of Signal Appearing
at Output
Output in gs for a 50 g
Applied Acceleration
0
1
2
3
5
10
30
45
60
80
85
87
88
89
90
100%
99 98%
99.94%
99.86%
99.62%
98.48%
86.60%
70.71%
50.00%
17.36%
8.72%
5.25%
3.49%
1.7%
0%
50 (On Axis)
49.99
49.97
49.93
49.81
49.24
43.30
35.36
25.00
8.68
4.36
2.63
1.75
0.85
0.00 (Transverse Axis)
REV. B
ADXL50
Table I shows the percentage signals resulting from various X
angles. Note that small errors in alignment have a negligible
effect on the output signal. A 1 error will only cause a 0.02%
error in the signal. Note, however, that a signal coming 1 off of
the transverse axis (i.e., 89 off the sensitive axis) will still contribute 1.7% of its signal to the output. Thus large transverse
signals could cause output signals as large as the signals of
interest.
Sensitivity: The output voltage change per g unit of acceleration applied, specified at the VPR pin in mV/g.
Sensitive Axis (X): The most sensitive axis of the accelerometer sensor. Defined by a line drawn between the package tab
and Pin 5 in the plane of the pin circle. See Figures 2a and 2b.
Sensor Alignment Error: Misalignment between the
ADXL50s on-chip sensor and the package axis, defined by
Pin 5 and the package tab.
Transverse Y Axis: The axis perpendicular (90) to the package axis of sensitivity in the plane of the package pin circle. See
Figure 2.
Transverse Z Axis: The axis perpendicular (90) to both the
package axis of sensitivity and the plane of the package pin
circle. See Figure 2.
100
GLOSSARY OF TERMS
90
10
0%
1V
0.5ms
REV. B
0.5V
ADXL50Typical Characteristics
7
9
5 g p-p SIGNAL T A = +25C
0
NOISE mV, RMS
NORMALIZED SENSITIVITY dB
C1 = C2 = 0.022F
3
3
6
9
12
3
15
18
2
0.010
21
1
10
100
FREQUENCY Hz
1k
10k
DEMODULATOR CAPACITANCE F
0.25%
100
0.20%
TA = +25C, ACL = 2
80
0.15%
OUTPUT IMPEDANCE
0.1
0.10%
0.05%
0.00%
0.05%
0.10%
60
40
20
0.15%
0.20%
0.25%
20
10
30
40
50
60
10
100
1000
FREQUENCY Hz
g LEVEL APPLIED
10000
1350
30
TA = +25C
25
G = 10
20
1300
15
1250
GAIN dB
3dB BW Hz
C1 = C2 = 0.022F
1200
10
G=2
5
0
5
10
1150
15
1100
60
20
40
20
20
40
60
80
TEMPERATURE C
100
120
10
140
100
1k
10k
FREQUENCY Hz
100k
1M
REV. B
ADXL50
0.5
TA = +25 C
C1 = C2 = 0.022F
CHANGE IN SENSITIVITY %
+0.50
+0.25
0.25
0.0
0.5
1.0
1.5
0.50
4.8
4.9
5.0
5.1
SUPPLY VOLTAGE V
5.2
5.3
60
40
120
140
45
35
60
40
20
10
100
1k
FREQUENCY Hz
10k
100k
10
100
1k
FREQUENCY Hz
10k
100k
3.404
40
VREF
20
10
60
1004
3.400
30
40
20
20
40
60
80
TEMPERATURE C
100
120
SELFTEST
3.392
0.996
3.388
0.992
3.384
60
140
1000
3.396
VPR 0g PSRR dB
100
TA = +25 C
VS = +5V + (0.5Vp-p)
20
40
60
80
TEMPERATURE C
80
TA = +25 C
VS = +5V + (0.5Vp-p)
C1 = C2 = 0.022F
REV. B
55
25
20
0.988
40
20
20
40
60
80
TEMPERATURE C
100
120
140
ADXL50
demodulator will rectify any voltage which is in sync with its
clock signal. If the applied voltage is in sync and in phase with
the clock, a positive output will result. If the applied voltage is in
sync but 180 out of phase with the clock, then the demodulators output will be negative. All other signals will be rejected.
An external capacitor, C1, sets the bandwidth of the demodulator.
THEORY OF OPERATION
TOP VIEW
TOP VIEW
CS1
APPLIED
ACCELERATION
TETHER
CS2
CENTER
PLATE
BEAM
BEAM
CENTER
PLATE
FIXED
OUTER
PLATES
UNIT CELL
CS1 < CS2
CS1
CS2
CS1
CS2
DENOTES ANCHOR
UNIT CELL
CS1 = CS2
DENOTES ANCHOR
Figure 17 shows the sensor responding to an applied acceleration. When this occurs, the common central plate or beam
moves closer to one of the fixed plates while moving further
from the other. The sensors fixed capacitor plates are driven
deferentially by a 1 MHz square wave: the two square wave amplitudes are equal but are 180 out of phase from one another.
When at rest, the values of the two capacitors are the same and
therefore, the voltage output at their electrical center (i.e., at the
center plate) is zero.
An uncommitted buffer amplifier provides the capability to adjust the scale factor and 0 g offset level over a wide range. An internal reference supplies the necessary regulated voltages for
powering the chip and +3.4 volts for external use.
REV. B
ADXL50
+3.4V
DENOTES EXTERNAL
PIN CONNECTION
+3.4V
+5V
33k
75
33k
PREAMP
C2
C1
EXTERNAL
OSCILLATOR
DECOUPLING
CAPACITOR
CS1
180
CS2
1MHz
OSCILLATOR
EXTERNAL
DEMODULATION
CAPACITOR
+1.8V
+1.8V
BEAM
SYNCHRONOUS
DEMODULATOR
INTERNAL
FEEDBACK
LOOP
LOOP GAIN = 10
+5V
+5V
SYNC
3M
+5V
COMMON
RST
VREF
+3.4V
VPR
C1
+0.2V
INTERNAL
REFERENCE
+3.4V
BUFFER
AMPLIFIER
+1.8V
+3.4V
50k
+1.8V +0.2V
VOUT
VIN
COM
SELFTEST
(ST)
the inverting input and the output of this amplifier via pins
VOUT and VIN, while the noninverting input is connected internally to a +1.8 V reference. The +1.8 V is derived from a
resistor divider connected to the 3.4 V reference.
The sensors tight mechanical spacing allows it to be electrostatically deflected to full scale while operating on a 5 volt supply. A self-test is initiated by applying a TTL high level
voltage (>+2.0 V) to the ADXL50s self-test pin which causes
the chip to apply a deflection voltage to the beam which moves
it an amount equal to 50 g (the negative full-scale output of the
device). Note that the 10% tolerance of the self-test circuit is
not proportional to the sensitivity error, see Self-Test section.
The output of the ADXL50s preamplifier is 1.8 V at 0 g acceleration with an output range of 0.95 V for a 50 g input, i.e.,
19 mV/g. An uncommitted buffer amplifier has been included
on-chip to enhance the users ability to offset the 0 g signal level
and to amplify and filter the signal. Access is provided to both
In general, the designer will need to take into account the initial
zero g bias when designing circuits. For the ADXL50J this offset is 1.8 V 250 mV. When microprocessors and software
ADXL50
+3.4V
REFERENCE
OSCILLATOR
SENSOR
DEMODULATOR
C2
0.022F
BUFFER
AMP
PREAMP
5
COM
2
C1
C3
+5V
8
C1
0.022F
DEMODULATOR
CAPACITOR
10
VPR
9
VIN
R3
105k
VOUT
R1
49.9k
R2
274k
REV. B
VREF
OUTPUT
+1.8V
OSCILLATOR
DECOUPLING
CAPACITOR
SELF TEST
(ST)
ADXL50
calibration are used and there is a desire to eliminate trim potentiometers, the design should leave room at either supply rail
to account for signal swing and or variations in initial zero g bias.
For example, in the circuit in Figure 19, the initial zero g bias of
250 mV will be reflected to the output by the gain of the R3/R1
network, resulting in an output offset of 526 mV worst case.
The offset, combined with a full-scale signal of 50 g, (+2.0 V)
will cause the output buffer amplifier to saturate at the supply
rail.
C1
ADXL50
0.022F
+5V
0.1F
PRE-AMP
1.8V
BUFFER
AMP
0.022F
3
5
Buffer
Gain
SF in
mV/g
R1
R3
R2
50.0
40.0
30.8
26.7
20.0
10.0
2.11
2.63
3.42
3.95
5.26
10.53
40
50
65
75
100
200
49.9 k
39.2 k
40.2 k
28.7 k
26.1 k
23.7 k
105 k
103 k
137 k
113 k
137 k
249 k
100 k
100 k
100 k
100 k
100 k
100 k
6
VREF
+3.4V
0g
LEVEL 50k
TRIM
10
VIN
VPR
R1
+1.8V
R3
R2
VX
VOUT
COM
FS (g)
C1
10
REV. B
ADXL50
As an example, if the desired span is 2.0 V for a = 50 g input,
then R3/R1 should be chosen such that
R3/R1 = VOUT Span/VPR Span = 2.00/0.95 = 2.105
(1)
where VPR span is the output from the preamplifier and VOUT
span is the buffer amplifiers output, giving
R3 = 2.105 R1
(2)
In noncritical applications, a resistor, R2, may simply be connected between VIN and common to provide an approximate
0 g offset level (see Figure 19). In this simplified configuration
R2 is found using:
SELF-TEST FUNCTION
V OUT =
(1.8 V VPR ) +
(1.8 V VX ) + 1.8 V
R1
R2
Operating the ADXL50s buffer amplifier at Gains > 2, to provide full-scale outputs of less than 50 g, may cause the self-test
output to overdrive the buffer into saturation. The self-test may
still be used in the case, but the change in the output must then
be monitored at the VPR pin instead of the buffer output.
Note that the value of the self-test delta is not an exact indication of the sensitivity (mV/g) of the ADXL50 and, therefore,
may not be used to calibrate the device for sensitivity error.
The VPR and the buffer amplifier outputs are both capable of
driving a load to voltage levels approaching that of the supply
rail. However, both outputs are limited in how much current
they can supply, affecting component selection.
VPR Output
The VPR pin has the ability to source current up to 500 A but
only has a sinking capability of 30 A which limits its ability to
drive loads. It is recommended that the buffer amplifier be used
in most applications, to avoid loading down VPR. In standard
50 g applications, the resistor R1 from VPR to VIN is recommended to have a value greater than 50 k to reduce loading
effects.
Capacitive loading of the VPR pin should be minimized. A load
capacitance between the VPR pin and common will introduce an
offset of approximately 1 mV for every 10 pF of load. The VPR
pin may be used to directly drive an A/D input or other source
as long as these sensitivities are taken into account. It is always
preferable to drive A/D converters or other sources using the
buffer amplifier (or an external op amp) instead of the VPR pin.
The buffer output can drive a load to within 0.25 V of either
power supply rail and is capable of driving 1000 pF capacitive
REV. B
loads. Note that a capacitance connected across the buffer feedback resistor for low-pass filtering does not appear as a capacitive load to the buffer. The buffer amplifier is limited to
sourcing or sinking a maximum of 100 A. Component values
for the resistor network should be selected to ensure that the
buffer amplifier can drive the filter under worst case transient
conditions.
11
ADXL50
DEMODULATOR CAPACITOR, C1
+5V
POWER
SUPPLY
(V)
0V
f3 dB = (28.60/C1 in F) 40%
VFINAL
A nominal value of 0.022 F is recommended for C1. In general, the design bandwidth should be set 40% higher than the
minimum desired system bandwidth due to the 40% tolerance.
A minimum value of 0.015 F is required, (over temperature
and system life), to prevent device instability or oscillation. The
demodulation capacitor should be a low leakage, low drift ceramic type with an NPO (best) or X7R (good) dielectric.
VOUT
(V)
0.4
0.6
TIME ms
0.8
1.0
AMPLITUDE
19
0.022F
1.9
0.015F
0.010F
0.005F
0.19
0.2
90
PHASE
180
100
1k
FREQUENCY Hz
T0
SENSITIVITY mV/g
10k
12
REV. B
ADXL50
C2
4
RECOMMENDED COMPONENT VALUES FOR VARIOUS
FULL SCALE RANGES AND A 300Hz BANDWIDTH
ADXL50
0.022F
C1
FULL
SCALE
mV
per g
3dB
BW (Hz)
R1a
k
R1b
k
R3
k
R2
k
C4
F
10 g
200
300
21.5
249
100
0.0022
20 g
100
300
23.7
137
100
0.0039
40 g
50
300
10
34
105
100
0.0056
50 g
40
300
10
45.3
105
100
0.0056
0.1F
BUFFER
AMP
PRE-AMP
+5V
1.8V
0.022F
9
VOUT
3
C1
5
COM
6
1
3dB BW =
2 R3 C4
10
VPR
+3.4V
REF
VIN
C4
R1a R1b
OPTIONAL SCALE
FACTOR TRIM*
0g
LEVEL
TRIM
R3
50k
R2
Figure 23. Using the Buffer Amplifier to Provide One Pole Post Filtering Plus Scale Factor and 0 g Level Trimming
Figure 24 shows a circuit which uses the ADXL50s buffer amplifier to provide two pole post filtering. An AD820 external op
amp allows noninteractive adjustment of 0 g offset and scale
factor. Component values for the two pole filter were selected to
operate the buffer at unity gain with a Q of one.
0.022F
ADXL50
4
C2
C1
0.022F
2 POLE FILTER
COMPONENT VALUES
3dB
BW(Hz) C3F
0.1F
BUFFER
AMP
PRE-AMP
+5V
1.8V
OPTIONAL CAPACITOR
FOR 3 POLE FILTERING
9
VOUT
R5
C1
C4F
5
COM
+5V
8
10
300
0.027
0.0033
100
0.082
0.01
30
0.27
0.033
R1
10
0.82
0.1
82.5k
VREF
C4
VIN
VPR
42.2k
R5
C3
0.01F
R4a
R3
82.5k
SCALE
FACTOR
TRIM
2 POLE FILTER
+3.4V
mV
per g
GAIN
R4a
k
R4b
k
R5
k
40.2k
10 g
200
10.53
21.5
249
20k
20 g
100
5.26
23.7
137
40 g
50
2.63
10
34
105
50 g
40
2.11
10
45.3
105
71.5k
R4b
3 AD820
4
OFFSET AND
SCALING
AMPLIFIER
R6
R7
0g
LEVEL
TRIM
Figure 24. Circuit Providing Two Pole Post Filtering and 0 g Offset and Scale Factor Trimming
REV. B
13
OUTPUT
ADXL50
Capacitors C3 and C4 are chosen to provide the desired 3 dB
bandwidth. Component values are specified for bandwidths of
10 Hz, 30 Hz, 100 Hz, and 300 Hz. For other 3 dB bandwidths
simply scale the capacitor values; i.e., for a 3 dB bandwidth of
20 Hz, divide the 10 Hz bandwidth numbers by 2.0. The nominal buffer amplifier output will be +1.8 V 19 mV/g. Note that
the ADXL50s self-test will be fully functional since the buffer
amplifier is operated at unity gain and resistor R1 is large. The
external op amp offsets and scales the output to provide a +2.5 V
2 V output over a wide range of full-scale g levels. The external op amp may be omitted in high g, low gain applications.
NOISE CONSIDERATIONS
The output noise of the ADXL50 scales with the square root of
its bandwidth. The noise floor may be reduced by lowering the
bandwidth of the ADXL50 either by increasing the value of the
demodulator capacitor or by adding an external filter.
Table III.
2.0 rms
3.0 rms
4.0 rms
5.0 rms
6.0 rms
6.6 rms
7.0 rms
8.0 rms
32%
13%
4.6%
1.2%
0.27%
0.1%
0.046%
0.006%
If a dc response is not required, as in applications such as motion detection or vibration measurement, then ac coupling
should be considered. In low g applications, the output voltage
change due to acceleration is small compared to the 0 g offset
voltage drift. Because ac coupling removes the dc component of
the output, the preamp output signal may be amplified considerably without increasing the 0 g level drift. The most effective
way to ac couple the ADXL50 is between the preamp output at
VPR and the buffer input, VIN, as shown in Figure 26.
ADXL50
1.8V
PRE-AMP
BUFFER
AMP
VPR
0.26
1.4
0.21
1.0
0.16
0.73
0.11
0.33
8
VPR
VOUT
1.7
100
3dB BANDWIDTH Hz
R3
0
10
VIN
R1
R2
0.05
10
C4
1k
Because the ADXL50s noise is for all practical purposes Gaussian in amplitude distribution, the highest noise amplitudes have
the smallest (yet nonzero) probability. Peak-to-peak noise is,
therefore, difficult to measure and can only be estimated due to
its statistical nature. Table III is useful for estimating the probabilities of exceeding various peak values, given the rms value.
14
REV. B
ADXL50
and package orientation affect the ADXL50s output (TO-100
package shown). Note that the output polarity is that which appears at VPR; the output at VOUT will have the opposite sign.
With its axis of sensitivity in the vertical plane, the ADXL50
should register a 1 g acceleration, either positive or negative, depending on orientation. With the axis of sensitivity in the horizontal plane, no acceleration (0 g) should be indicated.
+20
+10
LOW FREQUENCY ROLL-OFF
(F L ) DUE TO AC COUPLING
0
10
HIGH FREQUENCY ROLL-OFF (FH )
DUE TO DEMODULATOR BANDWIDTH
20
0g
(a)
0g
(b)
1g
(c)
+1g
(d)
30
1
10
100
FREQUENCY Hz
1k
10k
The architecture of the ADXL50 and its use of synchronous demodulation make the device immune to most electromagnetic
(EMI) and radio frequency (RFI) interference. The use of synchronous demodulation allows the circuit to reject all signals except those at the frequency of the oscillator driving the sensor
element. However, the ADXL50 does have a sensitivity to RFI
that is within 5 kHz of the internal oscillators nominal frequency of 1 MHz. The internal oscillator frequency will exhibit
part to part variation in the range of 0.6 MHz to 1.4 MHz.
In general the effect is difficult to notice as the interference
must match the internal oscillator within 5 kHz and must be
large in amplitude. For example: a 1 MHz interference signal of
20 mV p-p applied to the +5 V power supply pin will produce a
200 mV p-p signal at the VPR pin if the internal oscillator and
interference signals are matched exactly. If the same 20 mV interference is applied but 5 kHz above or below the internal
oscillators frequency, the signal level at VPR will only be 20 mV
p-p in amplitude.
Power supply decoupling, short component leads (especially for
capacitors C1 and C2), physically small (surface mount, etc.)
components and attention to good grounding practices all help
to prevent RFI and EMI problems. Please consult the factory
for applications assistance in instances where this may be of
concern.
SELF-CALIBRATING THE ADXL50
REV. B
15
ADXL50
Compensating for the 0 g Drift of the ADXL50 Accelerometer
+15
The circuit of Figure 29 provides a linear temperature compensation for the ADXL50. Figure 30 shows the 0 g drift over temperature for a typical ADXL50 with and without this circuit. As
shown by Figure 30, the linear portion of the drift curve has
been subtracted out. In effect, the curve has been rotated counterclockwise until it is horizontal, leaving just the bow of the
curve: that portion which is not linear. As shown by Figure 30,
over a +25C to +70C range, a 10 reduction in drift is achieved.
+10
LOW TEMP TRIM
0
5
10
COMPENSATED XL50
15
20
25
UNCOMPENSATED XL50
30
35
40
45
55
35
+85
+105
0.185 (4.70)
0.165 (4.19)
VOUT
0.750 (19.05)
0.500 (12.70)
0.160 (4.06)
0.110 (2.79)
10
8
VPR
49.9k
VIN
499k
R1
R3
+5V
TEMPERATURE
COMPENSATED
ACCELERATION
OUTPUT
1A/K
3101k
R5
TC
COMP
SET
10k
RB
TEST
0.01F POINT
"A"
7
2 AD820
4
BRIDGE
BALANCE
RA
30k
R6
30k
R8
0.370 (9.40)
0.335 (8.51)
20k
0.045 (1.14)
0.027 (0.69)
9
3
0.230 (5.84)
BSC
10
1
0.034 (0.86)
0.027 (0.69)
SEATING PLANE
0g OUTPUT
LEVEL
R9
6
TEMPCO
AMPLIFIER
8
0.115
(2.92)
BSC
49.9k
R2
310k
R7
+5V
5
0.335 (8.51)
0.305 (7.75)
R10
RC
20k
25k
PRINTED IN U.S.A.
6
+3.4V
REF
1k
+65
PRE-AMP
C1
R4
+45
0.1F
C3
BUFFER
AMP
0.022F
500
+25
Figure 30. ADXL50 0 g Drift With and Without the Compensation Circuit of Figure 29
+5V
1.8V
C2
AD590
+5
OUTLINE DIMENSIONS
ADXL50
COM
15
TEMPERATURE C
0.022F
C1
C1808b53/96
MEASURED 0g DRIFT mV
+5
CALIBRATION PROCEEDURE:
AT T MIN OR LOWER TEMP CAL POINT...
1.
2.
3.
4.
5.
6.
7.
8.
9.
16
REV. B