Power Electronic Transformer
Power Electronic Transformer
Power Electronic Transformer
INTRODUCTION
1.1 Introduction
Power electronic transformers (PETs) are proposed to replace conventional
transformers and perform voltage regulation and power exchange between generation and
consumption by electrical conversion. In recent years, significant advances in power
semiconductor device technology, low-cost, high-speed control processors, and matured
PWM algorithms have led to a number of modern power converter topologies. A new
type of transformers based on Power Electronics (PE) has been introduced, which realizes
voltage transformation, galvanic isolation, and power quality enhancements in a single
device. The PE based transformer provides a fundamentally different and more complete
approach in transformer design by using power electronics on the primary and secondary
sides of the transformer. Several integrated PQ features such as instantaneous voltage
regulation under load dynamics and transients, voltage sag compensation, power factor
correction, and harmonic suppression can be incorporated into PET, thanks to the
application of power electronics technology.
For realizing the PET, different topologies in literature have been presented. In,
the AC/AC buck converter has been proposed to transform the voltage level directly and
without any isolation transformer. This method is perhaps the most direct approach to
single phase AC power conversion, but, it would cause the semiconductor devices to bear
very high stress.
In, the concept of a high-frequency AC/AC link, termed as electronic transformer,
has been proposed. In this approach, the line side AC waveform is modulated into a High
Frequency (HF) square wave, coupled to the secondary of HF transformer, and again is
demodulated to AC form by a synchronous converter. This method however does not
provide any benefits in terms of control or power-factor improvement, and may not
protect the critical loads from the momentary power interruptions due to lack of energy
storage system.
Another approach is a three-part design that utilizes an input stage, an isolation
stage, and an output stage, addressed in. These approaches enhance the flexibility and
functionality of the electronic transformers owing to the available DC links. In, for
operating properly in medium voltage levels, the series to parallel connection of
converters has been used. The number of series converters depends on voltage levels and
1
the type of semiconductors. In, a topology based on back-to back diode-clamp multilevel
converter has been introduced. This approach can perform different power quality
functions and provide galvanic isolation. However, the modularity and scaling to different
voltage and power levels is not straightforward.
Distribution transformers are fundamental components in power distribution
systems. They are relatively inexpensive, highly reliable, and fairly efficient. However,
they have some disadvantages such as heavy weight, large size, sensitivity to harmonics,
voltage drop under load, (required) protection from system disruptions and overload,
protection of the system from problems arising at or beyond the transformer and
environmental concerns regarding mineral oil. These disadvantages are becoming
increasingly important as power quality becomes more of a concern. In this case, power
electronic based transformer is a good option for solving above problems.
The previous researches show that PETs have a great capacity to receive much
more attention due to their merits such as high frequency link transformation and flexible
regulation of the voltage and power. Although many studies have been conducted on
application and control of PET in power systems, less attention is paid to the areas of the
circuit topologies. The topology of PET can be developed in such a way to achieve
multiport electrical system that converts variable input waveform to the desired output
waveform. In addition, for higher voltage applications or three phase systems, the
topology is expandable as it is modular.
1.3 Methodology
In this project a new PET topology named flexible multi port power electronic
transformer is proposed.
It is constructed based on modules and a common dc link as shown in fig 1.1,
which is used to transfer energy between ports and isolate all ports from each
other.
A novel voltage source full bridge dc-ac converter with phase shift modulation
using high frequency cycloconverter is proposed.
Both zero voltage and zero current switching (zvzcs) commutation for full
bridge active power switches and zero voltage switching for cycloconverter bidirectional switches are obtained.
CHAPTER 2
POWER ELECTRONIC DEVICES AND CONVERTERS
2.1 INTRODUCTION TO POWER ELECTRONICS
Power electronics is an enabling technology, providing the needed between the
electrical source and the electrical load, as depicted in fig 2.1. The electrical source and
the electrical load, and often do, differ in frequency, voltage amplitudes and the number
of phases. The power electronics interface facilitates the transfer of power from the
source to the load by converting voltages and currents from one form to another, in which
it is possible for the source and load to reverse roles. The controller shown on the fig 2.1
allows management of the power transfer process in which the conversion of voltages and
currents should be achieved with as high energy-efficiency and high power density as
possible.
CONVERTER
SOURCE
LOAD
CONTROLLER
Uninterruptable power supplies (UPS) for critical loads such as computers and space
applications.
High voltage direct current (HVDC) system.
Battery charging.
Electric traction.
Solid state controllers for home appliances.
Illumination control for lighting in trains, homes and theaters.
Static power compensators, transformer tap changers and static contactors for
industrial power systems.
Power control in metallurgical and chemical processes using arc melting induction
heating and melting, resistance heating, arc welding, etc.
Excitation systems for alternator and synchronous condenser.
Disadvantages
Power semiconductor converters have tendency to introduce voltage and current
harmonics into supply and control systems.
Thyristor controllers have low over load capacity.
Harmonics in the supply systems causes interference with communication systems
and distortion of the supply system.
6
Parameter
Operating
frequency
Trigger
circuit
On state
voltage drop
Thyristor
Power BJT
400 to 500 Hz
10 kHz
Power
IGBT
MOSFET
100kHz
10kHz
Current
Current
Voltage
Voltage
controlled
controlled
controlled
controlled
needs single
needs
needs
needs
pulse to turn
continuous
continuous
continuous gate
on
base drive
gate drive
drive
<2 volts
<2 volts
4-5 volts
3 volts
Snubber
Necessary
Necessary
(unpolarized)
(polarized)
eliminated if
eliminated if
used a
used a
polarized
polarized
Maximum VI
ratings
10Kv/5000 A
2Kv/1000A
600 V/200 A
1500 V/400 A
UPS, SMPS,
Applications
DC motor
Static VAR
SMPS, BLDC
drives,
systems, AC
AC motor
inverters,
motor
rectifiers
control,
drives, AC
UPS.
SMPS.
Table 2.1 Comparison of power devices
families of power electronic converters have evolved, often linked by power level,
switching devices, and topological origins.
The process of switching the electronic devices in a power electronic converter
from one state to another is called modulation, and the development of optimum
strategies to implement this process has been the subject of intensive international
research efforts for at least 30 years. Each family of power converters has preferred
modulation strategies associated with it that aim to optimize the circuit operation for the
target criteria most appropriate for that family. Parameters such as switching frequency,
distortion, losses, harmonic generation, and speed of response are typical of the issues
which must be considered when developing modulation strategies for a particular family
of converters.
"Electronic power converter" is the term that is used to refer to a power electronic
circuit that converts voltage and current from one form to another.
These converters can be classified as:
Diode rectifiers.
AC-DC converters(controlled rectifiers)
AC-AC converters.
1) AC voltage regulators
2) Cyclo converters
DC-DC converters (DC choppers)
DC-AC converters (Inverters)
Static switches
2.3.3 AC to AC converters
These convert fixed ac input voltage to variable ac output voltage. There are two
types:
2) Cycloconverter
Cyclo converters convert input power at one frequency to output power at a
different frequency. The cycloconverter is widely used in the following applications,
a) Speed control of large AC drives like rotary kilns, etc.
b) Static variable speed constant frequency generators for aircraft
2.3.4 DC to DC converters
A DC chopper converts fixed DC input voltage to Variable DC output voltage.
The output voltage can be controlled by on and off time of the thyristors. These are used
in
a) DC drives
b) Subway cars
c) Battery operated vehicles
d) Trolley trucks
10
2.3.5 DC to AC converter
An inverter converts a fixed DC input voltage to fixed AC output voltage with
variable frequency. The output voltage can be controlled by varying the on time of the
thyristors. These are used in
a) Uninterruptable power supply
b) Induction motor and synchronous motor drives.
c) High voltage dc transmission.
d) Induction heating
11
The full bridge circuit will have two pole-voltages (V AO and VBO), which are
similar to the pole voltage VAO of the half bridge circuit. Both VAO and VBO of the full
bridge circuit are square waves but they will, in general, have some phase difference.
Figure above shows these pole voltages staggered in time by" t" seconds. It may be more
convenient to talk in terms of the phase displacement angle defined as below:
=( 2 )
t
radians
T
2.5 Cyclo-Converter
The basic principle of operation of a Cyclo-converter is explained with reference
to an equivalent circuit shown in Fig. 2.4. Each two-quadrant converter (phase-controlled)
is represented as an alternating voltage source, which corresponds to the fundamental
voltage component obtained at its output terminals. The diodes connected in series with
each voltage source, show the unidirectional conduction of each converter, whose output
voltage can be either positive or negative, being a two-quadrant one, but the direction of
current is in the direction as shown in the circuit, as only Thyristors unidirectional
switching devices, are used in the two converters. Normally, the ripple content in the
output voltage is neglected.
The control principle used in an ideal Cyclo-converter is to continuously modulate
the firing angles of the individual converters, so that each produces the same sinusoidal
(ac) voltage at its output terminals. Thus, the voltages of the two generators (Fig. 2.4)
have the same amplitude, frequency and phase, and the voltage of the Cyclo-converter is
equal to the voltage of either of these generators.
It is possible for the mean power to flow either to or from the output terminals,
and the Cyclo-converter is inherently capable of operation with loads of any phase angle
inductive or capacitive. Because of the uni-directional current carrying property of the
individual converters, it is inherent that the positive half-cycle of load current must
always be carried by the positive converter and the negative half-cycle by the negative
converter, regardless of the phase of the current with respect to the voltage. This means
that each two-quadrant converter operates both in its rectifying (converting) and in its
inverting region during the period of its associated half-cycle of current.
13
14
15
This is the circulating-current free mode of operation. Thus, the firing angle
control scheme must be such that only one converter conduct at a time, and the
changeover of firing pulses from one converter to the other, should be periodic according
to the output frequency. However, the firing angles the Thyristors in both converters
should be the same to produce a symmetrical output.
17
CHAPTER 3
HIGH FREQUENCY TRANSFORMER AND LOGIC GATES
3.1 Introduction to Transformer
A transformer is a static device that transfers electrical energy from one circuit to
another by electromagnetic induction without the change in frequency. The transformer,
which can link circuits with different voltages, has been instrumental in enabling
universal use of the alternating current system for transmission and distribution of
electrical energy.
or
high-tension/low-tension
primary/secondary windings.
18
windings
in
place
of
Heavy weight,
Large size,
Sensitivity to harmonics,
Voltage drop under load,
(Required) protection from system disruptions and overload,
Protection of the system from problems arising at or beyond the transformer
Environmental concerns regarding mineral oil.
These disadvantages are becoming increasingly important as power quality
becomes more of a concern. In this case, power electronic based transformer is a good
option for solving above problems.
Volts
Where
f = rated frequency
Bm= maximum flux density
N= number of turns
Ag = gross core area
19
(3.1)
1
f Bm
(3.2)
By equation (3.2) the area of core is inversely proportional to the frequency and
maximum flux density. We observe as the frequency increases the size of the core
decreases proportionally. Recent trends in power electronics develops to generate high
frequencies from 1KHZ to 100KHZ.
Ferrite cores make the designer to go for higher flux densities to reduce the size of
the transformer their by reducing the total losses and increasing the efficiency of
transformer.
21
23
Boolean Algebra
Voltage State
Voltage State
(Positive true)
(Negative true)
True (T)
High (H)
Low (L)
False (F)
24
The labeled voltage is Low (High) when the label's stated function is true (False)
so in the figure, the stated function (switch closed) is true when the voltage is low. The
bar is meant to evoke the Boolean inversion operation: T = F, F = T, T = T, and so forth.
Output
25
EX-OR gate
The symbolic representation of EX-OR gate is as shown in fig 3.5 and its logic
function is given by
Z = A B+ A B
Output
D-Latch
Two simple modifications of the SR latch make it somewhat more useful, shown
in Figure 3.6. Here a single input D is used in place of the set signal, and an inverter
is used to generate the complementary reset input. These two input signals are gated by
a separate clock signal C, such that the outputs and Q and
26
when C is high. This D-latch thus avoids the ambiguity inherent in the SR latch when
both inputs are high, since that state is no longer possible.
27
CHAPTER 4
PHASE SHIFT MODULATION AND ZVZCS OPERATION OF
PROPOSED TOPOLOGY
4.1 Phase Shift Modulation for Single-Phase Inverter
The method by which voltage adjustment is accomplished in a solid state power
converter is the heart of the issue of modulation. a very simple introductory example of
modulation can be obtained by taking a single-phase inverter as shown in Figure 4.1 and
operating each phase leg with a 50% duty cycle but with a phase delay of( -) between
the two phase legs. Typical waveforms for this inverting operation (DC-to-AC power
conversion) in what can be termed phase shift voltage control or phase shift modulation
are shown in Figure 4.2. Clearly, as the phase delay angle changes, the RMS magnitude
of the line-to-line output voltage changes.
V ab(n) =
2 V dc cos ( n ) d
4
V dc cos ( n ) d
V dc
8
sin ( n )
n
29
V dc
8
n
cos
n
2
Where n is odd
Fig 4.3 First five odd (nonzero) harmonic components of single phase inverter with phase
shift control as a function of phase shift angle normalized with respect to 2Vdc.
Figure 4.3 shows the variation of the fundamental frequency and harmonic
components as a function of the overlap angle . The components are normalized with
respect to 2 Vdc.
a) Switching Loss
30
The overlapping of voltage and current waves during each turn-on and turn-off
switching cause a large pulse of energy loss. With an RC snubber, the Turn-off loss can be
decreased, but the stored energy in the capacitor is lost at turn-on switching. Therefore,
with a snubber the total switching loss may increase. With higher switching frequency,
inverter losses increases, that is efficiency decreases. In fact, the PWM switching
frequency of an inverter is limited because of switching loss.
b) Device Stress
In hard switching, the switching locus moves through the active region of the voltampere area, which stresses the device. The reliability of the device may be impaired due
to prolonged hard switching operation.
c) EMI Problems
High dv/dt, di/dt, and parasitic ringing effect at the switching of a fast device can
create severe EMI problems, which may affect the control circuit and nearby apparatus.
Parasitic leakage or coupling inductance, although quite small, can be a source of EMI
due to large induced (L di/dt) voltage. Similarly, large dv/dt can induce common mode
coupling current (C dv/dt) in the control circuit through a parasitic capacitance. EMI
problems will be severe in snubber less inverter
31
Zero voltage may occur when the bypass diode is conducting. Zero-voltage turn-off
occurs with a capacitive snubber which slows down the device voltage build-up.
33
of the Cyclo-converter switches. Presuming Cf to be large, the filter capacitor and the load
can be supplanted by a DC voltage Vo during each cycle of operation.
The filter inductor Lf, used to convert energy, is required to obtain ZVZCS
operation of the primary side switches. The inductor current If is not constant during a
switching period. Resonance frequency of C f and Lf is selected far lower than the
switching frequency of the converter, and so their effects on the output voltage are
negligible.
34
Fig 4.5 Steady-state waveforms of the proposed converter during each time period
35
Figure 4.6 Proposed flow chart to produce the gate signals of the bi-directional switches
As can be seen from the flowchart, if the reference signal sign is being positive,
the gate signal of S3 will be led to Sb; otherwise, the gate signal of S 4 will be conducted to
Sb. The same explanation could be carried out for S a. It should be mentioned that, the gate
signals of Sa and Sb are expanded a little to achieve ZVS transition for both turn-on and
turn-off operations of them. Practically, because of inevitable delay of gate driver circuits,
this overlapped switching in the Cyclo-converter happens naturally. Nevertheless, by
imposing a suitable delay in control signals of S 1 to S4, overlapping is avoided at the full
bridge converter.
This control strategy, explained previously, provides specific attribution of the
proposed topology to obtain the desired output waveforms by tracing different reference
signals. Therefore the average voltage of Vo (output voltage) in one switching period is
accordingly changed by variations of the reference signal. Consequently, desired output
waveforms will be obtained if the reference signals of the controller are changed suitably.
It is clear that, the output waveform frequency should be far lower than the switching
frequency in order to maintain the constant average voltage of Vo across the capacitor C f,
during each switching period.
36
(4.1)
d If
+V o
dt
(4.2)
Solving the equation with assumed initial conditions If, to=0 results in
If=
( 1D ) N V
t
Lf
(4.3)
Where N is the transformer ratio obtained from N = N s/Np and D is the duty cycle of the
converter calculated from D =2Ton/Ts (Fig. 4.5). Equation (4.4) shows the duration of this
interval
T 01=T 1T 0=T on=
DT s
2
(4.4)
C p =N C p
(4.5)
Where Cp = C3 +C4
Interval 1
Interval 2
Interval 3
Interval 4
e.
f.
g.
h.
38
Interval 5
Interval 6
Interval 7
Interval 8
i. Interval 9
j. Interval 10
k. Interval 11
l. Interval 12
39
m.
small (i.e. the resonance frequency (fo =1/(2(CsLf ))) is much higher than the switching
frequency). The sum of the capacitors voltages is equal to V in. However, the voltage
across S4, V4, rises to Vin whereas the voltage across S3, V3, falls to zero. As a result, the
primary voltage Vp reaches zero at the end of this interval. The equations are obtained
from the equivalent circuit shown in Fig. 3.7c, while the transformer is supposed to be
ideal.
N V +
p.
dI
1
I f dt=L f f +Vo
Cs
dt
(4.6)
V cs ( t )=V Lf ( t ) +V o N V
q.
(4.7)
s.
t.
V Lf ,T
sin ( o t)
L f o
1
40
(4.8)
u.
(4.
9)
v. The time T12, taken by the resonant capacitor voltage to reach NV in, is given by
(4.10)
T 12=T 2T 1=
w.
1
sin1
o
V Lf ,T
N (2 D) V
1
1
tan
2
( Lf o ) I f , T
V Lf ,T +( ( Lf o ) I f ,T ) o
2
1
x.
(4.10)
y.
z.
ILf,Ti= (N Vin Ts/2Lf )D(1 - D), VCs,T1 = 0 and VLf ,T1 =VCs,T1 +N Vin(1 -D).
aa.
ab.
ac. Interval 3 (T2T3) [Fig. 4.7c]
ad.
As the voltage across switch S3 reaches zero at T2, the current Ip starts
flowing through body diode D3. To achieve ZVZC turn-on switching operation of S 3, it is
necessary to apply the gate pulse voltage into the Q 3 in this interval. As the body diode
D3 current reaches zero, Q3 can conduct. During this time interval, voltage across the
primary side of the IT, Vp is equal to zero, so Ip begins to decrease and reaches zero. Also
If decreases, as Vo is larger than Vs. While If is positive, the stored energy in L f feeds the
output. When the direction of If changes, the output capacitor starts to discharge and
results in some output voltage ripples. From the equivalent circuit we have
ae.
If=
DN V
t+ I f ,T
Lf
(4.11)
af. The time taken by the inductor current to reach zero is given by (12)
ag.
T 23=T 3T 2=I f ,T
Lf
DN V
(4.12)
ah. The initial inductor current If ,T2 can obtain from previous interval.
fast compared with the switching time of the converter as shown in Fig. 4.4. The inductor
current can achieve as follows
If=
ak.
ND V
t+ I f , T
Lf
(4.13)
al. Where initial inductor current If, T3 can obtain from previous interval. The
duration of this interval is the overlapping time taken by the switches Sa and Sb.
am.
an.
conduct, the inductor current If, forces the primary current to flow through switch
capacitors. The switch capacitors C2 and C1 are discharged and charged, respectively,
because of resonance between Lf and Cp. Since C3 = C4 = C1 = C2, this interval can be
illustrated by using the same principle on the second interval (interval 2), which is
discussed previously. So the duration of this time interval can be obtained from (4.14)
ao.
ap.
T 45=T 5 T 4=
ND V
2
( o Lf I f , T ) +(ND V )
4
1
ND V
1
tan
o
o Lf I f , T
(4.14)
aq.
Where If,T4 is the initial inductor current which is obtained from the
previous interval, as the voltage across C2 reaches zero, Ip begins to flow through body
diode D2. As D2 starts to conduct the next interval ensues.
During this stage the primary voltage remains constant and the stored
energy recovers to source. Thus, the primary current gradually decreases to zero at T 6
and the currents of diodes, D2 and D3 fall to zero. By changing the direction of currents
in both switches S2 and S3, this interval converted to the next one and the switches turn
on at the ZVZC switching condition. The inductor current is depicted by (4.15)
at.
If=
N V
( 1D ) t + I f , T
Lf
(4.15)
au. The time taken by the inductor current to reach zero is given by
42
av.
T 56 =T 6 T 5=
Lf I f , T
N V (1D)
5
(4.16)
aw.
The initial current If,T5 can obtain easily from the previous interval. As can
be observed from Fig. 4.5 the operation principles of the next intervals (from interval 7
to interval 12) are similar to those which are described.
ax.
ay.
az.
ba.
bb.
bc.
bd.
be.
bf. CHAPTER 5
bg.
bh.
bi.
inverter (FBDCI), HFIT, and a Cyclo converter. This topology consists of independent
and similar modules and each port can work independently. Thus, the analysis of one
port is sufficient to introduce whole topology. The FBDCI (modulator) can operate as an
inverter when it converts the dc-link voltage to an ac waveform at the HFIT side. It can
operate as an active rectifier when it converts the ac waveform of the HFIT to the dc-link
43
voltage. The FBDCI is used to achieve zero-voltage level, adjustable pulse width, and the
symmetrical switching. In addition, the number of switches can be reduced to obtain
simpler circuit than the latter, shown in Fig. 5.1(b). In this case, one of the half-bridge
circuits can be considered as the reference or master leg. Once gate pulses for the master
leg (i.e., switches and) are provided, the gate pulses of the other legs (slave legs) have a
phase shift respect to the master leg. Using this control strategy, the number of switches
can be reduced to half. The modulator can be described as follows:
1) Bidirectional power flow capability;
2) Adjustable switching frequency that feet voltage pulses frequency into the pass
band of HFIT; and
3) Stored energy in the dc link (if the modulator is in active rectifier mode).
bk.
44
bm.
bn. Fig.5.1 Proposed circuit of the FPET. (a) Basic topology and (b) reduced switch
topology
45
Cyclo-converter
Fi
g. 5.2 Principle of PSM method.
br. Sym
bt.
bv.
bol
Gi
Ga
bs. Definition
bu. Gate driving signal of Si where i=1,2,3 and 4
bw.Gate driving signal of Sa and Sb
and
46
Gb
bx. Ts
bz. Ton
cb. Tcd
cd. Vp
cf. Vs
ch. Vc
cj. N
cm.
cn. According to Fig. 5.2, the duty cycle of FBDCI is defined as follows:
D ( k T s )=
co.
2T on (k T s )
,
Ts
(5.1)
cp.
k=1, 2, 3.
cq. The modulated voltage at the secondary side for one duty cycle is expressed by
(5.2)
V s=N V p
cr.
(5.2)
cs. The modulated voltage at the output of cycloconverter (Vc) is determined as
follows:
ct.
V c ( t )=sign ( t )| N V P ( t )|=sign ( t ) N V d ( t ) ,
47
cu.
cv.
cw.
k=1, 2, 3
Where sign (tk) function determines the polarity of Vc that can be positive or
negative according to the desired output voltage and presented by (5.4).
sign ( t ) =
cx.
cy.
cz.
k=1, 2, 3
(5.4)
da.
db.
dc.
48
dd.
dg.
dh.
(5.5)
49
di.
Where vRefi (t) is the reference voltage, According to (4), one may obtain
dj.
V ref ( t ) K c sign i ( ( k +1 ) T s ) N i N d ( k T s ) D i ( ( k +1 ) T s ) ,
i
k T s <1<( k +1)T s
dk.
dl.
(5.6)
Where the asterisk symbols show the next stage values, Therefore, the
dm.
dn.
do.
D i ( ( k +1 ) T s )
|V ref (( k +1 ) T s)|
i
K c N i V d (k T s)
(k +1)T s
vref
i
sign i ( ( k +1 ) T s ) =sign
0<D<1
(5.7)
constant over time period of kTs < t < (k + 1) Ts. The duty cycle is a function of dc-link
voltage (Vd (kTs)) and the turn winding of the HFIT at the ith port. The block diagram of
controller is shown in Fig. 5.4.
dp.
dq. Fig. 5.4 Control circuit of a typical port that operates as a voltage source.
In every system, there is a balance among losses, input energy and output
W i+W c +W loss=0
dt.
i=1
du.
(5.8)
Where Wi, WCd, and Wloss are the input/output energy, stored energy at dc
link and losses, respectively. Neglecting the power losses, (4.8) can be approximated by
n
Pi Pc
dv.
i=1
(5.9)
dw.
some of the ports should absorb and inject desired active power. The algorithm for
regulation of dc-link voltage is as follows:
dx. Step 1 At the start-up instant, following two methods can be used to charge the
dc-link capacitor to the desired value.
1) The dc-link capacitor can be charged by an extra dc source. As the desired dc-link
voltage achieved, the dc source should be disconnected.
2) The cycloconverter can provide a high frequency voltage across HFIT. When the
voltage passes through HFIT, it changes to a dc voltage across dc-link capacitor
by the body diodes of FBDCI switches. The dc voltage can charge the capacitor
considering the winding ratio of HFIT. The startup current is limited by Lf.
dy. Step 2 DC-link voltage checking.
1) If Vd,Ref Vd,Ref < Vd (t) < Vd,Ref +Vd,Ref , then there is no need for adjustments.
The Vd,Ref is a fraction of Vd,Ref that is required to provide Hysteresis band.
2) If Vd,Ref Vd,Ref > Vd (t) or Vd (t) > Vd,Ref + Vd,Ref , then voltage should be
regulated and the port powers should be adjusted.
dz. Step 3 Return to the second step.
51
eb.
v c ( t )= 2V c sin ( 2 f i tc ) V c c
i
v pr ( t )= 2 V pr sin ( 2 f i t p ) V pr p
i
ef.
i= c
i
pi
(5.10)
eg.
eh. Definition
ei.
ej. Definition
ek.
cycloconverter
es.
i
Vc
eo.
em.
V pr
pi
eq.
eu.
fi
52
ex.
P i=
V c V pr
sin i
2 f i Lf
i
(5.11)
ez.
typical PI controller, the value of required Pi can be estimated. According to (4.6) and
(4.7), the duty cycles are achieved.
with the PET, suggested in [9]. As can be seen in this figure, the ports one to five, i.e., P1,
P2, P3, P4 and P5 are connected in series to increase the rating of the input voltage. The
RC circuits (Rs and Cs) are connected to each port to divide high input voltage equally
among the ports. The sixth, seventh, and eight ports are connected to a low voltage threephase load.
In order to study the capability of FPET to reduce the input voltage disturbances
such as voltage swell and sag, 50% voltage swell and 50% voltage sag is applied to the
supply of FMPET. The advantage of multilevel PET over FMPET is its lower harmonic
components in the input current. On the other hand, FMPET has the capability of the
bidirectional power flow, while the multilevel PET is unidirectional. It must be
mentioned that, FMPET has one dc link and one dc capacitor but multilevel PET has two
dc links in each module. In addition, the output ports of FMPET can be connected in star
configuration to provide a three phase four-wire system with independent phase voltage
control.
53
fc.
fd. Fig 5.6 Proposed circuits for high voltage application
54
fe. CHAPTER 6
fh.
fi. Fig 6.1 Simulation Circuit of FMPET for High voltage application
[Vd]
+2
C
1
g
+3
Sa6
g
1+
Current Measurement
Sa1
1+
3
C
g
g
E
C
[Vpr1]
Goto4
[Vpr6]
Goto3
S36
Sa2
S46
Subsystem21
Sb6
Subsystem16
[Ipr1]
Goto5
Sb1
S41
g
g
E
C
S2
2
v
1
g
+
+2
C
3
C
i
-+
+3
+
v-
g
E
C
E
1+
Sa7
Sb2
Subsystem17
1+
+2
C
3
E
S42
Sa3
[Vpr7]
Goto2
Subsystem22
Sb7
E
C
+ v
-
+3
-
+3
+2
C
1
g
1+
S37
g
3
C
+2
C
S47
g
g
+3
Sa8
2
C
E
C
3
C
Sb3
Subsystem18
1+
S32
1
g
g
S33
S43
g
g
S31
+
v
Sb8
[Vpr8]
Goto1
Subsystem23
+
v
-
Sa4
1+
S38
S48
1
g
[Vpr8]
From43
[Vpr7]
From42
[Vpr6]
From40
From41
[Vd]
From35
[Vpr6]
From34
S44
Scope2
Scope1
Scope
Subsystem19
Sb4
S34
g
g
E
C
Scope6
S1
+3
-
+2
C
E
1
g
+2
C
3
C
E
[Vpr1]
From37
[Ipr1]
From36
Sa5
+2
C
E
+3
2
Scope4
Scope3
1
g
S45
Subsystem20
Sb5
S35
g
g
C
E
C
E
3
C
E
E
3
C
E
2
C
E
g
g
55
fk.
E
fj.
1+
+3
powergui
Discrete,
Ts = 5e -005 s.
S41
z
AND
S31
1
AND
!Q
C
D Latch2
Q
D
Unit Delay3
Sign
Abs
Constant
600
From
u
Math
Function
|u|
Gain
-K[Vd]
Variable
Time Delay
1
Product Saturation
1
1
Clock
To
D Latch1
!Q
D Latch
!Q
C
Unit Delay1
XOR
Q
D
S2
z
AND
AND
S1
Sa1
AND
Sb1
z
AND
XOR
z
Unit Delay2
fl.
fm.
fn. Fig 6.2 Control Circuit of FMPET
fo.
The simulation circuit diagram and control circuit are shown in fig 6.1
and fig 6.2. The ports P1, P2, P3, P4 and P5 are connected in series to obtain high voltage
and ports P6, P7 and P8 are connected in star for three phase voltage application.
56
600
Volts
200
-200
-400
-600
0.44
0.45
0.46
0.47
Time
0.48
0.49
0.5
fr.
40
Amps
10
0
-10
-20
-30
-40
0.44
0.45
0.46
0.47
Time
0.48
0.49
57
0.5
ft.
400
300
200
Volts
100
0
-100
-200
-300
-400
1.36
1.365
1.37
1.375
1.38
Time
1.385
1.39
1.395
1.4
Fig 6.3 shows the voltage and the current of one of the five ports of HV
FMPET. Considering the phase of the sinusoidal current waveform, the port draws power
from the utility grid with almost unity power factor. Fig 6.4 shows the three phases
balanced load voltage waveform.
58
fw.
fx. Fig 6.5 Port 6, Input DC and output voltage wave forms.
fy.
disturbances such as voltage swell and sag, 50% voltage swell and 50% sag is applied to
the supply of FMPET. Fig 6.5 shows the Input, Load and DC link voltages i.e., port 6
remains almost constant during voltage swell and sag, respectively.
gd.
ge.
gf.
gg.
gh.
gi.
CONCLUSION
proposed to facilitate many requirements that are expected in power electronic and
distribution systems. The proposed topology is flexible enough to provide bidirectional
power flow and has as many ports as it is required. For low-voltage application, FPET
can correct power factor and can adjust the waveform and frequency of the output
voltage. The dc link plays a significant role to provide energy balance, power
management in the circuit and independent operation of ports. The advantages of the
FPET are: bidirectional power flow capability of ports, module-based topology, which
can be used in different forms, independent operation of ports, flexibility in power
amount and direction in all ports, and double galvanic isolation between each port, as
well as using only one storage element.
gj.
gk.
gl.
gm.
gn.
go.
gp.
gq.
gr.
gs.
gt.
60
gu.
gv.
gw.
gx.
gy.
gz.
ha.
BIBILOGRAPHY
61