TDA 4700

TDA 4718

Control IC for Single-Ended and Push-Pull

Switched-Mode Power Supplies (SMPS)

Features

Feed-forward control (line hum suppression)

Symmetry inputs for push-pull converter
(TDA 4700)
Push-pull outputs
Dynamic output current limitation
Overvoltage protection
Undervoltage protection
Soft start
Double pulse suppression

Type

Ordering Code

Package

Temp.-Range

TDA 4700 A

Q67000-Y594

P-DIP-24-1

0 to 70 C

TDA 4718 A

Q67000-Y639

P-DIP-18-1

0 to 70 C

Not for new design

P-DIP-24-1

P-DIP-18-1

These versatile SMPS control ICs comprise digital and

analog functions which are required to design highquality flyback, single-ended and push-pull converters
in normal, half-bridge and full-bridge configurations.
The component can also be used in single-ended
voltage multipliers and speed-controlled motors.
Malfunctions in electrical operation are recognized by
the integrated operational amplifiers, which activate
protective functions.

1)

Is now available for temperature range 25 to 85 C.

Semiconductor Group

05.95

TDA 4700
TDA 4718

Pin Configuration (TDA 4700)

(top view)

Semiconductor Group

TDA 4700
TDA 4718

Pin Definitions and Functions (TDA 4700)

Pin

Symbol

Function

GND

Ground 0 V

2
3

+ VREF
+ VS

Reference voltage
Supply voltage

4
5

Q2
Q1

Output Q2
Output Q1

6
7
8

I SYM Q2
Q SYNC

Csoft start

Symmetry Q2
Sync. output
Soft start

9
10
11

RT
Cfilter
CT

VCO RT
Capacitance
VCO CT

12
13

RR
CR

Ramp generator RR
Ramp generator CR

14
15

I COMP
Q Op Amp

Comparator input
Operational amplifier output

16

I Op Amp

Operational amplifier input ()

17

+ I Op Amp

Operational amplifier input (+)

18

I SYNC

Sync. input

19

ON/OFF/IUV

ON/OFF, undervoltage

20
21

QOV
IOV

Overvoltage output
Overvoltage input

22

IDYN

Dynamic current limitation ()

23

+ IDYN

Dynamic current limitation (+)

24

I SYM Q1

Symmetry

Semiconductor Group

TDA 4700
TDA 4718

Pin Configuration (TDA 4718)

(top view)

Semiconductor Group

TDA 4700
TDA 4718

Pin Definitions and Functions (TDA 4718)

Pin

Symbol

Function

GND

Ground 0 V

2
3

RR
CR

Ramp generator RR
Ramp generator CR

4
5

I COMP
I SYNC

+ Input comparator K2
Sync. input

6
7

IUV
IOV

Input undervoltage, ON/OFF

Input overvoltage

8
9

IDYN
+ IDYN

Input dynamic current limitation ()

Input dynamic current limitation (+)

10
11

+ VREF
+ VS

Reference voltage
Supply voltage

12
13

Q2
Q1

Output Q2
Output Q1

14
15

Q SYNC

Csoft start

Sync. output
Soft start

16
17
18

RT
Cfilter
CT

VCO RT
Capacitance
VCO CT

Circuit Description
Voltage Controlled Oscillator (VCO)
The VCO generates a sawtooth voltage. The duration of the falling edge is determined
by the value of CT. The duration of the rising edge of the waveform and, therefore,
approximately the frequency, is determined by the value of RT. By varying the voltage at
Cfilter, the oscillator frequency can be changed by its rated value. During the fall time, the
VCO provides a trigger signal for the ramp generator, as well as an L signal for a number
of IC parts to be controlled.

Semiconductor Group

TDA 4700
TDA 4718

Ramp Generator
The ramp generator is triggered by the VCO and oscillates at the same frequency. The
duration of the falling edge of the ramp generator waveform is to be shorter than the fall
time of the VCO. To control the pulse width at the output, the voltage of the rising edge
of the ramp generator signal is compared with a DC voltage at comparator K2. The slope
of the rising edge of the ramp generator signal is controlled by the current through RR.
This offers the possibility of an additional, superimposed control of the output duty cycle.
This additional control capability, called feed-forward control, is utilized to compensate
for known interference such as ripple on the input voltage.
Phase Comparator
If the component is operated without external synchronization, the sync input must be
connected to the sync output for the phase comparator to set the rated voltage at Cfilter.
The VCO then oscillates with rated frequency. In the case of external synchronization,
other components can be synchronized with the sync output. The component can be
frequency-synchronized, but not phase-synchronized, with the sync input. The duty
cycle of the squarewave voltage at the sync input is arbitrary. The best stability as to
small phase and frequency interference deviation is achieved with a duty cycle as
offered by the sync output.
Push-Pull Flipflop
The push-pull flipflop is switched by the falling edge of the VCO. This ensures that only
one output of the two push-pull outputs is enabled at a time.
Comparator K2
The two plus inputs of the comparator are switched such that the lower plus level is
always compared with the level of the minus input. As soon as the voltage of the rising
sawtooth edge exceeds the lower of the two plus levels, both outputs are disabled via
the pulse turn-off flipflop. The period during which the respective, active outputs is low
can be infinitely varied. As the frequency remains constant, this process corresponds to
a change in duty cycle.
Operational Amplifier K1 (TDA 4700; A)
The K1 op amp is a high-quality amplifier. Fluctuations in the output voltage of the power
supply are amplified by K1 and applied to the free + input of comparator K2. Variations
in output voltage are, in this way, converted to a corresponding change in output duty
cycle. K1 has a common-mode input voltage range between 0 V and + 5 V.

Semiconductor Group

TDA 4700
TDA 4718

Pulse-Turn-OFF Flipflop
The pulse turn-OFF flipflop enables the outputs at the start of each half cycle. If an error
signal from comparator K7 or a turn-off signal from K2 is present, the outputs will
immediately be switched off.
Comparator K3
Comparator K3 limits the voltage at capacitance Csoft start (and also at K2) to a maximum
of + 5 V. The voltage at the ramp generator output may, however rise to 5.5 V. With a
corresponding slope of the rising ramp generator edge, the duty cycle can be limited to
a desired maximum value.
Comparator K4
The comparator has its switching threshold at 1.5 V and sets the error flipflop with its
output if the voltage at capacitance Csoft start is below 1.5 V. However, the error flipflop
accepts the set signal only if no reset pulse (error) is applied. In this way the outputs
cannot be turned on again as long as an error signal is present.
Soft Start
The lower one of the two voltages at the plus inputs of K2 is a measure for the duty cycle
at the output. At the instant of turning on the component, the voltage at capacitor Csoft start
equals 0 V. As long as no error is present, this capacitor is charged with a current of 6 A
to the maximum value of 5 V. In case of an error, Csoft start is discharged with a current of
2 A. A set signal is pending at the error flipflop below a charge of 1.5 V and the outputs
are enabled if no reset signal is pending simultaneously. As the minimum ramp
generator voltage, however, is 1.8 V, the duty cycle at the outputs is actually increased
slowly and continuously not before the voltage at Csoft start exceeds 1.8 V.
Error Flipflop
Error signals, which are led to input R of the error flipflop cause an immediate disabling
of the outputs, and after the error has been eliminated, cause the component to switch
on again by the soft start.
Comparator K5, K6, K8, VREF Overcurrent Load
These are error detectors which cause immediate disabling of the outputs via the error
flipflop when an error occurs. After elimination of the error, the component switches on
again using the soft start. The output of K5 can be fed back to the input. This causes the
IC output stage to remain disabled even after elimination of the overvoltage. However, it
requires high-ohmic overvoltage coupling.

Semiconductor Group

TDA 4700
TDA 4718

Comparator K7
K7 serves to recognize overcurrents. This is the reason why both inputs of the op amp
have been brought out. Turning on is resumed after error recovery at the beginning of
the next half period but without using the soft start.
K7 has a common-mode range covers 0 V and + 4 V. The delay time between
occurrence of an error and disabling of the outputs is only 250 ns.
Symmetry (TDA 4700; A)
In push-pull converters, a saturation of the transformer core must be prevented. The
degree of saturation of the transformer can be determined with an external circuit, thus
the active periods of the outputs can be decreased unsymmetrically at the symmetry
inputs.
Outputs
Both outputs are transistors with open collectors and operate in a push-pull
arrangement. They are active low. The time in which only one of the two outputs is
conductive can be varied infinitely. The length of the falling edge at VCO is equal to the
minimum time during which both outputs are disabled simultaneously. The minimum
L voltage is 0.7 V.
Reference Voltage
The reference voltage source is a highly constant source with regard to its temperature
behavior. It can be utilized in the external wiring of the op amp, the error comparators,
the ramp generator, or other external components.

Semiconductor Group

TDA 4700
TDA 4718

Block Diagram (TDA 4700)

Semiconductor Group

TDA 4700
TDA 4718

Block Diagram (TDA 4718)

Semiconductor Group

10

TDA 4700
TDA 4718

Absolute Maximum Ratings

Parameter

Symbol

Limit Values

Unit

min.

max.

0.3
0.3

33
33

V
V

Q1, Q2 high

70

mA

Q1, Q2 low

Supply voltage
Voltage at Q1, Q2

VS
VQ

Current at Q1, Q2

IQ

Symmetry 1, 2 TDA 4700; A

VSYM

0.3

33

Sync output

VSYNC Q
ISYNC Q

0.3
0

7
10

V
mA

Sync input
Input Cfilter
Input RT
Input CT
Input RR
Input CR
Input comparator
K2, K5, K6, K7

VSYNC I
VI Cf
VI RT
VI CT
VI RR
II CR

0.3
0.3
0.3
0.3
0.3
10

33
7
7
7
7
10

V
V
V
V
V
mA

VI K

0.3

33

Output K5

VQ K5

0.3

33

VI Op Amp

0.3

33

VQ Op Amp

0.3

VS 1
max. 7

V
V

Input op amp

TDA 4700; A

Output op amp TDA 4700; A

Reference voltage

VREF

0.3

VREF

Input Csoft start

VI soft start

0.3

Junction temperature
Storage temperature

Tj
Tstg

55

150
125

C
C

Thermal resistance
system - air
TDA 4700; A
TDA 4718
TDA 4718 A

Rth SA
Rth SA
Rth SA

65
70
60

K/W
K/W
K/W

Semiconductor Group

Test
Condition

11

SYNC Q high
SYNC Q low

TDA 4700
TDA 4718

Operating Range
Parameter

Symbol

Limit Values
min.

max.

Unit

Supply voltage

VS

10.5

30

Ambient temperature
TDA 4700
TDA 4718
TDA 4700 A
TDA 4718 A

TA

25

85

TA

70

VCO frequency
Ramp generator frequency

f
fRG

40
40

250 000
250 000

Hz
Hz

Test
Condition

Characteristics
VS = 11 to 30 V; TA = 25 to 85 C
Parameter

Symbol

Limit Values
min.

Supply current

IS

VREF

2.35

typ.

Unit

Test
Condition

20

mA

CT = 1 nF
fVCO = 100 kHz

2.65

0 mA < IREF < 5 mA

max.

Reference
Reference voltage
Reference voltage
change
Reference voltage
change
Reference voltage
change
Temperature
coefficient
Response threshold
of IREF overcurrent
1)

2.5

VREF

mV

14 V 20 %

VREF

15

mV

25 V 20 %

mV

0 mA < IREF < 5 mA

VREF

151)

TC

0.25 0.4

mV/K

IREF

10

mA

At TA = 0 to 70 C, this value falls to max. 5 mV

Semiconductor Group

12

TDA 4700
TDA 4718

Characteristics (contd)
VS = 11 to 30 V; TA = 25 to 85 C
Parameter

Symbol

Limit Values
min.

typ.

Unit

max.

Test
Condition

Oscillator (VCO)
Frequency range
Frequency change
Frequency change
Tolerance
Fall time sawtooth
RC combination
VCO

fVCO
f/fVCO
f/fVCO
f/fVCO
t
t
CT
RT

40

0.82
5

47
700

Hz
%
%
%
s
s
nF
k

40

100 000

Hz

100 000
0.5

1
7

1
7
1
10

14 V 20 %
25 V 20 %
RT = 0; CT = 0
CT = 1 nF
CT = 10 nF

Ramp Generator
Frequency range
Maximum voltage
at CR
Minimum voltage
at CR
Input current
through RR
Current
transformation ratio

VH

5.5

VL

1.8

IRR

400

IRR/ICR

1/4

Synchronization
Sync output
Sync input
Input current

Semiconductor Group

VQ H
VQ L
VI H
VI L
II

4
0.4
2
0.8
5

13

V
V
V
V
A

IQ H = 200 A
IQ L = 1.6 mA

TDA 4700
TDA 4718

Characteristics (contd)
VS = 11 to 30 V; TA = 25 to 85 C
Parameter

Symbol

Limit Values
min.

typ.

Unit

max.

Test
Condition

Comparator K2
Input current
Turn-OFF delay1)
Input voltage

II K2

2
500

tD OFF
VI K2

V
V

1.8
5
Common-mode input
voltage range

VI C

5.5

A
ns
for duty cycle
D=0
D = max.

Soft Start K3, K4

Charge current for

Csoft start

Ich

Idch
Vlim
VK4

2
5
1.5

A
V
V

Discharge current for

Csoft start
Upper limiting voltage
Switching voltage K4

Operational Amplifier K1 (TDA 4700; TDA 4700 A)

Open-loop voltage
gain
Input offset voltage
Temperature
coefficient of VIO
Input current
Common-mode input
voltage range
Output current
Rise time of output
voltage
Transition frequency
Phase at fT
Output voltage
1)

GV0
VIO

60
10

TC
II
VIC
IQ

10

dB
mV

30

30
2

V/K
A

0
3

5
1.5

V
mA

5.5

V/s
MHz
deg.
V

V/t
fT

1
3
120

VQ H/L

1.5

At the input: step function V = 100 mV

Semiconductor Group

80

V = + 100 mV

14

3 mA < I < 1.5 mA

TDA 4700
TDA 4718

Characteristics (contd)
VS = 11 to 30 V; TA = 25 to 85 C
Parameter

Symbol

Limit Values
min.

typ.

Unit

max.

Test
Condition

Symmetry (TDA 4700; TDA 4700 A)

Input voltage
Input current

VI H
VI L
II

2.0
0.8
2

V
V
A

VQ H
VQ L

30
1.1

V
V

IQ = 20 mA

IQ

VQ H = 30 V

Output Stages Q1, Q2

Output voltage
Output leakage
current

ON, OFF, Undervoltage K6

Switching voltage
Input current
Turn-OFF delay time1)
Error detection time1)

VREF + 0.03 V

VREF 0.03

II

tD OFF
t

A
ns
ns

4
10
2

V
mV
A
ns
ns

250
50

Dynamic Current Limitation K7

Common-mode input
voltage range
Input offset voltage
Input current
Turn-OFF delay time2)
Error detection time2)

VIC
VIO
II
tD OFF
t

0
10

VREF 0.03

VREF + 0.03 V

2
200

250
50

Overvoltage K5
Switching voltage
Input current
Output current
Turn-OFF delay time1)
Error detection time1)
1)
2)

II
IQ

tD OFF
t

250
50

At the input: step function V = VREF 100 mV

VREF + 100 mV
At the input: step function V = 100 mV
V = + 100 mV

Semiconductor Group

15

A
A
ns
ns

VQH min = 5 V

TDA 4700
TDA 4718

Characteristics (contd)
VS = 11 to 30 V; TA = 25 to 85 C
Parameter

Symbol

Limit Values
min.

typ.

Unit

Test
Condition

V
V
V
V

0 C < TA < 70 C

max.

Supply Undervoltage
Turn-ON threshold for
VS rising
Turn-OFF threshold
for VS falling

VS

8.8

VS

8.5

11
10.5
10.5
10

Input Cfilter
Rated voltage for
rated frequency
VR
Frequency approx.
proportional to voltage
within the range
VR
Voltage at open
sync input
VC filter

Semiconductor Group

5
1.6

16

V
V

0 C < TA < 70 C

TDA 4700
TDA 4718

Dimensioning Notes for RC Network

1. Determination of the minimum time during which both outputs must be disabled
selection of CT; selection of CR CT.
2. Determination of the VCO frequency = 2 x output frequency
selection of RT.
3. Determination of the rated slope of the rising ramp generator voltage, which the
maximum possible turn-on period per half wave depends on
selection of RR.
4. Duration of the soft start process
selection of Csoft start.
5. In the case of a free-running VCO: connect sync output with sync input.
6. Wiring of the op amp according to the dynamic requirements and
connection of its output with the free input of K2. (TDA 4700; TDA 4700 A)
7. Capacitance Cfilter is not required in the free-running operation (sync input connected
with sync output).
In the case of external synchronization, that value depends on the selected operating
frequency and the required maximum phase interference deviation.
Rated VCO frequency:
Cfilter favourable:

Semiconductor Group

100 kHz
10 nF

50 Hz
1F

17

TDA 4700
TDA 4718

Pulse Diagram

Semiconductor Group

18

TDA 4700
TDA 4718

VCO Frequency versus RT and CT

Semiconductor Group

19

TDA 4700
TDA 4718

VCO Temperature Response

VS = 12 V; D = max.
f VCO
---------------- [ 1 K ] with CT as parameter
fK K

Semiconductor Group

20

TDA 4700
TDA 4718

Current Consumption
versus Temperature

Semiconductor Group

Output Current versus

Output Voltage

21