78S40
78S40
78S40
I
out
t
on
I
out
t
on
8 V
RIPPLE
V
RIPPLE
V
RIPPLE
( (
(
(((
Note:
V
SAT
- Saturation voltage of the switching element V
D
- Forward voltage of the flyback diode.
Design example - Step down regulator
Given the conditions: V
in
= 25V, V
out
= 5V, I
out
(max.) =
.5A, V
ripple
= 1%, we can design a step-down switching
regulator as depicted schematically in Figure 8.
First, determine the ratio of switch conduction verses
diode conduction times:
t
on :
t
off
t
on
=
V
out
+ V
D
(from table 1)
t
off
V
in
- Vsat - V
out
=
5 + 0.7
=
5.7
=.30
25 - 1.1 - 5 18.9
Now, we add the requirement that in the continuous
conduction mode (coil current never goes to zero) we
want the minimum frequency to be above the audio
range:
f
min.
5kHz
therefore,
1
5000 sec-1
t
on
+ t
off
or (t
on
+ t
off
)
max
= 200 sec
Algebraic manipulation of the previously obtained
value of t
on
/t
off
will give us toff as a function of (t
off
+ t
on
)
and (t
on
/t
off
) which have been determined.
(
(
)
)
Of course, the typical charging current is higher than
20 microamps, so the typical operating frequency will
be greater than 5kHz.
232-2936
6
The minimum inductance value may now be obtained
by reference to the maximum on time and the desired
value of maximum load current.
I
peak
= 2 I
out (max.)
= (2) (.5A)
= 1.0A
L
(min.)
= (V
in
- V
sat
- V
out
) t
on
(max.)
I
peak
L
(min.)
= (18.9)
46 10
-6
1.0
L
(min.)
= 869 H
This minimum value of inductance was determined by
assuming the onset of continuous conduction operation
at the maximum value of load current for a minimum
charge current oscillator. As mentioned previously,
actual operating frequencies will typically be higher,
resulting in current waveforms more like Figure 7c at
full load. Larger than minimum values of inductance
reduce the value of load current at which continuous
conduction occurs as well as effect a reduction in the
peak to average switch current.
For this design, then, let's use an inductance value well
above the minimum; say 1500 micro Henries.
The reduced peak to average values of switch current
allow us to set the current limit threshold at two times
the maximum load current or 1.0A
R
sc
=
.33V
= .33
1.0A
The inductor must be specified to allow non-saturated
operation up to this peak current of 1.0 Amperes.
The actual output voltage waveform in Figures 7a, b, c
is extremely complex. An RMS value would be very
Figure 8 Step-down voltage regulator
Figure 7 Step-down regulator waveforms
difficult to obtain analytically because of the presence
of partial cycles. An approximation of the peak-to-peak
ripple can be obtained from the formula:
V
p-p
= (I
peak
) (t
on
+ (t
off
)
8C
O
For 1% ripple (peak to peak) on the 5 volt output:
C
O
= (1.0) (200 10
-6
)
(8) (.05)
C
O
= 500F
232-2936
7
Design example - step-up regulator
V
in
= 12V, V
out
= 28V, I
out
= 0.1A
V
ripple
= 1%
t
on
=
V
out
+ V
d
- V
in
=
28 + 0.7 - 12
t
off
V
in
- V
sat
12 - 0.5
=
15.3
= 1.33
11.5
choose: f
min.
= 10kHz
(t
on
+ t
off
)
(max.) =
1
= 100 sec
f
min.
t
off
=
t
on
+ t
off
=
100
= 43 sec
(max.)
t
on
+ 1 2.33
t
off
t
on
= 1.33 t
off
= 57 sec
(max.)
C
T
= (40 x 10
-6
) t
on
= 2283 pf.
I
peak
= 2 I
out(max.)
t
on
+ t
off
t
off
I
peak
= (2) (0.1)
(100)
= 0.46A
(93)
L
(min.)
=
V
in
- V
sat
t
on(max.)
=
12 - 0.5
(57 x 10
-6
)
I
peak
0.27
= 2.43 mH
R
SC
=
0.33 = 0.33
= 0.6 ohms
(1.2) I
peak
(1.2) I
peak
C
O
I
out
G ton
V
ripple
=
0.1
57 x 10
-6
0.28
= 20 F
Figure 9 Set-up voltage regulator
Design example - inverting regulator
A schematic of the basic inverting regulator is shown in
Figure 10.
Conditions
V
IN
= 12V I
out (max.)
= 500mA
V
OUT
= -15V V
RIPPLE
1% (peak to peak)
Calculations
An external PNP switching transistor is necessary for
the inverting regulator configuration because of polar-
ity limitations.
t
on
=
V
out
+ V
d
=
15 + 0.7
= 1.365
t
off
V
in
- V
sat
12 - 0.5
Let f
min.
= 8kHz
(t
on
+ t
off
)
(max.)
=
1
= 125 s
f
min.
t
off
=
t
on
+ t
off
=
125
=
125
=52.85s
t
on
+ 1
1.365 + 1 2.365
t
off
t
on
= 72.15s
C
T
= (4 x 10
-5
) t
on
= 2886 pF
make C
T
= 2700pF (2n7).
I
peak
= 2 x I
out(max.)
t
on
+ t
off
t
off
= (2 x 0.5)
125
= 2.365A
52.85
L
(min.)
=
V
in
- V
sat
t
on(max.)
=
12 - 0.5
72.15 10
-6
I
peak
2.365
= 350H
( )
232-2936
8
Figure 10 Inverting regulator
R
SC
=
0.33
=
0.33
= 0.12 ohms
(1.2) I
peak
1.2 x 2.365
C
O
=
I
out
t
on
V
ripple
=
0.5
x 72.15 10
-6
0.15
= 240F
Make C
O
= 220F
The sampling network, R
1
and R
2
, can easily be calcu-
lated. Assuming the sampling network current I
S
is
1mA:
R
1
=
V
REF
1.3k
I
S
R
2
=-V
OUT
= 15k
I
S
Set R
1
= 1.3k and use a 20k pot for R
2
so that output
voltage can be adjusted. R
5
should be 5 to protect
V
REF
, limiting I
S
to 2.6mA.
This application requires an external diode and transis-
tor since the substrate of the regulator is referenced to
ground and a negative voltage is present on the output.
The external diode and transistor prevent the substrate
diodes from a forward-biased condition.
R
3
is provided for quick turn-off of the external transis-
tor and is usually in the range of 100 to 300. R
4
can
be calculated as follows:
R
4
= V
IN
- V
SAT
- V
T
- V
BE
I
pk
/
where
V
T
= threshold voltage = 300mV
V
BE
= base emitter drop across the external transistor
=
1
/4 hFE of the external transistor
If the 2N5876 is used, the value for R
4
is:
R
4
=
12 -0.4 -0.3 -2.5
39
(2.34/10)
Again, capacitors can be placed at the input to reduce
transients.
Pulse width modulation
An alternative to the previously described mode of
operation is the configuration shown in Figure 12. In
this circuit the RS78S40 operates as a pulse-width mod-
ulator in which the duty cycle of the constant frequency
switching waveform is varied to control the output volt-
age. The oscillator ramp voltage appearing at pin 12
(C
T
) is fed to the non-inverting comparator input. The
output voltage is attenuated and subtracted from the
reference voltage in the on-chip operational amplifier
and the resulting error signal is fed to the inverting
input of the comparator.
The intersection of the ramp voltage on the non-invert-
ing output of the comparator with the error voltage on
the inverting input, modulates the turn-on point of the
output switch transistor during the positive-going ramp
of the oscillator. Turn-off, as always, takes place at the
onset of the negative-going oscillator ramp.
Because of the fast response of the pulse width modula-
tor to variations in output voltage, increased attention
must be paid to loop stability.
The pulse-width modulator, shown in Figure 12 uses a
simple, dominant pole technique to provide stable
operation with relatively slow response time.
Figure 11 Pulse width modulation waveforms
Figure 12 Pulse width modulation
232-2936
9
Additional circuits
Constant output voltage regulator
A useful variation is the use of the universal regulator to
provide a constant output for voltage inputs that are
both higher and lower than the output, (Figure 13). In
this case, 12V at 100mA is provided at the output for
input voltages over a 4V to 24V range. This is achieved
by using a step-up mode similar to the version shown
in Figure 9 to provide a 15V output and then using the
internal op amp as a series-pass regulator to reduce
the output to 12V. When the input voltage exceeds 16V,
the step-up regulator circuit follows the input at
approximately the input voltage minus 1V, but the
series-pass output remains constant at 12V. The op
amp exhibits excellent noise rejection, so output ripple
is virtually non-existent at the 12V output. Regulator
efficiency is about 50% for the upper and lower limits of
the input range (4V and 24V) and increases to a maxi-
mum of about 75% for intermediate voltages.
High current step-down regulator
Another variation involves the addition of an external
pnp transistor and an external catch diode to the step-
down regulator, (Figure 14). The transistor (Q
3
)
increases output current capability by a factor of 4 and
also improves switching efficiency because the switch-
ing voltage drops from 1.6V to 0.4V. The npn
Darlington pair switch is connected to provide the base
drive for Q
3
, with a 270 resistor limiting the base
drive to 100mA. A peak input current of 4A (plus the
80mA typ base drive) with an input voltage of 30V pro-
vides a 5V, 2A output.
In this case the off-time/on-time ratio is about 4.6:1 with
the off-time at 160s and on-time at 38s. Output
capacitance of 1000F keeps output ripple to within
100mV. The external diode (D
2
) is required to handle
the 4A switching current.
Dual tracking regulator
Figure 15 illustrates a dual-tracking regulator that pro-
vides both +15V and -15V outputs from a single +20V
input. The negative output voltage is generated with an
inverter circuit similar to the circuit of Figure 10, but the
op amp is connected in a unity gain configuration with
its output divided down and compared to the 1.25V
reference voltage. As shown, this regulator provides
15V at 100mA with 80% efficiency - 75% positive volt-
age, 85% negative voltage - with output ripple limited
to 30mV.
Figure 13 Constant output voltage regulator
over 4-24V input range
Figure 14 A 5V 2A step-down regulator
Figure 15 15V Dual tracking regulator
232-2936
Inductor design
The inductors required for the switching regulator cir-
cuits can be wound on the RM series of ferrite cores
(current catalogue).
The procedure for designing the inductor is as follows:
1. Calculate the value of inductance required from the
formula given for the type of circuit being designed.
2. Calculate LI
2
pk
in mJ.
3. Consult the RM series ferrite cores data sheet (see
latest catalogue or data sheet index for details) to
obtain a core which has an LI
2
sat
value equal to or
greater than LI
2
pk
LI
2
sat
LI
2
pk
To keep dc losses to a minimum, employ a core with a
large inductance factor, if possible, to reduce the
number of turns required for the inductance.
4. Calculate the number of turns required to obtain the
required inductance.
No. of turns = L
A
L
Where L is in nH
A
L
is the inductance factor
5. Select the largest diameter wire governed by the
maximum number of turns accommodated on the bob-
bin size employed.
As an example of the above procedure, consider the
step-up regulator circuit shown in Figure 9.
L = 2.5mH I
pk
= 0.46A
LI
2
pk
= 0.529mJ
From the RM series ferrite cores data sheet the smallest
core size which can be employed is the RM10.
(LI
2
sat
= 1.731 or 1.082mJ. To reduce dc losses, select
the RM10 core with the highest inductance factor ie.
400 (nH/turn
2)
.
Turns required = L
A
L
2.5 10
6
= 79.06 turns
400
Use 79 turns.
The maximum wire diameter which the RM10 core can
accommodate for 79 turns is 0.56 mm.
Hence wind 79 turns of 0.56mm dia. insulated copper
wire onto the bobbin of an RM10 core with an induc-
tance factor of 400nH/turns
2
.
Electro-magnetic interference (EMI)
Due to the wiring inductance in a circuit, rapid changes
in current generate voltage transients. These voltage
spikes are proportional to both the wiring inductance
and the rate at which the current changes:
V = L
di
dt
The energy of the voltage spike is proportional to the
wiring inductance and the square of the current:
E =
1
LI
2
2
Interference and voltage spiking are easier to filter if
the energy in the spikes is low and the components
predominantly high frequency.
The following precautions will reduce EMI:
- Keep loop inductance to a minimum by utilising
appropriate layout and interconnect geometry.
- Keep loop area as small as possible and lead lengths
short and, in step-down mode, return the input
capacitor directly to the diode to reduce EMI and
ground-loop noise.
The information provided in RStechnical literature is believed to be accurate and reliable; however, RS Components assumes no responsibility for inaccuracies
or omissions, or for the use of this information, and all use of such information shall be entirely at the users own risk.
No responsibility is assumed by RS Components for any infringements of patents or other rights of third parties which may result from its use.
Specifications shown in RS Components technical literature are subject to change without notice.
RS Components, PO Box 99, Corby, Northants, NN17 9RS Telephone: 01536 201234
An Electrocomponents Company RS Components 1997